111     NeXTRTC rtc;  member
938     NeXTRTC *rtc = NEXT_RTC(opaque);  in next_rtc_data_in_irq()  local
940     if (rtc->phase < 8) {  in next_rtc_data_in_irq()
941         rtc->command = (rtc->command << 1) | level;  in next_rtc_data_in_irq()
943         if (rtc->phase == 7 && !next_rtc_cmd_is_write(rtc->command)) {  in next_rtc_data_in_irq()
944             if (rtc->command <= 0x1f) {  in next_rtc_data_in_irq()
946                 rtc->retval = rtc->ram[rtc->command];  in next_rtc_data_in_irq()
948             if ((rtc->command >= 0x20) && (rtc->command <= 0x2f)) {  in next_rtc_data_in_irq()
952                 rtc->retval = 0;  in next_rtc_data_in_irq()
954                 switch (rtc->command) {  in next_rtc_data_in_irq()
956                     rtc->retval = SCR2_TOBCD(info->tm_sec);  in next_rtc_data_in_irq()
959                     rtc->retval = SCR2_TOBCD(info->tm_min);  in next_rtc_data_in_irq()
962                     rtc->retval = SCR2_TOBCD(info->tm_hour);  in next_rtc_data_in_irq()
965                     rtc->retval = SCR2_TOBCD(info->tm_mday);  in next_rtc_data_in_irq()
968                     rtc->retval = SCR2_TOBCD((info->tm_mon + 1));  in next_rtc_data_in_irq()
971                     rtc->retval = SCR2_TOBCD((info->tm_year - 100));  in next_rtc_data_in_irq()
975             if (rtc->command == 0x30) {  in next_rtc_data_in_irq()
977                 rtc->retval = rtc->status;  in next_rtc_data_in_irq()
979             if (rtc->command == 0x31) {  in next_rtc_data_in_irq()
981                 rtc->retval = rtc->control;  in next_rtc_data_in_irq()
985     if (rtc->phase >= 8 && rtc->phase < 16) {  in next_rtc_data_in_irq()
986         if (next_rtc_cmd_is_write(rtc->command)) {  in next_rtc_data_in_irq()
988             rtc->value = (rtc->value << 1) | level;  in next_rtc_data_in_irq()
991             if (rtc->retval & (0x80 >> (rtc->phase - 8))) {  in next_rtc_data_in_irq()
992                 qemu_irq_raise(rtc->data_out_irq);  in next_rtc_data_in_irq()
994                 qemu_irq_lower(rtc->data_out_irq);  in next_rtc_data_in_irq()
999     rtc->phase++;  in next_rtc_data_in_irq()
1000     if (rtc->phase == 16 && next_rtc_cmd_is_write(rtc->command)) {  in next_rtc_data_in_irq()
1001         if (rtc->command >= 0x80 && rtc->command <= 0x9f) {  in next_rtc_data_in_irq()
1003             rtc->ram[rtc->command - 0x80] = rtc->value;  in next_rtc_data_in_irq()
1005         if (rtc->command == 0xb1) {  in next_rtc_data_in_irq()
1007             if (rtc->value & 0x04) {  in next_rtc_data_in_irq()
1009                 rtc->status = rtc->status & (~0x18);  in next_rtc_data_in_irq()
1010                 qemu_irq_lower(rtc->power_irq);  in next_rtc_data_in_irq()
1018     NeXTRTC *rtc = NEXT_RTC(opaque);  in next_rtc_cmd_reset_irq()  local
1021         rtc->phase = 0;  in next_rtc_cmd_reset_irq()
1022         rtc->command = 0;  in next_rtc_cmd_reset_irq()
1023         rtc->value = 0;  in next_rtc_cmd_reset_irq()
1029     NeXTRTC *rtc = NEXT_RTC(obj);  in next_rtc_reset_hold()  local
1031     rtc->status = 0x90;  in next_rtc_reset_hold()
1034     memcpy(rtc->ram, rtc_ram2, 32);  in next_rtc_reset_hold()
1039     NeXTRTC *rtc = NEXT_RTC(obj);  in next_rtc_init()  local
1043     qdev_init_gpio_out_named(DEVICE(obj), &rtc->data_out_irq,  in next_rtc_init()
1047     qdev_init_gpio_out_named(DEVICE(obj), &rtc->power_irq,  in next_rtc_init()
1148     d = DEVICE(&s->rtc);  in next_pc_realize()
1196     object_initialize_child(obj, "rtc", &s->rtc, TYPE_NEXT_RTC);  in next_pc_init()