44     best_level = 0;  in mcf_intc_update()
47         for (i = 0; i < 64; i++) {  in mcf_intc_update()
48             if ((active & 1) != 0 && s->icr[i] >= best_level) {  in mcf_intc_update()
64     offset = addr & 0xff;  in mcf_intc_read()
65     if (offset >= 0x40 && offset < 0x80) {  in mcf_intc_read()
66         return s->icr[offset - 0x40];  in mcf_intc_read()
69     case 0x00:  in mcf_intc_read()
71     case 0x04:  in mcf_intc_read()
73     case 0x08:  in mcf_intc_read()
75     case 0x0c:  in mcf_intc_read()
77     case 0x10:  in mcf_intc_read()
79     case 0x14:  in mcf_intc_read()
81     case 0xe0: /* SWIACK.  */  in mcf_intc_read()
83     case 0xe1: case 0xe2: case 0xe3: case 0xe4:  in mcf_intc_read()
84     case 0xe5: case 0xe6: case 0xe7:  in mcf_intc_read()
86         qemu_log_mask(LOG_UNIMP, "%s: LnIACK not implemented (offset 0x%02x)\n",  in mcf_intc_read()
90         return 0;  in mcf_intc_read()
99     offset = addr & 0xff;  in mcf_intc_write()
100     if (offset >= 0x40 && offset < 0x80) {  in mcf_intc_write()
101         int n = offset - 0x40;  in mcf_intc_write()
103         if (val == 0)  in mcf_intc_write()
111     case 0x00: case 0x04:  in mcf_intc_write()
114     case 0x08:  in mcf_intc_write()
115         s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32);  in mcf_intc_write()
117     case 0x0c:  in mcf_intc_write()
118         s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val;  in mcf_intc_write()
120     case 0x1c:  in mcf_intc_write()
121         if (val & 0x40) {  in mcf_intc_write()
122             s->imr = ~0ull;  in mcf_intc_write()
124             s->imr |= (0x1ull << (val & 0x3f));  in mcf_intc_write()
127     case 0x1d:  in mcf_intc_write()
128         if (val & 0x40) {  in mcf_intc_write()
129             s->imr = 0ull;  in mcf_intc_write()
131             s->imr &= ~(0x1ull << (val & 0x3f));  in mcf_intc_write()
135         qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%02x\n",  in mcf_intc_write()
158     s->imr = ~0ull;  in mcf_intc_reset()
159     s->ipr = 0;  in mcf_intc_reset()
160     s->ifr = 0;  in mcf_intc_reset()
161     s->enabled = 0;  in mcf_intc_reset()
162     memset(s->icr, 0, 64);  in mcf_intc_reset()
176     memory_region_init_io(&s->iomem, obj, &mcf_intc_ops, s, "mcf", 0x100);  in mcf_intc_instance_init()
220                                 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));  in type_init()