622     for (cur_ring = TM_QW1_OS; cur_ring <= ring;  in xive2_tm_pull_ctx()
632     return xive2_tm_pull_ctx(xptr, tctx, offset, size, TM_QW1_OS);  in xive2_tm_pull_os_ctx()
652     data[0x4] = regs[TM_QW1_OS + TM_ACK_CNT];  in xive2_tm_report_line_gen1()
657     data[0x7] |= (regs[TM_QW1_OS + TM_WORD2] & 0x80) >> 2;  in xive2_tm_report_line_gen1()
659     data[0x8] = regs[TM_QW1_OS + TM_NSR];  in xive2_tm_report_line_gen1()
660     data[0x9] = regs[TM_QW1_OS + TM_CPPR];  in xive2_tm_report_line_gen1()
661     data[0xA] = regs[TM_QW1_OS + TM_IPB];  in xive2_tm_report_line_gen1()
662     data[0xB] = regs[TM_QW1_OS + TM_LGS];  in xive2_tm_report_line_gen1()
734     xive2_tm_pull_ctx_ol(xptr, tctx, offset, value, size, TM_QW1_OS);  in xive2_tm_pull_os_ctx_ol()
762     tctx->regs[TM_QW1_OS + TM_CPPR] = cppr;  in xive2_tctx_restore_os_ctx()
763     tctx->regs[TM_QW1_OS + TM_LSMFB] = xive_get_field32(NVP2_W2_LSMFB, nvp->w2);  in xive2_tctx_restore_os_ctx()
764     tctx->regs[TM_QW1_OS + TM_LGS] = xive_get_field32(NVP2_W2_LGS, nvp->w2);  in xive2_tctx_restore_os_ctx()
765     tctx->regs[TM_QW1_OS + TM_T] = xive_get_field32(NVP2_W2_T, nvp->w2);  in xive2_tctx_restore_os_ctx()
795     uint8_t *regs = &tctx->regs[TM_QW1_OS];  in xive2_tctx_need_resend()
847     xive_tctx_pipr_update(tctx, TM_QW1_OS, backlog_prio, backlog_level);  in xive2_tctx_need_resend()
869         memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4);  in xive2_tm_push_os_ctx()
874         memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1dw1, 8);  in xive2_tm_push_os_ctx()
896     case TM_QW1_OS:  in xive2_tctx_get_nvp_indexes()
1052     xive2_tctx_set_cppr(tctx, TM_QW1_OS, value & 0xff);  in xive2_tm_set_os_cppr()
1201     uint32_t qw1w2 = xive_tctx_word2(&tctx->regs[TM_QW1_OS]);  in xive2_presenter_tctx_match()
1239             !(cam_ignore && tctx->regs[TM_QW1_OS + TM_LGS] == 0) &&  in xive2_presenter_tctx_match()
1243             return TM_QW1_OS;  in xive2_presenter_tctx_match()