34         case TM_QW1_OS:  in xive_tctx_output()
96         case TM_QW1_OS:  in xive_tctx_notify()
384     return xive_tctx_accept(tctx, TM_QW1_OS);  in xive_tm_ack_os_reg()
390     xive_tctx_set_cppr(tctx, TM_QW1_OS, value & 0xff);  in xive_tm_set_os_cppr()
403     xive_tctx_set_lgs(tctx, TM_QW1_OS, value & 0xff);  in xive_tm_set_os_lgs()
413     xive_tctx_pipr_update(tctx, TM_QW1_OS, value & 0xff, 0);  in xive_tm_set_os_pending()
433     uint32_t qw1w2 = xive_tctx_word2(&tctx->regs[TM_QW1_OS]);  in xive_tctx_get_os_cam()
442     memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4);  in xive_tctx_set_os_cam()
465     xive_tctx_reset_signal(tctx, TM_QW1_OS);  in xive_tm_pull_os_ctx()
492         uint8_t *regs = &tctx->regs[TM_QW1_OS];  in xive_tctx_need_resend()
504     xive_tctx_pipr_update(tctx, TM_QW1_OS, 0xFF, 0); /* fxb */  in xive_tctx_need_resend()
557     { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR,       1, xive_tm_set_os_cppr,
559     { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2,      4, xive_tm_push_os_ctx,
592     { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR,       1, xive2_tm_set_os_cppr,
594     { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2,      4, xive2_tm_push_os_ctx,
596     { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2,      8, xive2_tm_push_os_ctx,
598     { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_LGS,        1, xive_tm_set_os_lgs,
828     tctx->regs[TM_QW1_OS + TM_LSMFB] = 0xFF;  in xive_tctx_reset()
829     tctx->regs[TM_QW1_OS + TM_ACK_CNT] = 0xFF;  in xive_tctx_reset()
830     tctx->regs[TM_QW1_OS + TM_AGE] = 0xFF;  in xive_tctx_reset()
833         tctx->regs[TM_QW1_OS + TM_OGEN] = 2;  in xive_tctx_reset()
840     tctx->regs[TM_QW1_OS + TM_PIPR] =  in xive_tctx_reset()
841         xive_ipb_to_pipr(tctx->regs[TM_QW1_OS + TM_IPB]);  in xive_tctx_reset()
1738     uint32_t qw1w2 = xive_tctx_word2(&tctx->regs[TM_QW1_OS]);  in xive_presenter_tctx_match()
1774             return TM_QW1_OS;  in xive_presenter_tctx_match()