Lines Matching full:end
47 * sPAPR NVT and END indexing helpers
82 * sPAPR END indexing uses a simple mapping of the CPU vcpu_id, 8
129 * On sPAPR machines, use a simplified output for the XIVE END
132 static void spapr_xive_end_pic_print_info(SpaprXive *xive, XiveEND *end, in spapr_xive_end_pic_print_info() argument
135 uint64_t qaddr_base = xive_end_qaddr(end); in spapr_xive_end_pic_print_info()
136 uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); in spapr_xive_end_pic_print_info()
137 uint32_t qgen = xive_get_field32(END_W1_GENERATION, end->w1); in spapr_xive_end_pic_print_info()
138 uint32_t qsize = xive_get_field32(END_W0_QSIZE, end->w0); in spapr_xive_end_pic_print_info()
140 uint32_t nvt = xive_get_field32(END_W6_NVT_INDEX, end->w6); in spapr_xive_end_pic_print_info()
141 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in spapr_xive_end_pic_print_info()
147 xive_end_queue_pic_print_info(end, 6, buf); in spapr_xive_end_pic_print_info()
192 XiveEND *end; in spapr_xive_pic_print_info() local
195 end = &xive->endt[end_idx]; in spapr_xive_pic_print_info()
197 if (xive_end_is_valid(end)) { in spapr_xive_pic_print_info()
198 spapr_xive_end_pic_print_info(xive, end, buf); in spapr_xive_pic_print_info()
211 /* Disable the END ESBs until a guest OS makes use of them */ in spapr_xive_mmio_set_enabled()
244 static void spapr_xive_end_reset(XiveEND *end) in spapr_xive_end_reset() argument
246 memset(end, 0, sizeof(*end)); in spapr_xive_end_reset()
249 end->w1 = cpu_to_be32(END_W1_ESe_Q | END_W1_ESn_Q); in spapr_xive_end_reset()
320 * Initialize the END ESB source in spapr_xive_realize()
330 /* Set the mapping address of the END ESB pages after the source ESBs */ in spapr_xive_realize()
374 uint8_t end_blk, uint32_t end_idx, XiveEND *end) in spapr_xive_get_end() argument
382 memcpy(end, &xive->endt[end_idx], sizeof(XiveEND)); in spapr_xive_get_end()
387 uint32_t end_idx, XiveEND *end, in spapr_xive_write_end() argument
396 memcpy(&xive->endt[end_idx], end, sizeof(XiveEND)); in spapr_xive_write_end()
522 .name = TYPE_SPAPR_XIVE "/end",
885 * The EAS, END, NVT structures are not exposed. in type_init()
1103 * to the partition. For that, find the END corresponding to the in h_int_set_source_config()
1163 XiveEND *end; in h_int_get_source_config() local
1194 end = &xive->endt[end_idx]; in h_int_get_source_config()
1196 nvt_blk = xive_get_field32(END_W6_NVT_BLOCK, end->w6); in h_int_get_source_config()
1197 nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6); in h_int_get_source_config()
1203 args[1] = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in h_int_get_source_config()
1239 XiveEND *end; in h_int_get_queue_info() local
1266 * to the partition. For that, find the END corresponding to the in h_int_get_queue_info()
1274 end = &xive->endt[end_idx]; in h_int_get_queue_info()
1277 if (xive_end_is_enqueue(end)) { in h_int_get_queue_info()
1278 args[1] = xive_get_field32(END_W0_QSIZE, end->w0) + 12; in h_int_get_queue_info()
1291 * resetting the EQ config, the END associated with the given "target"
1328 XiveEND end; in h_int_set_queue_config() local
1355 * to the partition. For that, find the END corresponding to the in h_int_set_queue_config()
1364 memcpy(&end, &xive->endt[end_idx], sizeof(XiveEND)); in h_int_set_queue_config()
1377 end.w2 = cpu_to_be32((qpage >> 32) & 0x0fffffff); in h_int_set_queue_config()
1378 end.w3 = cpu_to_be32(qpage & 0xffffffff); in h_int_set_queue_config()
1379 end.w0 |= cpu_to_be32(END_W0_ENQUEUE); in h_int_set_queue_config()
1380 end.w0 = xive_set_field32(END_W0_QSIZE, end.w0, qsize - 12); in h_int_set_queue_config()
1384 spapr_xive_end_reset(&end); in h_int_set_queue_config()
1420 end.w6 = xive_set_field32(END_W6_NVT_BLOCK, 0ul, nvt_blk) | in h_int_set_queue_config()
1422 end.w7 = xive_set_field32(END_W7_F0_PRIORITY, 0ul, priority); in h_int_set_queue_config()
1425 end.w0 |= cpu_to_be32(END_W0_UCOND_NOTIFY); in h_int_set_queue_config()
1427 end.w0 &= cpu_to_be32((uint32_t)~END_W0_UCOND_NOTIFY); in h_int_set_queue_config()
1431 * The generation bit for the END starts at 1 and The END page in h_int_set_queue_config()
1434 end.w1 = cpu_to_be32(END_W1_GENERATION) | in h_int_set_queue_config()
1436 end.w0 |= cpu_to_be32(END_W0_VALID); in h_int_set_queue_config()
1440 * are complete on the old END in h_int_set_queue_config()
1447 kvmppc_xive_set_queue_config(xive, end_blk, end_idx, &end, &local_err); in h_int_set_queue_config()
1454 /* Update END */ in h_int_set_queue_config()
1455 memcpy(&xive->endt[end_idx], &end, sizeof(XiveEND)); in h_int_set_queue_config()
1497 XiveEND *end; in h_int_get_queue_config() local
1524 * to the partition. For that, find the END corresponding to the in h_int_get_queue_config()
1532 end = &xive->endt[end_idx]; in h_int_get_queue_config()
1535 if (xive_end_is_notify(end)) { in h_int_get_queue_config()
1539 if (xive_end_is_enqueue(end)) { in h_int_get_queue_config()
1540 args[1] = xive_end_qaddr(end); in h_int_get_queue_config()
1541 args[2] = xive_get_field32(END_W0_QSIZE, end->w0) + 12; in h_int_get_queue_config()
1550 kvmppc_xive_get_queue_config(xive, end_blk, end_idx, end, &local_err); in h_int_get_queue_config()
1557 /* TODO: do we need any locking on the END ? */ in h_int_get_queue_config()
1560 args[0] |= (uint64_t)xive_get_field32(END_W1_GENERATION, end->w1) << 62; in h_int_get_queue_config()
1563 args[3] = xive_get_field32(END_W1_PAGE_OFF, end->w1); in h_int_get_queue_config()