Lines Matching +full:default +full:- +full:trigger
11 * SPDX-License-Identifier: GPL-2.0-or-later
28 #include "qemu/error-report.h"
31 #include "hw/qdev-properties.h"
66 if ((icu->fir & R_FIR_FIEN_MASK) && in set_irq()
67 (icu->fir & R_FIR_FVCT_MASK) == n_IRQ) { in set_irq()
68 qemu_set_irq(icu->_fir, req); in set_irq()
70 qemu_set_irq(icu->_irq, req); in set_irq()
76 return (icu->ipr[icu->map[n]] << 8) | n; in rxicu_level()
83 enable = icu->ier[n_IRQ / 8] & (1 << (n_IRQ & 7)); in rxicu_request()
84 if (n_IRQ > 0 && enable != 0 && qatomic_read(&icu->req_irq) < 0) { in rxicu_request()
85 qatomic_set(&icu->req_irq, n_IRQ); in rxicu_request()
101 src = &icu->src[n_IRQ]; in rxicu_set_irq()
104 switch (src->sense) { in rxicu_set_irq()
106 /* level-sensitive irq */ in rxicu_set_irq()
108 src->level = level; in rxicu_set_irq()
111 issue = (level == 0 && src->level == 1); in rxicu_set_irq()
112 src->level = level; in rxicu_set_irq()
115 issue = (level == 1 && src->level == 0); in rxicu_set_irq()
116 src->level = level; in rxicu_set_irq()
119 issue = ((level ^ src->level) & 1); in rxicu_set_irq()
120 src->level = level; in rxicu_set_irq()
122 default: in rxicu_set_irq()
125 if (issue == 0 && src->sense == TRG_LEVEL) { in rxicu_set_irq()
126 icu->ir[n_IRQ] = 0; in rxicu_set_irq()
127 if (qatomic_read(&icu->req_irq) == n_IRQ) { in rxicu_set_irq()
130 qatomic_set(&icu->req_irq, -1); in rxicu_set_irq()
135 icu->ir[n_IRQ] = 1; in rxicu_set_irq()
147 n_IRQ = qatomic_read(&icu->req_irq); in rxicu_ack_irq()
151 qatomic_set(&icu->req_irq, -1); in rxicu_ack_irq()
152 if (icu->src[n_IRQ].sense != TRG_LEVEL) { in rxicu_ack_irq()
153 icu->ir[n_IRQ] = 0; in rxicu_ack_irq()
157 n_IRQ = -1; in rxicu_ack_irq()
159 if (icu->ir[i]) { in rxicu_ack_irq()
160 if (max_pri < icu->ipr[icu->map[i]]) { in rxicu_ack_irq()
162 max_pri = icu->ipr[icu->map[i]]; in rxicu_ack_irq()
186 return icu->ir[reg] & R_IR_IR_MASK; in icu_read()
188 return icu->dtcer[reg] & R_DTCER_DTCE_MASK; in icu_read()
190 return icu->ier[reg]; in icu_read()
194 return icu->fir & (R_FIR_FIEN_MASK | R_FIR_FVCT_MASK); in icu_read()
196 return icu->ipr[reg] & R_IPR_IPR_MASK; in icu_read()
201 return icu->dmasr[reg >> 2]; in icu_read()
203 return icu->src[64 + reg].sense << R_IRQCR_IRQMD_SHIFT; in icu_read()
208 return icu->nmier; in icu_read()
210 return icu->nmicr; in icu_read()
211 default: in icu_read()
234 if (icu->src[reg].sense != TRG_LEVEL && val == 0) { in icu_write()
235 icu->ir[reg] = 0; in icu_write()
239 icu->dtcer[reg] = val & R_DTCER_DTCE_MASK; in icu_write()
243 icu->ier[reg] = val; in icu_write()
247 qemu_irq_pulse(icu->_swi); in icu_write()
251 icu->fir = val & (R_FIR_FIEN_MASK | R_FIR_FVCT_MASK); in icu_write()
254 icu->ipr[reg] = val & R_IPR_IPR_MASK; in icu_write()
260 icu->dmasr[reg >> 2] = val; in icu_write()
264 icu->src[64 + reg].sense = val >> R_IRQCR_IRQMD_SHIFT; in icu_write()
269 icu->nmier |= val & (R_NMIER_NMIEN_MASK | in icu_write()
274 if ((icu->nmier & R_NMIER_NMIEN_MASK) == 0) { in icu_write()
275 icu->nmicr = val & R_NMICR_NMIMD_MASK; in icu_write()
278 default: in icu_write()
305 if (icu->init_sense == NULL) { in rxicu_realize()
307 "rx_icu: trigger-level property must be set."); in rxicu_realize()
312 icu->src[i].sense = TRG_PEDGE; in rxicu_realize()
314 for (i = 0; i < icu->nr_sense; i++) { in rxicu_realize()
315 uint8_t irqno = icu->init_sense[i]; in rxicu_realize()
316 icu->src[irqno].sense = TRG_LEVEL; in rxicu_realize()
318 icu->req_irq = -1; in rxicu_realize()
326 memory_region_init_io(&icu->memory, OBJECT(icu), &icu_ops, in rxicu_init()
327 icu, "rx-icu", 0x600); in rxicu_init()
328 sysbus_init_mmio(d, &icu->memory); in rxicu_init()
332 sysbus_init_irq(d, &icu->_irq); in rxicu_init()
333 sysbus_init_irq(d, &icu->_fir); in rxicu_init()
334 sysbus_init_irq(d, &icu->_swi); in rxicu_init()
340 g_free(icu->map); in rxicu_fini()
341 g_free(icu->init_sense); in rxicu_fini()
345 .name = "rx-icu",
365 DEFINE_PROP_ARRAY("ipr-map", RXICUState, nr_irqs, map,
367 DEFINE_PROP_ARRAY("trigger-level", RXICUState, nr_sense, init_sense,
375 dc->realize = rxicu_realize; in rxicu_class_init()
376 dc->vmsd = &vmstate_rxicu; in rxicu_class_init()