93                                       target_ulong wr_mask)  in riscv_imsic_eidelivery_rmw()  argument
101     wr_mask &= 0x1;  in riscv_imsic_eidelivery_rmw()
102     imsic->eidelivery[page] = (old_val & ~wr_mask) | (new_val & wr_mask);  in riscv_imsic_eidelivery_rmw()
111                                       target_ulong wr_mask)  in riscv_imsic_eithreshold_rmw()  argument
119     wr_mask &= IMSIC_MAX_ID;  in riscv_imsic_eithreshold_rmw()
120     imsic->eithreshold[page] = (old_val & ~wr_mask) | (new_val & wr_mask);  in riscv_imsic_eithreshold_rmw()
128                                  target_ulong wr_mask)  in riscv_imsic_topei_rmw()  argument
138     if (topei && wr_mask) {  in riscv_imsic_topei_rmw()
153                                target_ulong new_val, target_ulong wr_mask)  in riscv_imsic_eix_rmw()  argument
182         if (wr_mask & mask) {  in riscv_imsic_eix_rmw()
201                            target_ulong new_val, target_ulong wr_mask)  in riscv_imsic_rmw()  argument
237                                           new_val, wr_mask);  in riscv_imsic_rmw()
240                                            new_val, wr_mask);  in riscv_imsic_rmw()
242         return riscv_imsic_topei_rmw(imsic, page, val, new_val, wr_mask);  in riscv_imsic_rmw()
246                                    true, val, new_val, wr_mask);  in riscv_imsic_rmw()
250                                    false, val, new_val, wr_mask);  in riscv_imsic_rmw()