Lines Matching refs:n_IRQ
195 static inline void IRQ_setbit(IRQQueue *q, int n_IRQ) in IRQ_setbit() argument
197 set_bit(n_IRQ, q->queue); in IRQ_setbit()
200 static inline void IRQ_resetbit(IRQQueue *q, int n_IRQ) in IRQ_resetbit() argument
202 clear_bit(n_IRQ, q->queue); in IRQ_resetbit()
238 static void IRQ_local_pipe(OpenPICState *opp, int n_CPU, int n_IRQ, in IRQ_local_pipe() argument
246 src = &opp->src[n_IRQ]; in IRQ_local_pipe()
249 __func__, n_IRQ, active, was_active); in IRQ_local_pipe()
253 __func__, src->output, n_IRQ, active, was_active, in IRQ_local_pipe()
264 __func__, src->output, n_CPU, n_IRQ); in IRQ_local_pipe()
270 __func__, src->output, n_CPU, n_IRQ); in IRQ_local_pipe()
285 IRQ_setbit(&dst->raised, n_IRQ); in IRQ_local_pipe()
287 IRQ_resetbit(&dst->raised, n_IRQ); in IRQ_local_pipe()
294 __func__, n_IRQ, priority, dst->ctpr, n_CPU); in IRQ_local_pipe()
302 __func__, n_IRQ, dst->servicing.next, n_CPU); in IRQ_local_pipe()
305 __func__, n_CPU, n_IRQ, dst->raised.next); in IRQ_local_pipe()
313 __func__, n_IRQ, dst->raised.next, dst->raised.priority, in IRQ_local_pipe()
318 __func__, n_IRQ, dst->ctpr, dst->servicing.priority, n_CPU); in IRQ_local_pipe()
325 static void openpic_update_irq(OpenPICState *opp, int n_IRQ) in openpic_update_irq() argument
331 src = &opp->src[n_IRQ]; in openpic_update_irq()
336 DPRINTF("%s: IRQ %d is disabled", __func__, n_IRQ); in openpic_update_irq()
347 DPRINTF("%s: IRQ %d is already inactive", __func__, n_IRQ); in openpic_update_irq()
359 DPRINTF("%s: IRQ %d has no target", __func__, n_IRQ); in openpic_update_irq()
365 IRQ_local_pipe(opp, src->last_cpu, n_IRQ, active, was_active); in openpic_update_irq()
370 IRQ_local_pipe(opp, i, n_IRQ, active, was_active); in openpic_update_irq()
380 IRQ_local_pipe(opp, i, n_IRQ, active, was_active); in openpic_update_irq()
388 static void openpic_set_irq(void *opaque, int n_IRQ, int level) in openpic_set_irq() argument
393 if (n_IRQ >= OPENPIC_MAX_IRQ) { in openpic_set_irq()
394 error_report("%s: IRQ %d out of range", __func__, n_IRQ); in openpic_set_irq()
398 src = &opp->src[n_IRQ]; in openpic_set_irq()
400 n_IRQ, level, src->ivpr); in openpic_set_irq()
404 openpic_update_irq(opp, n_IRQ); in openpic_set_irq()
409 openpic_update_irq(opp, n_IRQ); in openpic_set_irq()
421 openpic_update_irq(opp, n_IRQ); in openpic_set_irq()
426 static inline uint32_t read_IRQreg_idr(OpenPICState *opp, int n_IRQ) in read_IRQreg_idr() argument
428 return opp->src[n_IRQ].idr; in read_IRQreg_idr()
431 static inline uint32_t read_IRQreg_ilr(OpenPICState *opp, int n_IRQ) in read_IRQreg_ilr() argument
434 return output_to_inttgt(opp->src[n_IRQ].output); in read_IRQreg_ilr()
440 static inline uint32_t read_IRQreg_ivpr(OpenPICState *opp, int n_IRQ) in read_IRQreg_ivpr() argument
442 return opp->src[n_IRQ].ivpr; in read_IRQreg_ivpr()
445 static inline void write_IRQreg_idr(OpenPICState *opp, int n_IRQ, uint32_t val) in write_IRQreg_idr() argument
447 IRQSource *src = &opp->src[n_IRQ]; in write_IRQreg_idr()
460 DPRINTF("Set IDR %d to 0x%08x", n_IRQ, src->idr); in write_IRQreg_idr()
490 static inline void write_IRQreg_ilr(OpenPICState *opp, int n_IRQ, uint32_t val) in write_IRQreg_ilr() argument
493 IRQSource *src = &opp->src[n_IRQ]; in write_IRQreg_ilr()
496 DPRINTF("Set ILR %d to 0x%08x, output %d", n_IRQ, src->idr, in write_IRQreg_ilr()
503 static inline void write_IRQreg_ivpr(OpenPICState *opp, int n_IRQ, uint32_t val) in write_IRQreg_ivpr() argument
515 opp->src[n_IRQ].ivpr = in write_IRQreg_ivpr()
516 (opp->src[n_IRQ].ivpr & IVPR_ACTIVITY_MASK) | (val & mask); in write_IRQreg_ivpr()
523 switch (opp->src[n_IRQ].type) { in write_IRQreg_ivpr()
525 opp->src[n_IRQ].level = !!(opp->src[n_IRQ].ivpr & IVPR_SENSE_MASK); in write_IRQreg_ivpr()
529 opp->src[n_IRQ].ivpr &= ~IVPR_SENSE_MASK; in write_IRQreg_ivpr()
533 opp->src[n_IRQ].ivpr &= ~(IVPR_POLARITY_MASK | IVPR_SENSE_MASK); in write_IRQreg_ivpr()
537 openpic_update_irq(opp, n_IRQ); in write_IRQreg_ivpr()
538 DPRINTF("Set IVPR %d to 0x%08x -> 0x%08x", n_IRQ, val, in write_IRQreg_ivpr()
539 opp->src[n_IRQ].ivpr); in write_IRQreg_ivpr()
686 uint32_t n_IRQ = tmr->n_IRQ; in qemu_timer_cb() local
690 DPRINTF("%s n_IRQ=%d", __func__, n_IRQ); in qemu_timer_cb()
695 opp->src[n_IRQ].destmask = read_IRQreg_idr(opp, n_IRQ); in qemu_timer_cb()
696 openpic_set_irq(opp, n_IRQ, 1); in qemu_timer_cb()
697 openpic_set_irq(opp, n_IRQ, 0); in qemu_timer_cb()
971 int s_IRQ, n_IRQ; in openpic_cpu_write_internal() local
1033 n_IRQ = IRQ_get_next(opp, &dst->raised); in openpic_cpu_write_internal()
1034 if (n_IRQ != -1) { in openpic_cpu_write_internal()
1035 src = &opp->src[n_IRQ]; in openpic_cpu_write_internal()
1039 idx, n_IRQ); in openpic_cpu_write_internal()
1365 opp->timers[i].n_IRQ = opp->irq_tim0 + i; in fsl_common_init()