1174                              bool *reads, bool *writes, uint8_t aw_bits,  in vtd_iova_to_slpte()  argument
1183     if (!vtd_iova_sl_range_check(s, iova, ce, aw_bits, pasid)) {  in vtd_iova_to_slpte()
1230         addr = vtd_get_pte_addr(slpte, aw_bits);  in vtd_iova_to_slpte()
1468         (re->hi || (re->lo & VTD_ROOT_ENTRY_RSVD(s->aw_bits))))  in vtd_root_entry_rsvd_bits_check()
1473         ((re->lo & VTD_ROOT_ENTRY_RSVD(s->aw_bits)) ||  in vtd_root_entry_rsvd_bits_check()
1474          (re->hi & VTD_ROOT_ENTRY_RSVD(s->aw_bits))))  in vtd_root_entry_rsvd_bits_check()
1491          ce->lo & VTD_CONTEXT_ENTRY_RSVD_LO(s->aw_bits))) {  in vtd_context_entry_rsvd_bits_check()
1499         (ce->val[0] & VTD_SM_CONTEXT_ENTRY_RSVD_VAL0(s->aw_bits) ||  in vtd_context_entry_rsvd_bits_check()
1630         .aw = s->aw_bits,  in vtd_sync_shadow_page_table_range()
1953     uint64_t iova_limit = vtd_iova_limit(s, ce, s->aw_bits, pasid);  in vtd_iova_fl_check_canonical()
1986                              bool *reads, bool *writes, uint8_t aw_bits,  in vtd_iova_to_flpte()  argument
2053         addr = vtd_get_pte_addr(flpte, aw_bits);  in vtd_iova_to_flpte()
2209                                    &reads, &writes, s->aw_bits, pasid);  in vtd_do_iommu_translate()
2213                                    &reads, &writes, s->aw_bits, pasid);  in vtd_do_iommu_translate()
2217         xlat = vtd_get_pte_addr(pte, s->aw_bits);  in vtd_do_iommu_translate()
2252     entry->translated_addr = vtd_get_pte_addr(pte, s->aw_bits) & page_mask;  in vtd_do_iommu_translate()
2269     s->root &= VTD_RTADDR_ADDR_MASK(s->aw_bits);  in vtd_root_table_setup()
2287     s->intr_root = value & VTD_IRTA_ADDR_MASK(s->aw_bits);  in vtd_interrupt_remap_table_setup()
2593         s->iq = iqa_val & VTD_IQA_IQA_MASK(s->aw_bits);  in vtd_handle_gcmd_qie()
3819     DEFINE_PROP_UINT8("aw-bits", IntelIOMMUState, aw_bits,
4344     if (s->aw_bits > ret) {  in vtd_check_hiod()
4345         error_setg(errp, "aw-bits %d > host aw-bits %d", s->aw_bits, ret);  in vtd_check_hiod()
4430     if (end > VTD_ADDRESS_SIZE(s->aw_bits) - 1) {  in vtd_address_space_unmap()
4435         end = VTD_ADDRESS_SIZE(s->aw_bits) - 1;  in vtd_address_space_unmap()
4443         uint64_t mask = dma_aligned_pow2_mask(start, end, s->aw_bits);  in vtd_address_space_unmap()
4522                 .aw = s->aw_bits,  in vtd_iommu_replay()
4541              VTD_CAP_MGAW(s->aw_bits);  in vtd_cap_init()
4546             if (s->aw_bits >= VTD_HOST_AW_39BIT) {  in vtd_cap_init()
4549             if (s->aw_bits >= VTD_HOST_AW_48BIT) {  in vtd_cap_init()
4626     vtd_spte_rsvd[1] = VTD_SPTE_PAGE_L1_RSVD_MASK(s->aw_bits,  in vtd_init()
4628     vtd_spte_rsvd[2] = VTD_SPTE_PAGE_L2_RSVD_MASK(s->aw_bits);  in vtd_init()
4629     vtd_spte_rsvd[3] = VTD_SPTE_PAGE_L3_RSVD_MASK(s->aw_bits);  in vtd_init()
4630     vtd_spte_rsvd[4] = VTD_SPTE_PAGE_L4_RSVD_MASK(s->aw_bits);  in vtd_init()
4632     vtd_spte_rsvd_large[2] = VTD_SPTE_LPAGE_L2_RSVD_MASK(s->aw_bits,  in vtd_init()
4634     vtd_spte_rsvd_large[3] = VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_bits,  in vtd_init()
4641     vtd_fpte_rsvd[1] = VTD_FPTE_PAGE_L1_RSVD_MASK(s->aw_bits);  in vtd_init()
4642     vtd_fpte_rsvd[2] = VTD_FPTE_PAGE_L2_RSVD_MASK(s->aw_bits);  in vtd_init()
4643     vtd_fpte_rsvd[3] = VTD_FPTE_PAGE_L3_RSVD_MASK(s->aw_bits);  in vtd_init()
4644     vtd_fpte_rsvd[4] = VTD_FPTE_PAGE_L4_RSVD_MASK(s->aw_bits);  in vtd_init()
4646     vtd_fpte_rsvd_large[2] = VTD_FPTE_LPAGE_L2_RSVD_MASK(s->aw_bits);  in vtd_init()
4647     vtd_fpte_rsvd_large[3] = VTD_FPTE_LPAGE_L3_RSVD_MASK(s->aw_bits);  in vtd_init()
4766     if (!s->flts && s->aw_bits != VTD_HOST_AW_39BIT &&  in vtd_decide_config()
4767         s->aw_bits != VTD_HOST_AW_48BIT) {  in vtd_decide_config()
4774     if (s->flts && s->aw_bits != VTD_HOST_AW_48BIT) {  in vtd_decide_config()