95 static void vtd_define_quad(IntelIOMMUState *s, hwaddr addr, uint64_t val,  in vtd_define_quad()
108 static void vtd_define_long(IntelIOMMUState *s, hwaddr addr, uint32_t val,  in vtd_define_long()
122 static void vtd_set_quad(IntelIOMMUState *s, hwaddr addr, uint64_t val)  in vtd_set_quad()
131 static void vtd_set_long(IntelIOMMUState *s, hwaddr addr, uint32_t val)  in vtd_set_long()
142     uint64_t val = ldq_le_p(&s->csr[addr]);  in vtd_get_quad()  local
149     uint32_t val = ldl_le_p(&s->csr[addr]);  in vtd_get_long()  local
165 static void vtd_set_quad_raw(IntelIOMMUState *s, hwaddr addr, uint64_t val)  in vtd_set_quad_raw()
198     uint64_t val = vtd_get_quad_raw(s, DMAR_RTADDR_REG);  in vtd_update_scalable_state()  local
207     uint64_t val = vtd_get_quad_raw(s, DMAR_IQA_REG);  in vtd_update_iq_dw()  local
2392 static uint64_t vtd_context_cache_invalidate(IntelIOMMUState *s, uint64_t val)  in vtd_context_cache_invalidate()
2535 static uint64_t vtd_iotlb_flush(IntelIOMMUState *s, uint64_t val)  in vtd_iotlb_flush()
2694     uint32_t val = vtd_get_long_raw(s, DMAR_GCMD_REG);  in vtd_handle_gcmd_write()  local
2725     uint64_t val = vtd_get_quad_raw(s, DMAR_CCMD_REG);  in vtd_handle_ccmd_write()  local
2746     uint64_t val = vtd_get_quad_raw(s, DMAR_IOTLB_REG);  in vtd_handle_iotlb_write()  local
3296     uint64_t val = vtd_get_quad_raw(s, DMAR_IQT_REG);  in vtd_handle_iqt_write()  local
3376     uint64_t val;  in vtd_mem_read()  local
3427                           uint64_t val, unsigned size)  in vtd_mem_write()