886 static inline uint8_t get_pte_translation_mode(uint64_t pte)  in get_pte_translation_mode()  argument
888     return (pte >> AMDVI_DEV_MODE_RSHIFT) & AMDVI_DEV_MODE_MASK;  in get_pte_translation_mode()
891 static inline uint64_t pte_override_page_mask(uint64_t pte)  in pte_override_page_mask()  argument
894     uint64_t addr = (pte & AMDVI_DEV_PT_ROOT_MASK) >> 12;  in pte_override_page_mask()
912     uint64_t pte;  in amdvi_get_pte_entry()  local
915                         &pte, sizeof(pte), MEMTXATTRS_UNSPECIFIED)) {  in amdvi_get_pte_entry()
918         pte = 0;  in amdvi_get_pte_entry()
919         return pte;  in amdvi_get_pte_entry()
922     pte = le64_to_cpu(pte);  in amdvi_get_pte_entry()
923     return pte;  in amdvi_get_pte_entry()
931     uint64_t pte = dte[0], pte_addr, page_mask;  in amdvi_page_walk()  local
934     if (pte & AMDVI_DEV_TRANSLATION_VALID) {  in amdvi_page_walk()
935         level = get_pte_translation_mode(pte);  in amdvi_page_walk()
946             pte_perms = amdvi_get_perms(pte);  in amdvi_page_walk()
947             present = pte & 1;  in amdvi_page_walk()
955             pte_addr = pte & AMDVI_DEV_PT_ROOT_MASK;  in amdvi_page_walk()
958             pte = amdvi_get_pte_entry(as->iommu_state, pte_addr, as->devfn);  in amdvi_page_walk()
959             if (!pte) {  in amdvi_page_walk()
963             level = get_pte_translation_mode(pte);  in amdvi_page_walk()
967             page_mask = pte_override_page_mask(pte);  in amdvi_page_walk()
974         ret->translated_addr = (pte & AMDVI_DEV_PT_ROOT_MASK) & page_mask;  in amdvi_page_walk()
976         ret->perm = amdvi_get_perms(pte);  in amdvi_page_walk()
983     ret->perm = amdvi_get_perms(pte);  in amdvi_page_walk()