392                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_completion_wait()
418                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_inval_devtab_entry()
430                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_complete_ppr()
445                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_inval_all()
471                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_inval_pages()
485                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_prefetch_pages()
495                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_inval_inttable()
515                                    s->cmdbuf + s->cmdbuf_head);  in iommu_inval_iotlb()
534     if (dma_memory_read(&address_space_memory, s->cmdbuf + s->cmdbuf_head,  in amdvi_cmdbuf_exec()
536         trace_amdvi_command_read_fail(s->cmdbuf, s->cmdbuf_head);  in amdvi_cmdbuf_exec()
537         amdvi_log_command_error(s, s->cmdbuf + s->cmdbuf_head);  in amdvi_cmdbuf_exec()
570                                    s->cmdbuf + s->cmdbuf_head);  in amdvi_cmdbuf_exec()
583         trace_amdvi_command_exec(s->cmdbuf_head, s->cmdbuf_tail, s->cmdbuf);  in amdvi_cmdbuf_run()
683     s->cmdbuf = amdvi_readq(s, AMDVI_MMIO_COMMAND_BASE)  in amdvi_handle_cmdbase_write()
1624       VMSTATE_UINT64(cmdbuf, AMDVIState),