Lines Matching +full:- +full:- +full:disable +full:- +full:tpm
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
26 #include "acpi-build.h"
27 #include "acpi-common.h"
29 #include "qemu/error-report.h"
35 #include "hw/acpi/acpi-defs.h"
39 #include "hw/acpi/bios-linker-loader.h"
43 #include "system/tpm.h"
44 #include "hw/acpi/tpm.h"
52 #include "hw/mem/memory-device.h"
56 #include "hw/hyperv/vmbus-bridge.h"
64 #include "hw/pci-host/i440fx.h"
65 #include "hw/pci-host/q35.h"
66 #include "hw/i386/x86-iommu.h"
68 #include "hw/acpi/aml-build.h"
73 #include "qom/qom-qobject.h"
76 #include "hw/virtio/virtio-iommu.h"
83 /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
84 * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
140 * "ICH9-LPC" or "PIIX4_PM" has "smm-compat" property to keep the old in init_common_fadt_data()
144 bool smm_enabled = object_property_get_bool(o, "smm-compat", NULL) ? in init_common_fadt_data()
160 ((ms->smp.max_cpus > 8) ? in init_common_fadt_data()
187 * ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Architecture in init_common_fadt_data()
188 * Flags, bit offset 1 - 8042. in init_common_fadt_data()
201 pm->cpu_hp_io_base = 0; in acpi_get_pm_info()
202 pm->pcihp_io_base = 0; in acpi_get_pm_info()
203 pm->pcihp_io_len = 0; in acpi_get_pm_info()
204 pm->smi_on_cpuhp = false; in acpi_get_pm_info()
205 pm->smi_on_cpu_unplug = false; in acpi_get_pm_info()
208 init_common_fadt_data(machine, obj, &pm->fadt); in acpi_get_pm_info()
211 pm->fadt.rev = 1; in acpi_get_pm_info()
212 pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; in acpi_get_pm_info()
219 pm->fadt.reset_reg = r; in acpi_get_pm_info()
220 pm->fadt.reset_val = 0xf; in acpi_get_pm_info()
221 pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP; in acpi_get_pm_info()
222 pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; in acpi_get_pm_info()
223 pm->smi_on_cpuhp = in acpi_get_pm_info()
225 pm->smi_on_cpu_unplug = in acpi_get_pm_info()
228 pm->pcihp_io_base = in acpi_get_pm_info()
230 pm->pcihp_io_len = in acpi_get_pm_info()
236 pm->s3_disabled = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_pm_info()
238 pm->s3_disabled = false; in acpi_get_pm_info()
243 pm->s4_disabled = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_pm_info()
245 pm->s4_disabled = false; in acpi_get_pm_info()
250 pm->s4_val = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_pm_info()
252 pm->s4_val = false; in acpi_get_pm_info()
256 pm->pcihp_bridge_en = in acpi_get_pm_info()
259 pm->pcihp_root_en = in acpi_get_pm_info()
266 info->has_hpet = hpet_find(); in acpi_get_misc_info()
268 info->tpm_version = tpm_get_version(tpm_find()); in acpi_get_misc_info()
374 UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); in build_append_pci_dsm_func0_common()
430 * So use runtime assignment to set acpi-index after initializer in aml_pci_edsm()
447 g_assert(pdev->acpi_index != 0); in aml_pci_static_endpoint_dsm()
452 aml_append(pkg, aml_int(pdev->acpi_index)); in aml_pci_static_endpoint_dsm()
474 const PCIDevice *pdev = bus->devices[devfn]; in is_devfn_ignored_generic()
482 if (DEVICE(pdev)->hotplugged) { in is_devfn_ignored_generic()
492 PCIDevice *pdev = bus->devices[devfn]; in is_devfn_ignored_hotplug()
495 !DEVICE_GET_CLASS(pdev)->hotpluggable || in is_devfn_ignored_hotplug()
496 /* Cold plugged bridges aren't themselves hot-pluggable */ in is_devfn_ignored_hotplug()
497 (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged); in is_devfn_ignored_hotplug()
500 * hotplug is supported only for non-multifunction device in is_devfn_ignored_hotplug()
523 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { in build_append_pcihp_slots()
531 if (bus->devices[devfn]) { in build_append_pcihp_slots()
566 for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { in build_append_pci_bus_devices()
567 /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ in build_append_pci_bus_devices()
569 PCIDevice *pdev = bus->devices[devfn]; in build_append_pci_bus_devices()
579 call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); in build_append_pci_bus_devices()
580 /* add _DSM if device has acpi-index set */ in build_append_pci_bus_devices()
581 if (pdev->acpi_index && in build_append_pci_bus_devices()
601 QLIST_FOREACH(sec, &bus->child, sibling) { in build_append_notification_callback()
602 Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn); in build_append_notification_callback()
641 aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn)); in build_append_notification_callback()
675 * advertise function 7 if device has acpi-index in aml_pci_pdsm()
679 * other: device's acpi-index in aml_pci_pdsm()
741 * build_prt - Define interrupt routing rules
747 * The hash function is: (slot + pin) & 3 -> "LNK[D|A|B|C]".
766 /* device 1 is the power-management device, needs SCI */ in build_prt()
864 aml_append(crs, aml_irq_no_flags(vmbus_bridge->irq)); in build_vmbus_device_aml()
961 * _DIS can be no-op because the interrupt cannot be disabled. in build_gsi_link_dev()
972 /* _CRS method - get current settings */
1002 /* _STA method - get status */
1048 * so these are no-ops. We only need this link to override the in build_piix4_pci0_int()
1081 head = name[3] - base; in append_q35_prt_entry()
1084 head = i * -1; in append_q35_prt_entry()
1112 /* INTA -> PIRQA for slot 25 - 31, see the default value of D<N>IR */ in build_q35_routing_table()
1118 /* PCIe->PCI bridge. use PIRQ[E-H] */ in build_q35_routing_table()
1200 if (mcfg->base + mcfg->size - 1 >= (1ULL << 32)) { in build_q35_dram_controller()
1208 mcfg->base, in build_q35_dram_controller()
1209 mcfg->base + mcfg->size - 1, in build_q35_dram_controller()
1211 mcfg->size)); in build_q35_dram_controller()
1220 mcfg->base, in build_q35_dram_controller()
1221 mcfg->base + mcfg->size - 1, in build_q35_dram_controller()
1223 mcfg->size)); in build_q35_dram_controller()
1299 aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); in build_q35_osc_method()
1308 * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled. in build_q35_osc_method()
1369 uint32_t nr_mem = machine->ram_slots; in build_dsdt()
1373 TPMIf *tpm = tpm_find(); in build_dsdt() local
1378 AcpiTable table = { .sig = "DSDT", .rev = 1, .oem_id = x86ms->oem_id, in build_dsdt()
1379 .oem_table_id = x86ms->oem_table_id }; in build_dsdt()
1391 aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); in build_dsdt()
1396 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { in build_dsdt()
1397 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); in build_dsdt()
1405 aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); in build_dsdt()
1406 aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en)); in build_dsdt()
1413 if (pm->smi_on_cpuhp) { in build_dsdt()
1422 pm->fadt.smi_cmd, in build_dsdt()
1423 pm->fadt.smi_cmd, in build_dsdt()
1429 aml_int(pm->fadt.smi_cmd), 2)); in build_dsdt()
1440 if (pm->pcihp_bridge_en) { in build_dsdt()
1441 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); in build_dsdt()
1446 if (misc->has_hpet) { in build_dsdt()
1459 if (machine->nvdimms_state->is_enabled) { in build_dsdt()
1468 if (pcmc->legacy_cpu_hotplug) { in build_dsdt()
1469 build_legacy_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base); in build_dsdt()
1473 .smi_path = pm->smi_on_cpuhp ? "\\_SB.PCI0.SMI0.SMIC" : NULL, in build_dsdt()
1474 .fw_unplugs_cpu = pm->smi_on_cpu_unplug, in build_dsdt()
1477 pm->cpu_hp_io_base, "\\_SB.PCI0", "\\_GPE._E02", in build_dsdt()
1481 if (pcms->memhp_io_base && nr_mem) { in build_dsdt()
1484 pcms->memhp_io_base); in build_dsdt()
1488 bus = PC_MACHINE(machine)->pcibus; in build_dsdt()
1490 QLIST_FOREACH(bus, &bus->child, sibling) { in build_dsdt()
1501 root_bus_limit = bus_num - 1; in build_dsdt()
1527 /* Expander bridges do not have ACPI PCI Hot-plug enabled */ in build_dsdt()
1538 crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set, in build_dsdt()
1546 MemoryRegion *mr = &pcms->cxl_devices_state.host_mr; in build_dsdt()
1547 uint64_t base = mr->addr; in build_dsdt()
1551 base + memory_region_size(mr) - 1); in build_dsdt()
1568 mcfg.base, mcfg.base + mcfg.size - 1); in build_dsdt()
1586 for (i = 0; i < crs_range_set.io_ranges->len; i++) { in build_dsdt()
1591 0x0000, entry->base, entry->limit, in build_dsdt()
1592 0x0000, entry->limit - entry->base + 1)); in build_dsdt()
1603 for (i = 0; i < crs_range_set.mem_ranges->len; i++) { in build_dsdt()
1608 0, entry->base, entry->limit, in build_dsdt()
1609 0, entry->limit - entry->base + 1)); in build_dsdt()
1616 for (i = 0; i < crs_range_set.mem_64bit_ranges->len; i++) { in build_dsdt()
1622 0, entry->base, entry->limit, in build_dsdt()
1623 0, entry->limit - entry->base + 1)); in build_dsdt()
1645 pm->fadt.gpe0_blk.address, in build_dsdt()
1646 pm->fadt.gpe0_blk.address, in build_dsdt()
1648 pm->fadt.gpe0_blk.bit_width / 8) in build_dsdt()
1656 if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) { in build_dsdt()
1665 aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1, in build_dsdt()
1666 pm->pcihp_io_len) in build_dsdt()
1675 if (!pm->s3_disabled) { in build_dsdt()
1684 if (!pm->s4_disabled) { in build_dsdt()
1686 aml_append(pkg, aml_int(pm->s4_val)); /* PM1a_CNT.SLP_TYP */ in build_dsdt()
1688 aml_append(pkg, aml_int(pm->s4_val)); in build_dsdt()
1705 fw_cfg_add_acpi_dsdt(scope, x86ms->fw_cfg); in build_dsdt()
1714 PCIBus *pbus = PCI_HOST_BRIDGE(pci_host)->bus; in build_dsdt()
1726 if (TPM_IS_CRB(tpm)) { in build_dsdt()
1727 dev = aml_device("TPM"); in build_dsdt()
1730 aml_string("TPM 2.0 Device"))); in build_dsdt()
1739 tpm_build_ppi_acpi(tpm, dev); in build_dsdt()
1745 if (pcms->sgx_epc.size != 0) { in build_dsdt()
1746 uint64_t epc_base = pcms->sgx_epc.base; in build_dsdt()
1747 uint64_t epc_size = pcms->sgx_epc.size; in build_dsdt()
1758 epc_base + epc_size - 1, 0, epc_size)); in build_dsdt()
1769 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { in build_dsdt()
1773 PCIBus *b = PCI_HOST_BRIDGE(pci_host)->bus; in build_dsdt()
1796 g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len); in build_dsdt()
1802 * IA-PC HPET (High Precision Event Timers) Specification (Revision: 1.0a)
1851 log_addr_offset = table_data->len; in build_tpm_tcpa()
1854 /* allocate/reserve space for TPM log area */ in build_tpm_tcpa()
1881 const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine); in build_srat()
1882 int nb_numa_nodes = machine->numa_state->num_nodes; in build_srat()
1883 NodeInfo *numa_info = machine->numa_state->nodes; in build_srat()
1884 AcpiTable table = { .sig = "SRAT", .rev = 1, .oem_id = x86ms->oem_id, in build_srat()
1885 .oem_table_id = x86ms->oem_table_id }; in build_srat()
1891 for (i = 0; i < apic_ids->len; i++) { in build_srat()
1892 int node_id = apic_ids->cpus[i].props.node_id; in build_srat()
1893 uint32_t apic_id = apic_ids->cpus[i].arch_id; in build_srat()
1902 /* Flags, Table 5-36 */ in build_srat()
1919 /* Flags, Table 5-39 */ in build_srat()
1927 * from 640k-1M and possibly another one from 3.5G-4G. in build_srat()
1930 numa_mem_start = table_data->len; in build_srat()
1934 mem_len = numa_info[i - 1].node_mem; in build_srat()
1940 mem_len -= next_base - HOLE_640K_START; in build_srat()
1942 build_srat_memory(table_data, mem_base, mem_len, i - 1, in build_srat()
1952 mem_len = next_base - HOLE_640K_END; in build_srat()
1956 if (mem_base <= x86ms->below_4g_mem_size && in build_srat()
1957 next_base > x86ms->below_4g_mem_size) { in build_srat()
1958 mem_len -= next_base - x86ms->below_4g_mem_size; in build_srat()
1960 build_srat_memory(table_data, mem_base, mem_len, i - 1, in build_srat()
1963 mem_base = x86ms->above_4g_mem_start; in build_srat()
1964 mem_len = next_base - x86ms->below_4g_mem_size; in build_srat()
1969 build_srat_memory(table_data, mem_base, mem_len, i - 1, in build_srat()
1974 if (machine->nvdimms_state->is_enabled) { in build_srat()
1986 slots = (table_data->len - numa_mem_start) / 40 /* mem affinity len */; in build_srat()
2001 if (machine->device_memory) { in build_srat()
2002 build_srat_memory(table_data, machine->device_memory->base, in build_srat()
2003 memory_region_size(&machine->device_memory->mr), in build_srat()
2004 nb_numa_nodes - 1, in build_srat()
2038 build_append_int_noprefix(scope_blob, PCI_SLOT(dev->devfn), 1); in insert_scope()
2040 build_append_int_noprefix(scope_blob, PCI_FUNC(dev->devfn), 1); in insert_scope()
2050 PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; in dmar_host_bridges()
2096 build_append_int_noprefix(table_data, intel_iommu->aw_bits - 1, 1); in build_dmar_q35()
2104 16 + ioapic_scope_size + scope_blob->len, 2); in build_dmar_q35()
2113 /* Scope definition for the root-complex IOAPIC. See VT-d spec in build_dmar_q35()
2127 g_array_append_vals(table_data, scope_blob->data, scope_blob->len); in build_dmar_q35()
2130 if (iommu->dt_supported) { in build_dmar_q35()
2144 * (Version 1.0 - April 6, 2009)
2145 * Spec: http://download.microsoft.com/download/7/E/7/7E7662CF-CBEA-470B-A97E-CE7CE0D98DC2/WAET.docx
2162 * Which avoids costly VMExits caused by guest re-reading it unnecessarily. in build_waet()
2185 entry = PCI_BUILD_BDF(pci_bus_num(bus), dev->devfn) << 8 | 0x2; in insert_ivhd()
2191 uint8_t sub = dev->config[PCI_SUBORDINATE_BUS]; in insert_ivhd()
2202 * root ports without a slot (ie. built-ins) and Range entries in insert_ivhd()
2203 * when there is a slot. The same system also only hard-codes in insert_ivhd()
2204 * the alias range for an onboard PCIe-to-PCI bridge, apparently in insert_ivhd()
2235 dev_id_b = PCI_BUILD_BDF(pci_bus_num(bus), dev->devfn); in insert_ivhd()
2256 PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; in ivrs_host_bridges()
2277 /* IVinfo - IO virtualization information common to all in build_amd_iommu()
2297 if (!ivhd_blob->len) { in build_amd_iommu()
2300 * These are 4-byte device entries currently reporting the range of in build_amd_iommu()
2301 * Refer to Spec - Table 95:IVHD Device Entry Type Codes(4-byte) in build_amd_iommu()
2308 * for type IO-APIC in build_amd_iommu()
2309 * Refer to spec - Table 95: IVHD device entry type codes in build_amd_iommu()
2311 * Linux IOMMU driver checks for the special IVHD device (type IO-APIC). in build_amd_iommu()
2322 /* IVHD definition - type 10h */ in build_amd_iommu()
2333 build_append_int_noprefix(table_data, ivhd_blob->len + 24, 2); in build_amd_iommu()
2336 object_property_get_int(OBJECT(s->pci), "addr", in build_amd_iommu()
2339 build_append_int_noprefix(table_data, s->pci->capab_offset, 2); in build_amd_iommu()
2341 build_append_int_noprefix(table_data, s->mr_mmio.addr, 8); in build_amd_iommu()
2351 if (s->xtsup) { in build_amd_iommu()
2357 g_array_append_vals(table_data, ivhd_blob->data, ivhd_blob->len); in build_amd_iommu()
2359 /* IVHD definition - type 11h */ in build_amd_iommu()
2368 build_append_int_noprefix(table_data, ivhd_blob->len + 40, 2); in build_amd_iommu()
2371 object_property_get_int(OBJECT(s->pci), "addr", in build_amd_iommu()
2374 build_append_int_noprefix(table_data, s->pci->capab_offset, 2); in build_amd_iommu()
2376 build_append_int_noprefix(table_data, s->mr_mmio.addr, 8); in build_amd_iommu()
2391 g_array_append_vals(table_data, ivhd_blob->data, ivhd_blob->len); in build_amd_iommu()
2421 mcfg->base = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_mcfg()
2423 if (mcfg->base == PCIE_BASE_ADDR_UNMAPPED) { in acpi_get_mcfg()
2429 mcfg->size = qnum_get_uint(qobject_to(QNum, o)); in acpi_get_mcfg()
2439 DeviceState *iommu = pcms->iommu; in acpi_build()
2447 GArray *tables_blob = tables->table_data; in acpi_build()
2461 oem_id = x86ms->oem_id; in acpi_build()
2467 oem_table_id = x86ms->oem_table_id; in acpi_build()
2474 bios_linker_loader_alloc(tables->linker, in acpi_build()
2484 facs = tables_blob->len; in acpi_build()
2488 dsdt = tables_blob->len; in acpi_build()
2489 build_dsdt(tables_blob, tables->linker, &pm, &misc, in acpi_build()
2497 build_fadt(tables_blob, tables->linker, &pm.fadt, oem_id, oem_table_id); in acpi_build()
2500 acpi_build_madt(tables_blob, tables->linker, x86ms, in acpi_build()
2501 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2509 build_erst(tables_blob, tables->linker, erst_dev, in acpi_build()
2510 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2519 tables->vmgenid, tables->linker, x86ms->oem_id); in acpi_build()
2525 vmclock_build_acpi(VMCLOCK(vmclock_dev), tables_blob, tables->linker, in acpi_build()
2526 x86ms->oem_id); in acpi_build()
2531 build_hpet(tables_blob, tables->linker, x86ms->oem_id, in acpi_build()
2532 x86ms->oem_table_id); in acpi_build()
2538 build_tpm_tcpa(tables_blob, tables->linker, tables->tcpalog, in acpi_build()
2539 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2542 build_tpm2(tables_blob, tables->linker, tables->tcpalog, in acpi_build()
2543 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2547 if (machine->numa_state->num_nodes) { in acpi_build()
2549 build_srat(tables_blob, tables->linker, machine); in acpi_build()
2550 if (machine->numa_state->have_numa_distance) { in acpi_build()
2552 build_slit(tables_blob, tables->linker, machine, x86ms->oem_id, in acpi_build()
2553 x86ms->oem_table_id); in acpi_build()
2555 if (machine->numa_state->hmat_enabled) { in acpi_build()
2557 build_hmat(tables_blob, tables->linker, machine->numa_state, in acpi_build()
2558 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2563 build_mcfg(tables_blob, tables->linker, &mcfg, x86ms->oem_id, in acpi_build()
2564 x86ms->oem_table_id); in acpi_build()
2568 build_amd_iommu(tables_blob, tables->linker, x86ms->oem_id, in acpi_build()
2569 x86ms->oem_table_id); in acpi_build()
2572 build_dmar_q35(tables_blob, tables->linker, x86ms->oem_id, in acpi_build()
2573 x86ms->oem_table_id); in acpi_build()
2578 build_viot(machine, tables_blob, tables->linker, pci_get_bdf(pdev), in acpi_build()
2579 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2581 if (machine->nvdimms_state->is_enabled) { in acpi_build()
2582 nvdimm_build_acpi(table_offsets, tables_blob, tables->linker, in acpi_build()
2583 machine->nvdimms_state, machine->ram_slots, in acpi_build()
2584 x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2586 if (pcms->cxl_devices_state.is_enabled) { in acpi_build()
2587 cxl_build_cedt(table_offsets, tables_blob, tables->linker, in acpi_build()
2588 x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devices_state); in acpi_build()
2592 build_waet(tables_blob, tables->linker, x86ms->oem_id, x86ms->oem_table_id); in acpi_build()
2603 rsdt = tables_blob->len; in acpi_build()
2604 build_rsdt(tables_blob, tables->linker, table_offsets, in acpi_build()
2611 .oem_id = x86ms->oem_id, in acpi_build()
2615 build_rsdp(tables->rsdp, tables->linker, &rsdp_data); in acpi_build()
2629 acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); in acpi_build()
2641 /* Make sure RAM size is correct - in case it got changed e.g. by migration */ in acpi_ram_update()
2644 memcpy(memory_region_get_ram_ptr(mr), data->data, size); in acpi_ram_update()
2654 if (!build_state || build_state->patched) { in acpi_build_update()
2657 build_state->patched = 1; in acpi_build_update()
2663 acpi_ram_update(build_state->table_mr, tables.table_data); in acpi_build_update()
2665 acpi_ram_update(build_state->rsdp_mr, tables.rsdp); in acpi_build_update()
2667 acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob); in acpi_build_update()
2674 build_state->patched = 0; in acpi_build_reset()
2695 TPMIf *tpm; in acpi_setup() local
2699 if (!x86ms->fw_cfg) { in acpi_setup()
2704 if (!pcms->acpi_build_enabled) { in acpi_setup()
2720 build_state->table_mr = acpi_add_rom_blob(acpi_build_update, in acpi_setup()
2723 assert(build_state->table_mr != NULL); in acpi_setup()
2725 build_state->linker_mr = in acpi_setup()
2727 tables.linker->cmd_blob, ACPI_BUILD_LOADER_FILE); in acpi_setup()
2730 fw_cfg_add_file(x86ms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, in acpi_setup()
2731 tables.tcpalog->data, acpi_data_len(tables.tcpalog)); in acpi_setup()
2733 tpm = tpm_find(); in acpi_setup()
2734 if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) { in acpi_setup()
2737 .tpm_version = tpm_get_version(tpm), in acpi_setup()
2740 fw_cfg_add_file(x86ms->fw_cfg, "etc/tpm/config", in acpi_setup()
2747 vmgenid_add_fw_cfg(VMGENID(vmgenid_dev), x86ms->fw_cfg, in acpi_setup()
2751 build_state->rsdp_mr = acpi_add_rom_blob(acpi_build_update, in acpi_setup()