hw/dma/xilinx_axidma.c

47 OBJECT_DECLARE_SIMPLE_TYPE(XilinxAXIDMA, XILINX_AXI_DMA)
108     struct XilinxAXIDMA *dma;
125     struct XilinxAXIDMA *dma;
128 struct XilinxAXIDMA {  struct
409     XilinxAXIDMA *s = XILINX_AXI_DMA(dev);  in xilinx_axidma_reset()
465     XilinxAXIDMA *d = opaque;  in axidma_read()
500     XilinxAXIDMA *d = opaque;  in axidma_write()
563     XilinxAXIDMA *s = XILINX_AXI_DMA(dev);  in xilinx_axidma_realize()
597     XilinxAXIDMA *s = XILINX_AXI_DMA(obj);  in xilinx_axidma_init()
615     DEFINE_PROP_UINT32("freqhz", XilinxAXIDMA, freqhz, 50000000),
616     DEFINE_PROP_LINK("axistream-connected", XilinxAXIDMA,
618     DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIDMA,
620     DEFINE_PROP_LINK("dma", XilinxAXIDMA, dma_mr,
654     .instance_size = sizeof(XilinxAXIDMA),