39 #define FCODE_MAX_ROM_SIZE 0x10000
44 #define TCX_THC_NREGS    0x1000
45 #define TCX_DHC_NREGS    0x4000
46 #define TCX_TEC_NREGS    0x1000
47 #define TCX_ALT_NREGS    0x8000
48 #define TCX_STIP_NREGS   0x800000
49 #define TCX_BLIT_NREGS   0x800000
50 #define TCX_RSTIP_NREGS  0x800000
51 #define TCX_RBLIT_NREGS  0x800000
53 #define TCX_THC_MISC     0x818
54 #define TCX_THC_CURSXY   0x8fc
55 #define TCX_THC_CURSMASK 0x900
56 #define TCX_THC_CURSBITS 0x980
135     tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));  in update_palette_entries()
145     for (x = 0; x < width; x++) {  in tcx_draw_line32()
163     for (x = 0; x < len; x++) {  in tcx_draw_cursor32()
164         if (mask & 0x80000000) {  in tcx_draw_cursor32()
165             if (bits & 0x80000000) {  in tcx_draw_cursor32()
190     for(x = 0; x < width; x++, s++, s24++) {  in tcx24_draw_line32()
191         if (be32_to_cpu(*cplane) & 0x03000000) {  in tcx24_draw_line32()
223     page = 0;  in tcx_update_display()
230     snap = memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0,  in tcx_update_display()
234     for (y = 0; y < ts->height; y++, page += ds) {  in tcx_update_display()
236             if (y_start < 0)  in tcx_update_display()
244             if (y_start >= 0) {  in tcx_update_display()
246                 dpy_gfx_update(ts->con, 0, y_start,  in tcx_update_display()
254     if (y_start >= 0) {  in tcx_update_display()
256         dpy_gfx_update(ts->con, 0, y_start,  in tcx_update_display()
274     page = 0;  in tcx24_update_display()
283     snap = memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0,  in tcx24_update_display()
287     for (y = 0; y < ts->height; y++, page += ds) {  in tcx24_update_display()
289             if (y_start < 0)  in tcx24_update_display()
297             if (y_start >= 0) {  in tcx24_update_display()
299                 dpy_gfx_update(ts->con, 0, y_start,  in tcx24_update_display()
309     if (y_start >= 0) {  in tcx24_update_display()
311         dpy_gfx_update(ts->con, 0, y_start,  in tcx24_update_display()
321     tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));  in tcx_invalidate_display()
329     tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));  in tcx24_invalidate_display()
337     update_palette_entries(s, 0, 256);  in vmstate_tcx_post_load()
338     tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem));  in vmstate_tcx_post_load()
339     return 0;  in vmstate_tcx_post_load()
365     memset(s->r, 0, 260);  in tcx_reset()
366     memset(s->g, 0, 260);  in tcx_reset()
367     memset(s->b, 0, 260);  in tcx_reset()
371     update_palette_entries(s, 0, 260);  in tcx_reset()
372     memset(s->vram, 0, MAXX*MAXY);  in tcx_reset()
373     memory_region_reset_dirty(&s->vram_mem, 0, MAXX * MAXY * (1 + 4 + 4),  in tcx_reset()
375     s->dac_index = 0;  in tcx_reset()
376     s->dac_state = 0;  in tcx_reset()
377     s->cursx = 0xf000; /* Put cursor off screen */  in tcx_reset()
378     s->cursy = 0xf000;  in tcx_reset()
385     uint32_t val = 0;  in tcx_dac_readl()
388     case 0:  in tcx_dac_readl()
398         s->dac_index = (s->dac_index + 1) & 0xff; /* Index autoincrement */  in tcx_dac_readl()
401         s->dac_state = 0;  in tcx_dac_readl()
415     case 0: /* Address */  in tcx_dac_writel()
417         s->dac_state = 0;  in tcx_dac_writel()
427         case 0:  in tcx_dac_writel()
440             s->dac_index = (s->dac_index + 1) & 0xff; /* Index autoincrement */  in tcx_dac_writel()
443             s->dac_state = 0;  in tcx_dac_writel()
465     return 0;  in tcx_stip_readl()
478         addr = (addr >> 3) & 0xfffff;  in tcx_stip_writel()
481             for (i = 0; i < 32; i++)  {  in tcx_stip_writel()
482                 if (val & 0x80000000) {  in tcx_stip_writel()
489             for (i = 0; i < 32; i++)  {  in tcx_stip_writel()
490                 if (val & 0x80000000) {  in tcx_stip_writel()
510         addr = (addr >> 3) & 0xfffff;  in tcx_rstip_writel()
513             for (i = 0; i < 32; i++) {  in tcx_rstip_writel()
514                 if (val & 0x80000000) {  in tcx_rstip_writel()
522             for (i = 0; i < 32; i++)  {  in tcx_rstip_writel()
523                 if (val & 0x80000000) {  in tcx_rstip_writel()
564     return 0;  in tcx_blit_readl()
577         addr = (addr >> 3) & 0xfffff;  in tcx_blit_writel()
578         adsr = val & 0xffffff;  in tcx_blit_writel()
579         len = ((val >> 24) & 0x1f) + 1;  in tcx_blit_writel()
580         if (adsr == 0xffffff) {  in tcx_blit_writel()
583                 val = s->tmpblit & 0xffffff;  in tcx_blit_writel()
585                 for (i = 0; i < len; i++) {  in tcx_blit_writel()
609         addr = (addr >> 3) & 0xfffff;  in tcx_rblit_writel()
610         adsr = val & 0xffffff;  in tcx_rblit_writel()
611         len = ((val >> 24) & 0x1f) + 1;  in tcx_rblit_writel()
612         if (adsr == 0xffffff) {  in tcx_rblit_writel()
615                 val = s->tmpblit & 0xffffff;  in tcx_rblit_writel()
617                 for (i = 0; i < len; i++) {  in tcx_rblit_writel()
684         val = s->thcmisc | 0x02000000;  in tcx_thc_readl()
686         val = 0;  in tcx_thc_readl()
726     return 0;  in tcx_dummy_readl()
813     ram_addr_t vram_offset = 0;  in tcx_realizefn()
830         if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {  in tcx_realizefn()
835     /* 0/DFB8 : 8-bit plane */  in tcx_realizefn()
872         s->con = graphic_console_init(dev, 0, &tcx_ops, s);  in tcx_realizefn()
874         s->con = graphic_console_init(dev, 0, &tcx24_ops, s);  in tcx_realizefn()
876     s->thcmisc = 0;  in tcx_realizefn()