Lines Matching +full:- +full:- +full:-
29 #include "qemu/main-loop.h"
31 #include "hw/qdev-properties.h"
41 uint32_t cons = (r)->cons & SPICE_RING_INDEX_MASK(r); \
42 if (cons >= ARRAY_SIZE((r)->items)) { \
44 "%u >= %zu", cons, ARRAY_SIZE((r)->items)); \
47 ret = &(r)->items[cons].el; \
52 #define ALIGN(a, b) (((a) + ((b) - 1)) & ~((b) - 1))
129 trace_qxl_set_guest_bug(qxl->id); in qxl_set_guest_bug()
131 qxl->guest_bug = 1; in qxl_set_guest_bug()
132 if (qxl->guestdebug) { in qxl_set_guest_bug()
135 fprintf(stderr, "qxl-%d: guest bug: ", qxl->id); in qxl_set_guest_bug()
144 qxl->guest_bug = 0; in qxl_clear_guest_bug()
153 trace_qxl_spice_update_area(qxl->id, surface_id, area->left, area->right, in qxl_spice_update_area()
154 area->top, area->bottom); in qxl_spice_update_area()
155 trace_qxl_spice_update_area_rest(qxl->id, num_dirty_rects, in qxl_spice_update_area()
158 spice_qxl_update_area(&qxl->ssd.qxl, surface_id, area, in qxl_spice_update_area()
162 spice_qxl_update_area_async(&qxl->ssd.qxl, surface_id, area, in qxl_spice_update_area()
170 trace_qxl_spice_destroy_surface_wait_complete(qxl->id, id); in qxl_spice_destroy_surface_wait_complete()
171 qemu_mutex_lock(&qxl->track_lock); in qxl_spice_destroy_surface_wait_complete()
172 qxl->guest_surfaces.cmds[id] = 0; in qxl_spice_destroy_surface_wait_complete()
173 qxl->guest_surfaces.count--; in qxl_spice_destroy_surface_wait_complete()
174 qemu_mutex_unlock(&qxl->track_lock); in qxl_spice_destroy_surface_wait_complete()
182 trace_qxl_spice_destroy_surface_wait(qxl->id, id, async); in qxl_spice_destroy_surface_wait()
186 cookie->u.surface_id = id; in qxl_spice_destroy_surface_wait()
187 spice_qxl_destroy_surface_async(&qxl->ssd.qxl, id, (uintptr_t)cookie); in qxl_spice_destroy_surface_wait()
189 spice_qxl_destroy_surface_wait(&qxl->ssd.qxl, id); in qxl_spice_destroy_surface_wait()
196 trace_qxl_spice_flush_surfaces_async(qxl->id, qxl->guest_surfaces.count, in qxl_spice_flush_surfaces_async()
197 qxl->num_free_res); in qxl_spice_flush_surfaces_async()
198 spice_qxl_flush_surfaces_async(&qxl->ssd.qxl, in qxl_spice_flush_surfaces_async()
206 trace_qxl_spice_loadvm_commands(qxl->id, ext, count); in qxl_spice_loadvm_commands()
207 spice_qxl_loadvm_commands(&qxl->ssd.qxl, ext, count); in qxl_spice_loadvm_commands()
212 trace_qxl_spice_oom(qxl->id); in qxl_spice_oom()
213 spice_qxl_oom(&qxl->ssd.qxl); in qxl_spice_oom()
218 trace_qxl_spice_reset_memslots(qxl->id); in qxl_spice_reset_memslots()
219 spice_qxl_reset_memslots(&qxl->ssd.qxl); in qxl_spice_reset_memslots()
224 trace_qxl_spice_destroy_surfaces_complete(qxl->id); in qxl_spice_destroy_surfaces_complete()
225 qemu_mutex_lock(&qxl->track_lock); in qxl_spice_destroy_surfaces_complete()
226 memset(qxl->guest_surfaces.cmds, 0, in qxl_spice_destroy_surfaces_complete()
227 sizeof(qxl->guest_surfaces.cmds[0]) * qxl->ssd.num_surfaces); in qxl_spice_destroy_surfaces_complete()
228 qxl->guest_surfaces.count = 0; in qxl_spice_destroy_surfaces_complete()
229 qemu_mutex_unlock(&qxl->track_lock); in qxl_spice_destroy_surfaces_complete()
234 trace_qxl_spice_destroy_surfaces(qxl->id, async); in qxl_spice_destroy_surfaces()
236 spice_qxl_destroy_surfaces_async(&qxl->ssd.qxl, in qxl_spice_destroy_surfaces()
240 spice_qxl_destroy_surfaces(&qxl->ssd.qxl); in qxl_spice_destroy_surfaces()
249 trace_qxl_spice_monitors_config(qxl->id); in qxl_spice_monitors_config_async()
253 * - we are not running yet (post_load), we will assert in qxl_spice_monitors_config_async()
255 * - this is not a guest io, but a reply, so async_io isn't set. in qxl_spice_monitors_config_async()
257 spice_qxl_monitors_config_async(&qxl->ssd.qxl, in qxl_spice_monitors_config_async()
258 qxl->guest_monitors_config, in qxl_spice_monitors_config_async()
265 if (qxl->max_outputs) { in qxl_spice_monitors_config_async()
266 spice_qxl_set_max_monitors(&qxl->ssd.qxl, qxl->max_outputs); in qxl_spice_monitors_config_async()
269 qxl->guest_monitors_config = qxl->ram->monitors_config; in qxl_spice_monitors_config_async()
270 spice_qxl_monitors_config_async(&qxl->ssd.qxl, in qxl_spice_monitors_config_async()
271 qxl->ram->monitors_config, in qxl_spice_monitors_config_async()
277 cfg = qxl_phys2virt(qxl, qxl->guest_monitors_config, MEMSLOT_GROUP_GUEST, in qxl_spice_monitors_config_async()
279 if (cfg != NULL && cfg->count == 1) { in qxl_spice_monitors_config_async()
280 qxl->guest_primary.resized = 1; in qxl_spice_monitors_config_async()
281 qxl->guest_head0_width = cfg->heads[0].width; in qxl_spice_monitors_config_async()
282 qxl->guest_head0_height = cfg->heads[0].height; in qxl_spice_monitors_config_async()
284 qxl->guest_head0_width = 0; in qxl_spice_monitors_config_async()
285 qxl->guest_head0_height = 0; in qxl_spice_monitors_config_async()
291 trace_qxl_spice_reset_image_cache(qxl->id); in qxl_spice_reset_image_cache()
292 spice_qxl_reset_image_cache(&qxl->ssd.qxl); in qxl_spice_reset_image_cache()
297 trace_qxl_spice_reset_cursor(qxl->id); in qxl_spice_reset_cursor()
298 spice_qxl_reset_cursor(&qxl->ssd.qxl); in qxl_spice_reset_cursor()
299 qemu_mutex_lock(&qxl->track_lock); in qxl_spice_reset_cursor()
300 qxl->guest_cursor = 0; in qxl_spice_reset_cursor()
301 qemu_mutex_unlock(&qxl->track_lock); in qxl_spice_reset_cursor()
302 if (qxl->ssd.cursor) { in qxl_spice_reset_cursor()
303 cursor_unref(qxl->ssd.cursor); in qxl_spice_reset_cursor()
305 qxl->ssd.cursor = cursor_builtin_hidden(); in qxl_spice_reset_cursor()
329 QXLRom *rom = memory_region_get_ram_ptr(&d->rom_bar); in init_qxl_rom()
341 memset(rom, 0, d->rom_size); in init_qxl_rom()
343 rom->magic = cpu_to_le32(QXL_ROM_MAGIC); in init_qxl_rom()
344 rom->id = cpu_to_le32(d->id); in init_qxl_rom()
345 rom->log_level = cpu_to_le32(d->guestdebug); in init_qxl_rom()
346 rom->modes_offset = cpu_to_le32(sizeof(QXLRom)); in init_qxl_rom()
348 rom->slot_gen_bits = MEMSLOT_GENERATION_BITS; in init_qxl_rom()
349 rom->slot_id_bits = MEMSLOT_SLOT_BITS; in init_qxl_rom()
350 rom->slots_start = 1; in init_qxl_rom()
351 rom->slots_end = NUM_MEMSLOTS - 1; in init_qxl_rom()
352 rom->n_surfaces = cpu_to_le32(d->ssd.num_surfaces); in init_qxl_rom()
356 if (fb > d->vgamem_size) { in init_qxl_rom()
359 modes->modes[n].id = cpu_to_le32(i); in init_qxl_rom()
360 modes->modes[n].x_res = cpu_to_le32(qxl_modes[i].x_res); in init_qxl_rom()
361 modes->modes[n].y_res = cpu_to_le32(qxl_modes[i].y_res); in init_qxl_rom()
362 modes->modes[n].bits = cpu_to_le32(qxl_modes[i].bits); in init_qxl_rom()
363 modes->modes[n].stride = cpu_to_le32(qxl_modes[i].stride); in init_qxl_rom()
364 modes->modes[n].x_mili = cpu_to_le32(qxl_modes[i].x_mili); in init_qxl_rom()
365 modes->modes[n].y_mili = cpu_to_le32(qxl_modes[i].y_mili); in init_qxl_rom()
366 modes->modes[n].orientation = cpu_to_le32(qxl_modes[i].orientation); in init_qxl_rom()
369 modes->n_modes = cpu_to_le32(n); in init_qxl_rom()
372 surface0_area_size = ALIGN(d->vgamem_size, 4096); in init_qxl_rom()
373 num_pages = d->vga.vram_size; in init_qxl_rom()
374 num_pages -= ram_header_size; in init_qxl_rom()
375 num_pages -= surface0_area_size; in init_qxl_rom()
378 assert(ram_header_size + surface0_area_size <= d->vga.vram_size); in init_qxl_rom()
380 rom->draw_area_offset = cpu_to_le32(0); in init_qxl_rom()
381 rom->surface0_area_size = cpu_to_le32(surface0_area_size); in init_qxl_rom()
382 rom->pages_offset = cpu_to_le32(surface0_area_size); in init_qxl_rom()
383 rom->num_pages = cpu_to_le32(num_pages); in init_qxl_rom()
384 rom->ram_header_offset = cpu_to_le32(d->vga.vram_size - ram_header_size); in init_qxl_rom()
386 if (d->xres && d->yres) { in init_qxl_rom()
388 rom->client_monitors_config.count = 1; in init_qxl_rom()
389 rom->client_monitors_config.heads[0].left = 0; in init_qxl_rom()
390 rom->client_monitors_config.heads[0].top = 0; in init_qxl_rom()
391 rom->client_monitors_config.heads[0].right = cpu_to_le32(d->xres); in init_qxl_rom()
392 rom->client_monitors_config.heads[0].bottom = cpu_to_le32(d->yres); in init_qxl_rom()
393 rom->client_monitors_config_crc = qxl_crc32( in init_qxl_rom()
394 (const uint8_t *)&rom->client_monitors_config, in init_qxl_rom()
395 sizeof(rom->client_monitors_config)); in init_qxl_rom()
399 d->shadow_rom = *rom; in init_qxl_rom()
400 d->rom = rom; in init_qxl_rom()
401 d->modes = modes; in init_qxl_rom()
410 buf = d->vga.vram_ptr; in init_qxl_ram()
411 d->ram = (QXLRam *)(buf + le32_to_cpu(d->shadow_rom.ram_header_offset)); in init_qxl_ram()
415 d->ram->magic = cpu_to_le32(QXL_RAM_MAGIC); in init_qxl_ram()
416 d->ram->int_pending = cpu_to_le32(0); in init_qxl_ram()
417 d->ram->int_mask = cpu_to_le32(0); in init_qxl_ram()
418 d->ram->update_surface = 0; in init_qxl_ram()
419 d->ram->monitors_config = 0; in init_qxl_ram()
420 SPICE_RING_INIT(&d->ram->cmd_ring); in init_qxl_ram()
421 SPICE_RING_INIT(&d->ram->cursor_ring); in init_qxl_ram()
422 SPICE_RING_INIT(&d->ram->release_ring); in init_qxl_ram()
424 ring = &d->ram->release_ring; in init_qxl_ram()
425 prod = ring->prod & SPICE_RING_INDEX_MASK(ring); in init_qxl_ram()
426 assert(prod < ARRAY_SIZE(ring->items)); in init_qxl_ram()
427 ring->items[prod].el = 0; in init_qxl_ram()
435 memory_region_set_dirty(mr, addr, end - addr); in qxl_set_dirty()
440 qxl_set_dirty(&qxl->rom_bar, 0, qxl->rom_size); in qxl_rom_set_dirty()
446 void *base = qxl->vga.vram_ptr; in qxl_ram_set_dirty()
449 offset = ptr - base; in qxl_ram_set_dirty()
450 assert(offset < qxl->vga.vram_size); in qxl_ram_set_dirty()
451 qxl_set_dirty(&qxl->vga.vram, offset, offset + 3); in qxl_ram_set_dirty()
457 ram_addr_t addr = qxl->shadow_rom.ram_header_offset; in qxl_ring_set_dirty()
458 ram_addr_t end = qxl->vga.vram_size; in qxl_ring_set_dirty()
459 qxl_set_dirty(&qxl->vga.vram, addr, end); in qxl_ring_set_dirty()
468 switch (le32_to_cpu(ext->cmd.type)) { in qxl_track_command()
471 QXLSurfaceCmd *cmd = qxl_phys2virt(qxl, ext->cmd.data, ext->group_id, in qxl_track_command()
477 uint32_t id = le32_to_cpu(cmd->surface_id); in qxl_track_command()
479 if (id >= qxl->ssd.num_surfaces) { in qxl_track_command()
481 qxl->ssd.num_surfaces); in qxl_track_command()
484 if (cmd->type == QXL_SURFACE_CMD_CREATE && in qxl_track_command()
485 (cmd->u.surface_create.stride & 0x03) != 0) { in qxl_track_command()
487 cmd->u.surface_create.stride); in qxl_track_command()
490 WITH_QEMU_LOCK_GUARD(&qxl->track_lock) { in qxl_track_command()
491 if (cmd->type == QXL_SURFACE_CMD_CREATE) { in qxl_track_command()
492 qxl->guest_surfaces.cmds[id] = ext->cmd.data; in qxl_track_command()
493 qxl->guest_surfaces.count++; in qxl_track_command()
494 if (qxl->guest_surfaces.max < qxl->guest_surfaces.count) { in qxl_track_command()
495 qxl->guest_surfaces.max = qxl->guest_surfaces.count; in qxl_track_command()
498 if (cmd->type == QXL_SURFACE_CMD_DESTROY) { in qxl_track_command()
499 qxl->guest_surfaces.cmds[id] = 0; in qxl_track_command()
500 qxl->guest_surfaces.count--; in qxl_track_command()
507 QXLCursorCmd *cmd = qxl_phys2virt(qxl, ext->cmd.data, ext->group_id, in qxl_track_command()
513 if (cmd->type == QXL_CURSOR_SET) { in qxl_track_command()
514 qemu_mutex_lock(&qxl->track_lock); in qxl_track_command()
515 qxl->guest_cursor = ext->cmd.data; in qxl_track_command()
516 qemu_mutex_unlock(&qxl->track_lock); in qxl_track_command()
518 if (cmd->type == QXL_CURSOR_HIDE) { in qxl_track_command()
519 qemu_mutex_lock(&qxl->track_lock); in qxl_track_command()
520 qxl->guest_cursor = 0; in qxl_track_command()
521 qemu_mutex_unlock(&qxl->track_lock); in qxl_track_command()
535 trace_qxl_interface_attach_worker(qxl->id); in interface_attached_worker()
549 trace_qxl_interface_set_compression_level(qxl->id, level); in interface_set_compression_level()
550 qxl->shadow_rom.compression_level = cpu_to_le32(level); in interface_set_compression_level()
552 assert(qxl->rom->compression_level == cpu_to_le32(level)); in interface_set_compression_level()
555 qxl->rom->compression_level = cpu_to_le32(level); in interface_set_compression_level()
563 trace_qxl_interface_get_init_info(qxl->id); in interface_get_init_info()
564 info->memslot_gen_bits = MEMSLOT_GENERATION_BITS; in interface_get_init_info()
565 info->memslot_id_bits = MEMSLOT_SLOT_BITS; in interface_get_init_info()
566 info->num_memslots = NUM_MEMSLOTS; in interface_get_init_info()
567 info->num_memslots_groups = NUM_MEMSLOTS_GROUPS; in interface_get_init_info()
568 info->internal_groupslot_id = 0; in interface_get_init_info()
569 info->qxl_ram_size = in interface_get_init_info()
570 le32_to_cpu(qxl->shadow_rom.num_pages) << QXL_PAGE_BITS; in interface_get_init_info()
571 info->n_surfaces = qxl->ssd.num_surfaces; in interface_get_init_info()
634 trace_qxl_ring_command_check(qxl->id, qxl_mode_to_string(qxl->mode)); in interface_get_command()
636 switch (qxl->mode) { in interface_get_command()
639 qemu_mutex_lock(&qxl->ssd.lock); in interface_get_command()
640 update = QTAILQ_FIRST(&qxl->ssd.updates); in interface_get_command()
642 QTAILQ_REMOVE(&qxl->ssd.updates, update, next); in interface_get_command()
643 *ext = update->ext; in interface_get_command()
646 qemu_mutex_unlock(&qxl->ssd.lock); in interface_get_command()
648 trace_qxl_ring_command_get(qxl->id, qxl_mode_to_string(qxl->mode)); in interface_get_command()
655 ring = &qxl->ram->cmd_ring; in interface_get_command()
656 if (qxl->guest_bug || SPICE_RING_IS_EMPTY(ring)) { in interface_get_command()
663 ext->cmd = *cmd; in interface_get_command()
664 ext->group_id = MEMSLOT_GROUP_GUEST; in interface_get_command()
665 ext->flags = qxl->cmdflags; in interface_get_command()
671 qxl->guest_primary.commands++; in interface_get_command()
674 trace_qxl_ring_command_get(qxl->id, qxl_mode_to_string(qxl->mode)); in interface_get_command()
687 trace_qxl_ring_command_req_notification(qxl->id); in interface_req_cmd_notification()
688 switch (qxl->mode) { in interface_req_cmd_notification()
692 SPICE_RING_CONS_WAIT(&qxl->ram->cmd_ring, wait); in interface_req_cmd_notification()
705 QXLReleaseRing *ring = &d->ram->release_ring; in qxl_push_free_res()
711 if (ring->prod - ring->cons + 1 == ring->num_items) { in qxl_push_free_res()
712 /* ring full -- can't push */ in qxl_push_free_res()
715 if (!flush && d->oom_running) { in qxl_push_free_res()
719 if (!flush && d->num_free_res < QXL_FREE_BUNCH_SIZE) { in qxl_push_free_res()
725 trace_qxl_ring_res_push(d->id, qxl_mode_to_string(d->mode), in qxl_push_free_res()
726 d->guest_surfaces.count, d->num_free_res, in qxl_push_free_res()
727 d->last_release, notify ? "yes" : "no"); in qxl_push_free_res()
728 trace_qxl_ring_res_push_rest(d->id, ring->prod - ring->cons, in qxl_push_free_res()
729 ring->num_items, ring->prod, ring->cons); in qxl_push_free_res()
734 ring = &d->ram->release_ring; in qxl_push_free_res()
735 prod = ring->prod & SPICE_RING_INDEX_MASK(ring); in qxl_push_free_res()
736 if (prod >= ARRAY_SIZE(ring->items)) { in qxl_push_free_res()
738 "%u >= %zu", prod, ARRAY_SIZE(ring->items)); in qxl_push_free_res()
741 ring->items[prod].el = 0; in qxl_push_free_res()
742 d->num_free_res = 0; in qxl_push_free_res()
743 d->last_release = NULL; in qxl_push_free_res()
760 /* host group -> vga mode update request */ in interface_release_resource()
761 QXLCommandExt *cmdext = (void *)(intptr_t)(ext.info->id); in interface_release_resource()
763 g_assert(cmdext->cmd.type == QXL_CMD_DRAW); in interface_release_resource()
765 qemu_spice_destroy_update(&qxl->ssd, update); in interface_release_resource()
770 * ext->info points into guest-visible memory in interface_release_resource()
773 ring = &qxl->ram->release_ring; in interface_release_resource()
774 prod = ring->prod & SPICE_RING_INDEX_MASK(ring); in interface_release_resource()
775 if (prod >= ARRAY_SIZE(ring->items)) { in interface_release_resource()
777 "%u >= %zu", prod, ARRAY_SIZE(ring->items)); in interface_release_resource()
780 if (ring->items[prod].el == 0) { in interface_release_resource()
782 id = ext.info->id; in interface_release_resource()
783 ext.info->next = 0; in interface_release_resource()
784 qxl_ram_set_dirty(qxl, &ext.info->next); in interface_release_resource()
785 ring->items[prod].el = id; in interface_release_resource()
789 qxl->last_release->next = ext.info->id; in interface_release_resource()
790 qxl_ram_set_dirty(qxl, &qxl->last_release->next); in interface_release_resource()
791 ext.info->next = 0; in interface_release_resource()
792 qxl_ram_set_dirty(qxl, &ext.info->next); in interface_release_resource()
794 qxl->last_release = ext.info; in interface_release_resource()
795 qxl->num_free_res++; in interface_release_resource()
796 trace_qxl_ring_res_put(qxl->id, qxl->num_free_res); in interface_release_resource()
808 trace_qxl_ring_cursor_check(qxl->id, qxl_mode_to_string(qxl->mode)); in interface_get_cursor_command()
810 switch (qxl->mode) { in interface_get_cursor_command()
814 ring = &qxl->ram->cursor_ring; in interface_get_cursor_command()
822 ext->cmd = *cmd; in interface_get_cursor_command()
823 ext->group_id = MEMSLOT_GROUP_GUEST; in interface_get_cursor_command()
824 ext->flags = qxl->cmdflags; in interface_get_cursor_command()
830 qxl->guest_primary.commands++; in interface_get_cursor_command()
833 if (qxl->have_vga) { in interface_get_cursor_command()
836 trace_qxl_ring_cursor_get(qxl->id, qxl_mode_to_string(qxl->mode)); in interface_get_cursor_command()
849 trace_qxl_ring_cursor_req_notification(qxl->id); in interface_req_cursor_notification()
850 switch (qxl->mode) { in interface_req_cursor_notification()
854 SPICE_RING_CONS_WAIT(&qxl->ram->cursor_ring, wait); in interface_req_cursor_notification()
868 * Called by spice-server as a result of a QXL_CMD_UPDATE which is not in in interface_notify_update()
869 * use by xf86-video-qxl and is defined out in the qxl windows driver. in interface_notify_update()
882 ret = qxl->num_free_res; in interface_flush_resources()
896 qemu_mutex_lock(&qxl->async_lock); in interface_async_complete_io()
897 current_async = qxl->current_async; in interface_async_complete_io()
898 qxl->current_async = QXL_UNDEFINED_IO; in interface_async_complete_io()
899 qemu_mutex_unlock(&qxl->async_lock); in interface_async_complete_io()
901 trace_qxl_interface_async_complete_io(qxl->id, current_async, cookie); in interface_async_complete_io()
906 if (cookie && current_async != cookie->io) { in interface_async_complete_io()
909 PRId64 " = cookie->io\n", __func__, current_async, cookie->io); in interface_async_complete_io()
925 qxl_spice_destroy_surface_wait_complete(qxl, cookie->u.surface_id); in interface_async_complete_io()
943 QEMU_LOCK_GUARD(&qxl->ssd.lock); in interface_update_area_complete()
945 !qxl->render_update_cookie_num) { in interface_update_area_complete()
948 trace_qxl_interface_update_area_complete(qxl->id, surface_id, dirty->left, in interface_update_area_complete()
949 dirty->right, dirty->top, dirty->bottom); in interface_update_area_complete()
950 trace_qxl_interface_update_area_complete_rest(qxl->id, num_updated_rects); in interface_update_area_complete()
951 if (qxl->num_dirty_rects + num_updated_rects > QXL_NUM_DIRTY_RECTS) { in interface_update_area_complete()
953 * overflow - treat this as a full update. Not expected to be common. in interface_update_area_complete()
955 trace_qxl_interface_update_area_complete_overflow(qxl->id, in interface_update_area_complete()
957 qxl->guest_primary.resized = 1; in interface_update_area_complete()
959 if (qxl->guest_primary.resized) { in interface_update_area_complete()
966 qxl_i = qxl->num_dirty_rects; in interface_update_area_complete()
968 qxl->dirty[qxl_i++] = dirty[i]; in interface_update_area_complete()
970 qxl->num_dirty_rects += num_updated_rects; in interface_update_area_complete()
971 trace_qxl_interface_update_area_complete_schedule_bh(qxl->id, in interface_update_area_complete()
972 qxl->num_dirty_rects); in interface_update_area_complete()
973 qemu_bh_schedule(qxl->update_area_bh); in interface_update_area_complete()
982 switch (cookie->type) { in interface_async_complete()
994 __func__, cookie->type); in interface_async_complete()
1006 if (qxl->revision < 4) { in interface_set_client_capabilities()
1007 trace_qxl_set_client_capabilities_unsupported_by_revision(qxl->id, in interface_set_client_capabilities()
1008 qxl->revision); in interface_set_client_capabilities()
1018 qxl->shadow_rom.client_present = client_present; in interface_set_client_capabilities()
1019 memcpy(qxl->shadow_rom.client_capabilities, caps, in interface_set_client_capabilities()
1020 sizeof(qxl->shadow_rom.client_capabilities)); in interface_set_client_capabilities()
1021 qxl->rom->client_present = client_present; in interface_set_client_capabilities()
1022 memcpy(qxl->rom->client_capabilities, caps, in interface_set_client_capabilities()
1023 sizeof(qxl->rom->client_capabilities)); in interface_set_client_capabilities()
1036 monitors_count = MIN(monitors_config->num_of_monitors, max_outputs); in qxl_rom_monitors_config_changed()
1038 if (rom->client_monitors_config.count != monitors_count) { in qxl_rom_monitors_config_changed()
1042 for (i = 0 ; i < rom->client_monitors_config.count ; ++i) { in qxl_rom_monitors_config_changed()
1043 VDAgentMonConfig *monitor = &monitors_config->monitors[i]; in qxl_rom_monitors_config_changed()
1044 QXLURect *rect = &rom->client_monitors_config.heads[i]; in qxl_rom_monitors_config_changed()
1045 /* monitor->depth ignored */ in qxl_rom_monitors_config_changed()
1046 if ((rect->left != monitor->x) || in qxl_rom_monitors_config_changed()
1047 (rect->top != monitor->y) || in qxl_rom_monitors_config_changed()
1048 (rect->right != monitor->x + monitor->width) || in qxl_rom_monitors_config_changed()
1049 (rect->bottom != monitor->y + monitor->height)) { in qxl_rom_monitors_config_changed()
1062 QXLRom *rom = memory_region_get_ram_ptr(&qxl->rom_bar); in interface_client_monitors_config()
1064 unsigned max_outputs = ARRAY_SIZE(rom->client_monitors_config.heads); in interface_client_monitors_config()
1067 if (qxl->revision < 4) { in interface_client_monitors_config()
1068 trace_qxl_client_monitors_config_unsupported_by_device(qxl->id, in interface_client_monitors_config()
1069 qxl->revision); in interface_client_monitors_config()
1078 if (qxl->ram->int_mask == 0 || qxl->ram->int_mask == ~0 || in interface_client_monitors_config()
1079 !(qxl->ram->int_mask & QXL_INTERRUPT_CLIENT_MONITORS_CONFIG)) { in interface_client_monitors_config()
1080 trace_qxl_client_monitors_config_unsupported_by_guest(qxl->id, in interface_client_monitors_config()
1081 qxl->ram->int_mask, in interface_client_monitors_config()
1090 if (qxl->max_outputs && qxl->max_outputs <= max_outputs) { in interface_client_monitors_config()
1091 max_outputs = qxl->max_outputs; in interface_client_monitors_config()
1098 memset(&rom->client_monitors_config, 0, in interface_client_monitors_config()
1099 sizeof(rom->client_monitors_config)); in interface_client_monitors_config()
1100 rom->client_monitors_config.count = monitors_config->num_of_monitors; in interface_client_monitors_config()
1101 /* monitors_config->flags ignored */ in interface_client_monitors_config()
1102 if (rom->client_monitors_config.count >= max_outputs) { in interface_client_monitors_config()
1103 trace_qxl_client_monitors_config_capped(qxl->id, in interface_client_monitors_config()
1104 monitors_config->num_of_monitors, in interface_client_monitors_config()
1106 rom->client_monitors_config.count = max_outputs; in interface_client_monitors_config()
1108 for (i = 0 ; i < rom->client_monitors_config.count ; ++i) { in interface_client_monitors_config()
1109 VDAgentMonConfig *monitor = &monitors_config->monitors[i]; in interface_client_monitors_config()
1110 QXLURect *rect = &rom->client_monitors_config.heads[i]; in interface_client_monitors_config()
1111 /* monitor->depth ignored */ in interface_client_monitors_config()
1112 rect->left = monitor->x; in interface_client_monitors_config()
1113 rect->top = monitor->y; in interface_client_monitors_config()
1114 rect->right = monitor->x + monitor->width; in interface_client_monitors_config()
1115 rect->bottom = monitor->y + monitor->height; in interface_client_monitors_config()
1117 rom->client_monitors_config_crc = qxl_crc32( in interface_client_monitors_config()
1118 (const uint8_t *)&rom->client_monitors_config, in interface_client_monitors_config()
1119 sizeof(rom->client_monitors_config)); in interface_client_monitors_config()
1120 trace_qxl_client_monitors_config_crc(qxl->id, in interface_client_monitors_config()
1121 sizeof(rom->client_monitors_config), in interface_client_monitors_config()
1122 rom->client_monitors_config_crc); in interface_client_monitors_config()
1124 trace_qxl_interrupt_client_monitors_config(qxl->id, in interface_client_monitors_config()
1125 rom->client_monitors_config.count, in interface_client_monitors_config()
1126 rom->client_monitors_config.heads); in interface_client_monitors_config()
1169 if (d->mode == QXL_MODE_VGA) { in qxl_enter_vga_mode()
1172 trace_qxl_enter_vga_mode(d->id); in qxl_enter_vga_mode()
1173 spice_qxl_driver_unload(&d->ssd.qxl); in qxl_enter_vga_mode()
1174 graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); in qxl_enter_vga_mode()
1175 update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); in qxl_enter_vga_mode()
1176 qemu_spice_create_host_primary(&d->ssd); in qxl_enter_vga_mode()
1177 d->mode = QXL_MODE_VGA; in qxl_enter_vga_mode()
1178 qemu_spice_display_switch(&d->ssd, d->ssd.ds); in qxl_enter_vga_mode()
1179 vga_dirty_log_start(&d->vga); in qxl_enter_vga_mode()
1180 graphic_hw_update(d->vga.con); in qxl_enter_vga_mode()
1185 if (d->mode != QXL_MODE_VGA) { in qxl_exit_vga_mode()
1188 trace_qxl_exit_vga_mode(d->id); in qxl_exit_vga_mode()
1189 graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); in qxl_exit_vga_mode()
1190 update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); in qxl_exit_vga_mode()
1191 vga_dirty_log_stop(&d->vga); in qxl_exit_vga_mode()
1197 uint32_t pending = le32_to_cpu(d->ram->int_pending); in qxl_update_irq()
1198 uint32_t mask = le32_to_cpu(d->ram->int_mask); in qxl_update_irq()
1200 pci_set_irq(&d->pci, level); in qxl_update_irq()
1206 QXLRam *ram = d->ram; in qxl_check_state()
1207 int spice_display_running = qemu_spice_display_is_running(&d->ssd); in qxl_check_state()
1209 assert(!spice_display_running || SPICE_RING_IS_EMPTY(&ram->cmd_ring)); in qxl_check_state()
1210 assert(!spice_display_running || SPICE_RING_IS_EMPTY(&ram->cursor_ring)); in qxl_check_state()
1215 QXLRom *rom = d->rom; in qxl_reset_state()
1222 d->shadow_rom.update_id = cpu_to_le32(0); in qxl_reset_state()
1223 *rom = d->shadow_rom; in qxl_reset_state()
1226 d->num_free_res = 0; in qxl_reset_state()
1227 d->last_release = NULL; in qxl_reset_state()
1228 memset(&d->ssd.dirty, 0, sizeof(d->ssd.dirty)); in qxl_reset_state()
1234 trace_qxl_soft_reset(d->id); in qxl_soft_reset()
1237 qemu_mutex_lock(&d->async_lock); in qxl_soft_reset()
1238 d->current_async = QXL_UNDEFINED_IO; in qxl_soft_reset()
1239 qemu_mutex_unlock(&d->async_lock); in qxl_soft_reset()
1241 if (d->have_vga) { in qxl_soft_reset()
1244 d->mode = QXL_MODE_UNDEFINED; in qxl_soft_reset()
1250 bool startstop = qemu_spice_display_is_running(&d->ssd); in qxl_hard_reset()
1252 trace_qxl_hard_reset(d->id, loadvm); in qxl_hard_reset()
1269 qemu_spice_create_host_memslot(&d->ssd); in qxl_hard_reset()
1289 trace_qxl_io_write_vga(qxl->id, qxl_mode_to_string(qxl->mode), addr, val); in qxl_vga_ioport_write()
1290 if (qxl->mode != QXL_MODE_VGA && in qxl_vga_ioport_write()
1291 qxl->revision <= QXL_REVISION_STABLE_V12) { in qxl_vga_ioport_write()
1322 int pci_region = -1; in qxl_add_memslot()
1330 guest_start = le64_to_cpu(d->guest_slots[slot_id].slot.mem_start); in qxl_add_memslot()
1331 guest_end = le64_to_cpu(d->guest_slots[slot_id].slot.mem_end); in qxl_add_memslot()
1333 trace_qxl_memslot_add_guest(d->id, slot_id, guest_start, guest_end); in qxl_add_memslot()
1348 pci_start = d->pci.io_regions[pci_region].addr; in qxl_add_memslot()
1349 pci_end = pci_start + d->pci.io_regions[pci_region].size; in qxl_add_memslot()
1351 if (pci_start == -1) { in qxl_add_memslot()
1372 mr = &d->vga.vram; in qxl_add_memslot()
1376 mr = &d->vram_bar; in qxl_add_memslot()
1383 assert(guest_end - pci_start <= memory_region_size(mr)); in qxl_add_memslot()
1388 memslot.virt_start = virt_start + (guest_start - pci_start); in qxl_add_memslot()
1389 memslot.virt_end = virt_start + (guest_end - pci_start); in qxl_add_memslot()
1390 memslot.addr_delta = memslot.virt_start - delta; in qxl_add_memslot()
1392 d->rom->slot_generation = 0; in qxl_add_memslot()
1395 memslot.generation = d->rom->slot_generation; in qxl_add_memslot()
1397 qemu_spice_add_memslot(&d->ssd, &memslot, async); in qxl_add_memslot()
1398 d->guest_slots[slot_id].mr = mr; in qxl_add_memslot()
1399 d->guest_slots[slot_id].offset = memslot.virt_start - virt_start; in qxl_add_memslot()
1400 d->guest_slots[slot_id].size = memslot.virt_end - memslot.virt_start; in qxl_add_memslot()
1401 d->guest_slots[slot_id].delta = delta; in qxl_add_memslot()
1402 d->guest_slots[slot_id].active = 1; in qxl_add_memslot()
1408 qemu_spice_del_memslot(&d->ssd, MEMSLOT_GROUP_HOST, slot_id); in qxl_del_memslot()
1409 d->guest_slots[slot_id].active = 0; in qxl_del_memslot()
1415 memset(&d->guest_slots, 0, sizeof(d->guest_slots)); in qxl_reset_memslots()
1420 trace_qxl_reset_surfaces(d->id); in qxl_reset_surfaces()
1421 d->mode = QXL_MODE_UNDEFINED; in qxl_reset_surfaces()
1431 uint32_t slot = (phys >> (64 - 8)) & 0xff; in qxl_get_check_slot_offset()
1440 if (!qxl->guest_slots[slot].active) { in qxl_get_check_slot_offset()
1444 if (offset < qxl->guest_slots[slot].delta) { in qxl_get_check_slot_offset()
1447 slot, offset, qxl->guest_slots[slot].delta); in qxl_get_check_slot_offset()
1450 offset -= qxl->guest_slots[slot].delta; in qxl_get_check_slot_offset()
1451 if (offset > qxl->guest_slots[slot].size) { in qxl_get_check_slot_offset()
1454 slot, offset, qxl->guest_slots[slot].size); in qxl_get_check_slot_offset()
1457 size_available = memory_region_size(qxl->guest_slots[slot].mr); in qxl_get_check_slot_offset()
1458 if (qxl->guest_slots[slot].offset + offset >= size_available) { in qxl_get_check_slot_offset()
1461 slot, qxl->guest_slots[slot].offset + offset, in qxl_get_check_slot_offset()
1465 size_available -= qxl->guest_slots[slot].offset + offset; in qxl_get_check_slot_offset()
1471 size_requested - size_available); in qxl_get_check_slot_offset()
1496 ptr = memory_region_get_ram_ptr(qxl->guest_slots[slot].mr); in qxl_phys2virt()
1497 ptr += qxl->guest_slots[slot].offset; in qxl_phys2virt()
1514 QXLSurfaceCreate *sc = &qxl->guest_primary.surface; in qxl_create_guest_primary()
1515 uint32_t requested_height = le32_to_cpu(sc->height); in qxl_create_guest_primary()
1516 int requested_stride = le32_to_cpu(sc->stride); in qxl_create_guest_primary()
1520 > qxl->vgamem_size) { in qxl_create_guest_primary()
1524 qxl->vgamem_size); in qxl_create_guest_primary()
1528 if (qxl->mode == QXL_MODE_NATIVE) { in qxl_create_guest_primary()
1534 surface.format = le32_to_cpu(sc->format); in qxl_create_guest_primary()
1535 surface.height = le32_to_cpu(sc->height); in qxl_create_guest_primary()
1536 surface.mem = le64_to_cpu(sc->mem); in qxl_create_guest_primary()
1537 surface.position = le32_to_cpu(sc->position); in qxl_create_guest_primary()
1538 surface.stride = le32_to_cpu(sc->stride); in qxl_create_guest_primary()
1539 surface.width = le32_to_cpu(sc->width); in qxl_create_guest_primary()
1540 surface.type = le32_to_cpu(sc->type); in qxl_create_guest_primary()
1541 surface.flags = le32_to_cpu(sc->flags); in qxl_create_guest_primary()
1542 trace_qxl_create_guest_primary(qxl->id, sc->width, sc->height, sc->mem, in qxl_create_guest_primary()
1543 sc->format, sc->position); in qxl_create_guest_primary()
1544 trace_qxl_create_guest_primary_rest(qxl->id, sc->stride, sc->type, in qxl_create_guest_primary()
1545 sc->flags); in qxl_create_guest_primary()
1559 qxl->mode = QXL_MODE_NATIVE; in qxl_create_guest_primary()
1560 qxl->cmdflags = 0; in qxl_create_guest_primary()
1561 qemu_spice_create_primary_surface(&qxl->ssd, 0, &surface, async); in qxl_create_guest_primary()
1572 if (d->mode == QXL_MODE_UNDEFINED) { in qxl_destroy_primary()
1575 trace_qxl_destroy_primary(d->id); in qxl_destroy_primary()
1576 d->mode = QXL_MODE_UNDEFINED; in qxl_destroy_primary()
1577 qemu_spice_destroy_primary_surface(&d->ssd, 0, async); in qxl_destroy_primary()
1584 pcibus_t start = d->pci.io_regions[QXL_RAM_RANGE_INDEX].addr; in qxl_set_mode()
1585 pcibus_t end = d->pci.io_regions[QXL_RAM_RANGE_INDEX].size + start; in qxl_set_mode()
1586 QXLMode *mode = d->modes->modes + modenr; in qxl_set_mode()
1587 uint64_t devmem = d->pci.io_regions[QXL_RAM_RANGE_INDEX].addr; in qxl_set_mode()
1593 if (modenr >= d->modes->n_modes) { in qxl_set_mode()
1599 .width = mode->x_res, in qxl_set_mode()
1600 .height = mode->y_res, in qxl_set_mode()
1601 .stride = -mode->x_res * 4, in qxl_set_mode()
1605 .mem = devmem + d->shadow_rom.draw_area_offset, in qxl_set_mode()
1608 trace_qxl_set_mode(d->id, modenr, mode->x_res, mode->y_res, mode->bits, in qxl_set_mode()
1614 d->guest_slots[0].slot = slot; in qxl_set_mode()
1620 d->guest_primary.surface = surface; in qxl_set_mode()
1623 d->mode = QXL_MODE_COMPAT; in qxl_set_mode()
1624 d->cmdflags = QXL_COMMAND_FLAG_COMPAT; in qxl_set_mode()
1625 if (mode->bits == 16) { in qxl_set_mode()
1626 d->cmdflags |= QXL_COMMAND_FLAG_COMPAT_16BPP; in qxl_set_mode()
1628 d->shadow_rom.mode = cpu_to_le32(modenr); in qxl_set_mode()
1629 d->rom->mode = cpu_to_le32(modenr); in qxl_set_mode()
1641 if (d->guest_bug && io_port != QXL_IO_RESET) {
1645 if (d->revision <= QXL_REVISION_STABLE_V10 &&
1648 io_port, d->revision);
1664 if (d->mode != QXL_MODE_VGA) {
1667 trace_qxl_io_unexpected_vga_mode(d->id,
1702 WITH_QEMU_LOCK_GUARD(&d->async_lock) {
1703 if (d->current_async != QXL_UNDEFINED_IO) {
1705 io_port, d->current_async);
1708 d->current_async = orig_io_port;
1714 trace_qxl_io_write(d->id, qxl_mode_to_string(d->mode),
1722 QXLRect update = d->ram->update_area;
1724 if (d->ram->update_surface > d->ssd.num_surfaces) {
1726 d->ram->update_surface);
1744 cookie->u.area = update;
1746 qxl_spice_update_area(d, d->ram->update_surface,
1747 cookie ? &cookie->u.area : &update,
1752 qemu_spice_wakeup(&d->ssd);
1755 qemu_spice_wakeup(&d->ssd);
1761 if (!SPICE_RING_IS_EMPTY(&d->ram->release_ring)) {
1764 d->oom_running = 1;
1766 d->oom_running = 0;
1780 if (trace_event_get_state_backends(TRACE_QXL_IO_LOG) || d->guestdebug) {
1782 /* We cannot trust the guest to NUL terminate d->ram->log_buf */
1783 char *log_buf = g_strndup((const char *)d->ram->log_buf,
1784 sizeof(d->ram->log_buf));
1785 trace_qxl_io_log(d->id, log_buf);
1786 if (d->guestdebug) {
1787 fprintf(stderr, "qxl/guest-%d: %" PRId64 ": %s", d->id,
1801 if (d->guest_slots[val].active) {
1806 d->guest_slots[val].slot = d->ram->mem_slot;
1822 d->guest_primary.surface = d->ram->create_surface;
1832 trace_qxl_io_destroy_primary_ignored(d->id,
1833 qxl_mode_to_string(d->mode));
1838 if (val >= d->ssd.num_surfaces) {
1846 QXLReleaseRing *ring = &d->ram->release_ring;
1847 if (ring->prod - ring->cons + 1 == ring->num_items) {
1850 ring->prod, ring->cons);
1859 d->mode = QXL_MODE_UNDEFINED;
1872 qemu_mutex_lock(&d->async_lock);
1873 d->current_async = QXL_UNDEFINED_IO;
1874 qemu_mutex_unlock(&d->async_lock);
1883 trace_qxl_io_read_unexpected(qxl->id);
1907 trace_qxl_send_events(d->id, events);
1908 if (!qemu_spice_display_is_running(&d->ssd)) {
1909 /* spice-server tracks guest running state and should not do this */
1910 fprintf(stderr, "%s: spice-server bug: guest stopped, ignoring\n",
1912 trace_qxl_send_events_vm_stopped(d->id, events);
1918 * thus warn that qatomic_fetch_or(&d->ram->int_pending, ...)
1920 * out-of-line call for it, which results in a link error since
1923 * In fact we set up d->ram in init_qxl_ram() so it always starts
1924 * at a 4K boundary, so we know that &d->ram->int_pending is
1938 old_pending = qatomic_fetch_or(ALIGNED_UINT32_PTR(&d->ram->int_pending),
1943 qemu_bh_schedule(d->update_irq);
1965 trace_qxl_surfaces_dirty(qxl->id, offset, size);
1966 qxl_set_dirty(qxl->guest_slots[slot].mr,
1967 qxl->guest_slots[slot].offset + offset,
1968 qxl->guest_slots[slot].offset + offset + size);
1975 if (qxl->mode != QXL_MODE_NATIVE && qxl->mode != QXL_MODE_COMPAT) {
1980 qxl_dirty_one_surface(qxl, qxl->guest_primary.surface.mem,
1981 qxl->guest_primary.surface.height,
1982 qxl->guest_primary.surface.stride);
1984 /* dirty the off-screen surfaces */
1985 for (i = 0; i < qxl->ssd.num_surfaces; i++) {
1988 if (qxl->guest_surfaces.cmds[i] == 0) {
1992 cmd = qxl_phys2virt(qxl, qxl->guest_surfaces.cmds[i],
1995 assert(cmd->type == QXL_SURFACE_CMD_CREATE);
1996 qxl_dirty_one_surface(qxl, cmd->u.surface_create.data,
1997 cmd->u.surface_create.height,
1998 cmd->u.surface_create.stride);
2027 if (qxl->mode == QXL_MODE_VGA) {
2028 qemu_spice_display_update(&qxl->ssd, x, y, w, h);
2037 qxl->ssd.ds = surface;
2038 if (qxl->mode == QXL_MODE_VGA) {
2039 qemu_spice_display_switch(&qxl->ssd, surface);
2047 if (qxl->mode == QXL_MODE_VGA) {
2048 qemu_spice_display_refresh(&qxl->ssd);
2062 if (qxl->vgamem_size_mb < 8) {
2063 qxl->vgamem_size_mb = 8;
2066 * less than vga_common_init()'s maximum on qxl->vga.vram_size (512 now).
2068 if (qxl->vgamem_size_mb > 256) {
2069 qxl->vgamem_size_mb = 256;
2071 qxl->vgamem_size = qxl->vgamem_size_mb * MiB;
2074 if (qxl->ram_size_mb != -1) {
2075 qxl->vga.vram_size = qxl->ram_size_mb * MiB;
2077 if (qxl->vga.vram_size < qxl->vgamem_size * 2) {
2078 qxl->vga.vram_size = qxl->vgamem_size * 2;
2082 if (qxl->vram32_size_mb != -1) {
2083 qxl->vram32_size = qxl->vram32_size_mb * MiB;
2085 if (qxl->vram32_size < 4096) {
2086 qxl->vram32_size = 4096;
2090 if (qxl->vram_size_mb != -1) {
2091 qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
2093 if (qxl->vram_size < qxl->vram32_size) {
2094 qxl->vram_size = qxl->vram32_size;
2097 if (qxl->revision == 1) {
2098 qxl->vram32_size = 4096;
2099 qxl->vram_size = 4096;
2101 qxl->vgamem_size = pow2ceil(qxl->vgamem_size);
2102 qxl->vga.vram_size = pow2ceil(qxl->vga.vram_size);
2103 qxl->vram32_size = pow2ceil(qxl->vram32_size);
2104 qxl->vram_size = pow2ceil(qxl->vram_size);
2109 uint8_t* config = qxl->pci.config;
2113 qemu_spice_display_init_common(&qxl->ssd);
2114 qxl->mode = QXL_MODE_UNDEFINED;
2115 qxl->num_memslots = NUM_MEMSLOTS;
2116 qemu_mutex_init(&qxl->track_lock);
2117 qemu_mutex_init(&qxl->async_lock);
2118 qxl->current_async = QXL_UNDEFINED_IO;
2119 qxl->guest_bug = 0;
2121 switch (qxl->revision) {
2122 case 1: /* spice 0.4 -- qxl-1 */
2126 case 2: /* spice 0.6 -- qxl-2 */
2130 case 3: /* qxl-3 */
2134 case 4: /* qxl-4 */
2138 case 5: /* qxl-5 */
2144 qxl->revision, QXL_DEFAULT_REVISION);
2151 qxl->rom_size = qxl_rom_size();
2152 memory_region_init_rom(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
2153 qxl->rom_size, &error_fatal);
2157 qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
2158 memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
2159 qxl->vram_size, &error_fatal);
2160 memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
2161 &qxl->vram_bar, 0, qxl->vram32_size);
2163 memory_region_init_io(&qxl->io_bar, OBJECT(qxl), &qxl_io_ops, qxl,
2164 "qxl-ioports", io_size);
2165 if (qxl->have_vga) {
2166 vga_dirty_log_start(&qxl->vga);
2168 memory_region_set_flush_coalesced(&qxl->io_bar);
2171 pci_register_bar(&qxl->pci, QXL_IO_RANGE_INDEX,
2172 PCI_BASE_ADDRESS_SPACE_IO, &qxl->io_bar);
2174 pci_register_bar(&qxl->pci, QXL_ROM_RANGE_INDEX,
2175 PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->rom_bar);
2177 pci_register_bar(&qxl->pci, QXL_RAM_RANGE_INDEX,
2178 PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vga.vram);
2180 pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX,
2181 PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar);
2183 if (qxl->vram32_size < qxl->vram_size) {
2188 pci_register_bar(&qxl->pci, QXL_VRAM64_RANGE_INDEX,
2192 &qxl->vram_bar);
2197 qxl->have_vga ? "pri" : "sec", qxl->vga.vram_size / MiB);
2199 qxl->vram32_size / MiB);
2201 qxl->vram_size / MiB,
2202 qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
2204 qxl->ssd.qxl.base.sif = &qxl_interface.base;
2205 if (qemu_spice_add_display_interface(&qxl->ssd.qxl, qxl->vga.con) != 0) {
2206 error_setg(errp, "qxl interface %d.%d not supported by spice-server",
2214 if (qemu_console_fill_device_address(qxl->vga.con,
2217 spice_qxl_set_device_info(&qxl->ssd.qxl,
2220 qxl->max_outputs);
2228 qxl->update_irq = qemu_bh_new_guarded(qxl_update_irq_bh, qxl,
2229 &DEVICE(qxl)->mem_reentrancy_guard);
2232 qxl->update_area_bh = qemu_bh_new_guarded(qxl_render_update_area_bh, qxl,
2233 &DEVICE(qxl)->mem_reentrancy_guard);
2234 qxl->ssd.cursor_bh = qemu_bh_new_guarded(qemu_spice_cursor_refresh_bh, &qxl->ssd,
2235 &DEVICE(qxl)->mem_reentrancy_guard);
2241 VGACommonState *vga = &qxl->vga;
2245 vga->vbe_size = qxl->vgamem_size;
2246 vga->vram_size_mb = qxl->vga.vram_size / MiB;
2254 portio_list_init(&qxl->vga_port_list, OBJECT(dev), qxl_vga_portio_list,
2256 portio_list_set_flush_coalesced(&qxl->vga_port_list);
2257 portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0);
2258 qxl->have_vga = true;
2260 vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl);
2261 qxl->id = qemu_console_get_index(vga->con); /* == channel_id */
2262 if (qxl->id != 0) {
2263 error_setg(errp, "primary qxl-vga device must be console 0 "
2274 qxl->ssd.dcl.ops = &display_listener_ops;
2275 qxl->ssd.dcl.con = vga->con;
2276 register_displaychangelistener(&qxl->ssd.dcl);
2284 memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram",
2285 qxl->vga.vram_size, &error_fatal);
2286 qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
2287 qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl);
2288 qxl->ssd.dcl.con = qxl->vga.con;
2289 qxl->id = qemu_console_get_index(qxl->vga.con); /* == channel_id */
2297 uint8_t *ram_start = d->vga.vram_ptr;
2299 trace_qxl_pre_save(d->id);
2300 if (d->last_release == NULL) {
2301 d->last_release_offset = 0;
2303 d->last_release_offset = (uint8_t *)d->last_release - ram_start;
2305 if (d->last_release_offset >= d->vga.vram_size) {
2316 trace_qxl_pre_load(d->id);
2327 if (!d->guest_slots[i].active) {
2337 uint8_t *ram_start = d->vga.vram_ptr;
2341 assert(d->last_release_offset < d->vga.vram_size);
2342 if (d->last_release_offset == 0) {
2343 d->last_release = NULL;
2345 d->last_release = (QXLReleaseInfo *)(ram_start + d->last_release_offset);
2348 d->modes = (QXLModes*)((uint8_t*)d->rom + d->rom->modes_offset);
2350 trace_qxl_post_load(d->id, qxl_mode_to_string(d->mode));
2351 newmode = d->mode;
2352 d->mode = QXL_MODE_UNDEFINED;
2366 /* replay surface-create and cursor-set commands */
2367 cmds = g_new0(QXLCommandExt, d->ssd.num_surfaces + 1);
2368 for (in = 0, out = 0; in < d->ssd.num_surfaces; in++) {
2369 if (d->guest_surfaces.cmds[in] == 0) {
2372 cmds[out].cmd.data = d->guest_surfaces.cmds[in];
2377 if (d->guest_cursor) {
2378 cmds[out].cmd.data = d->guest_cursor;
2385 if (d->guest_monitors_config) {
2392 qxl_set_mode(d, d->shadow_rom.mode, 1);
2404 return qxl->guest_monitors_config != 0;
2409 .name = "qxl-memslot",
2421 .name = "qxl-surface",
2439 .name = "qxl/monitors-config",
2490 DEFINE_PROP_UINT32("ram_size_mb", PCIQXLDevice, ram_size_mb, -1),
2491 DEFINE_PROP_UINT32("vram_size_mb", PCIQXLDevice, vram32_size_mb, -1),
2492 DEFINE_PROP_UINT32("vram64_size_mb", PCIQXLDevice, vram_size_mb, -1),
2498 DEFINE_PROP_BOOL("global-vmstate", PCIQXLDevice, vga.global_vmstate, false),
2506 k->vendor_id = REDHAT_PCI_VENDOR_ID;
2507 k->device_id = QXL_DEVICE_ID_STABLE;
2508 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
2510 dc->vmsd = &qxl_vmstate;
2531 k->realize = qxl_realize_primary;
2532 k->romfile = "vgabios-qxl.bin";
2533 k->class_id = PCI_CLASS_DISPLAY_VGA;
2534 dc->desc = "Spice QXL GPU (primary, vga compatible)";
2535 dc->hotpluggable = false;
2539 .name = "qxl-vga",
2543 module_obj("qxl-vga");
2551 k->realize = qxl_realize_secondary;
2552 k->class_id = PCI_CLASS_DISPLAY_OTHER;
2553 dc->desc = "Spice QXL GPU (secondary)";
2572 module_dep("ui-spice-core");