Lines Matching +full:ports +full:- +full:block +full:- +full:group +full:- +full:count
7 * COPYING file in the top-level directory.
19 #include "hw/pci-bridge/cxl_upstream_port.h"
54 * payload from cmd->payload and operating upon it as necessary. It must then
55 * fill the output data into cmd->payload (overwriting what was there),
122 /* CCI Message Format CXL r3.1 Figure 7-19 */
162 if (cmd->in < sizeof(*in)) { in cmd_tunnel_management_cmd()
171 /* Enough room for minimum sized message - no payload */ in cmd_tunnel_management_cmd()
172 if (in->size < sizeof(in->ccimessage)) { in cmd_tunnel_management_cmd()
175 /* Length of input payload should be in->size + a wrapping tunnel header */ in cmd_tunnel_management_cmd()
176 if (in->size != len_in - offsetof(typeof(*out), ccimessage)) { in cmd_tunnel_management_cmd()
179 if (in->ccimessage.category != CXL_CCI_CAT_REQ) { in cmd_tunnel_management_cmd()
183 if (in->target_type != 0) { in cmd_tunnel_management_cmd()
185 "Tunneled Command sent to non existent FM-LD"); in cmd_tunnel_management_cmd()
196 if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cmd_tunnel_management_cmd()
197 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_tunnel_management_cmd()
198 if (in->port_or_ld_id != 0) { in cmd_tunnel_management_cmd()
202 target_cci = &ct3d->ld0_cci; in cmd_tunnel_management_cmd()
203 } else if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_USP)) { in cmd_tunnel_management_cmd()
204 CXLUpstreamPort *usp = CXL_USP(cci->d); in cmd_tunnel_management_cmd()
206 tunnel_target = pcie_find_port_by_pn(&PCI_BRIDGE(usp)->sec_bus, in cmd_tunnel_management_cmd()
207 in->port_or_ld_id); in cmd_tunnel_management_cmd()
212 pci_bridge_get_sec_bus(PCI_BRIDGE(tunnel_target))->devices[0]; in cmd_tunnel_management_cmd()
219 target_cci = &ct3d->vdm_fm_owned_ld_mctp_cci; in cmd_tunnel_management_cmd()
227 pl_length = in->ccimessage.pl_length[2] << 16 | in cmd_tunnel_management_cmd()
228 in->ccimessage.pl_length[1] << 8 | in->ccimessage.pl_length[0]; in cmd_tunnel_management_cmd()
230 in->ccimessage.command_set, in cmd_tunnel_management_cmd()
231 in->ccimessage.command, in cmd_tunnel_management_cmd()
232 pl_length, in->ccimessage.payload, in cmd_tunnel_management_cmd()
233 &length_out, out->ccimessage.payload, in cmd_tunnel_management_cmd()
236 out->resp_len = length_out + sizeof(CXLCCIMessage); in cmd_tunnel_management_cmd()
237 st24_le_p(out->ccimessage.pl_length, length_out); in cmd_tunnel_management_cmd()
238 out->ccimessage.rc = rc; in cmd_tunnel_management_cmd()
239 out->ccimessage.category = CXL_CCI_CAT_RSP; in cmd_tunnel_management_cmd()
240 out->ccimessage.command = in->ccimessage.command; in cmd_tunnel_management_cmd()
241 out->ccimessage.command_set = in->ccimessage.command_set; in cmd_tunnel_management_cmd()
242 out->ccimessage.tag = in->ccimessage.tag; in cmd_tunnel_management_cmd()
253 CXLDeviceState *cxlds = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_events_get_records()
258 if (cmd->in < sizeof(log_type)) { in cmd_events_get_records()
266 max_recs = (cxlds->payload_size - CXL_EVENT_PAYLOAD_HDR_SIZE) / in cmd_events_get_records()
282 CXLDeviceState *cxlds = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_events_clear_records()
288 len_in < sizeof(*pl) + sizeof(*pl->handle) * pl->nr_recs) { in cmd_events_clear_records()
303 CXLDeviceState *cxlds = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_events_get_interrupt_policy()
309 log = &cxlds->event_logs[CXL_EVENT_TYPE_INFO]; in cmd_events_get_interrupt_policy()
310 if (log->irq_enabled) { in cmd_events_get_interrupt_policy()
311 policy->info_settings = CXL_EVENT_INT_SETTING(log->irq_vec); in cmd_events_get_interrupt_policy()
314 log = &cxlds->event_logs[CXL_EVENT_TYPE_WARN]; in cmd_events_get_interrupt_policy()
315 if (log->irq_enabled) { in cmd_events_get_interrupt_policy()
316 policy->warn_settings = CXL_EVENT_INT_SETTING(log->irq_vec); in cmd_events_get_interrupt_policy()
319 log = &cxlds->event_logs[CXL_EVENT_TYPE_FAIL]; in cmd_events_get_interrupt_policy()
320 if (log->irq_enabled) { in cmd_events_get_interrupt_policy()
321 policy->failure_settings = CXL_EVENT_INT_SETTING(log->irq_vec); in cmd_events_get_interrupt_policy()
324 log = &cxlds->event_logs[CXL_EVENT_TYPE_FATAL]; in cmd_events_get_interrupt_policy()
325 if (log->irq_enabled) { in cmd_events_get_interrupt_policy()
326 policy->fatal_settings = CXL_EVENT_INT_SETTING(log->irq_vec); in cmd_events_get_interrupt_policy()
329 log = &cxlds->event_logs[CXL_EVENT_TYPE_DYNAMIC_CAP]; in cmd_events_get_interrupt_policy()
330 if (log->irq_enabled) { in cmd_events_get_interrupt_policy()
332 policy->dyn_cap_settings = CXL_INT_MSI_MSIX; in cmd_events_get_interrupt_policy()
346 CXLDeviceState *cxlds = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_events_set_interrupt_policy()
356 log = &cxlds->event_logs[CXL_EVENT_TYPE_INFO]; in cmd_events_set_interrupt_policy()
357 log->irq_enabled = (policy->info_settings & CXL_EVENT_INT_MODE_MASK) == in cmd_events_set_interrupt_policy()
360 log = &cxlds->event_logs[CXL_EVENT_TYPE_WARN]; in cmd_events_set_interrupt_policy()
361 log->irq_enabled = (policy->warn_settings & CXL_EVENT_INT_MODE_MASK) == in cmd_events_set_interrupt_policy()
364 log = &cxlds->event_logs[CXL_EVENT_TYPE_FAIL]; in cmd_events_set_interrupt_policy()
365 log->irq_enabled = (policy->failure_settings & CXL_EVENT_INT_MODE_MASK) == in cmd_events_set_interrupt_policy()
368 log = &cxlds->event_logs[CXL_EVENT_TYPE_FATAL]; in cmd_events_set_interrupt_policy()
369 log->irq_enabled = (policy->fatal_settings & CXL_EVENT_INT_MODE_MASK) == in cmd_events_set_interrupt_policy()
377 log = &cxlds->event_logs[CXL_EVENT_TYPE_DYNAMIC_CAP]; in cmd_events_set_interrupt_policy()
378 log->irq_enabled = (policy->dyn_cap_settings & CXL_EVENT_INT_MODE_MASK) == in cmd_events_set_interrupt_policy()
393 PCIDeviceClass *class = PCI_DEVICE_GET_CLASS(cci->d); in cmd_infostat_identify()
406 is_identify->pcie_vid = class->vendor_id; in cmd_infostat_identify()
407 is_identify->pcie_did = class->device_id; in cmd_infostat_identify()
408 if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_USP)) { in cmd_infostat_identify()
409 is_identify->sn = CXL_USP(cci->d)->sn; in cmd_infostat_identify()
411 is_identify->pcie_subsys_vid = 0; in cmd_infostat_identify()
412 is_identify->pcie_subsys_id = 0; in cmd_infostat_identify()
413 is_identify->component_type = 0x0; /* Switch */ in cmd_infostat_identify()
414 } else if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cmd_infostat_identify()
415 PCIDevice *pci_dev = PCI_DEVICE(cci->d); in cmd_infostat_identify()
417 is_identify->sn = CXL_TYPE3(cci->d)->sn; in cmd_infostat_identify()
419 * We can't always use class->subsystem_vendor_id as in cmd_infostat_identify()
422 is_identify->pcie_subsys_vid = in cmd_infostat_identify()
423 pci_get_word(pci_dev->config + PCI_SUBSYSTEM_VENDOR_ID); in cmd_infostat_identify()
424 is_identify->pcie_subsys_id = in cmd_infostat_identify()
425 pci_get_word(pci_dev->config + PCI_SUBSYSTEM_ID); in cmd_infostat_identify()
426 is_identify->component_type = 0x3; /* Type 3 */ in cmd_infostat_identify()
429 is_identify->max_message_size = (uint8_t)log2(cci->payload_max); in cmd_infostat_identify()
447 get_rsp_msg_limit->rsp_limit = (uint8_t)log2(cci->payload_max); in cmd_get_response_msg_limit()
470 if (in->rsp_limit < 8 || in->rsp_limit > 10) { in cmd_set_response_msg_limit()
474 cci->payload_max = 1 << in->rsp_limit; in cmd_set_response_msg_limit()
475 out->rsp_limit = in->rsp_limit; in cmd_set_response_msg_limit()
486 uint8_t port = PCIE_PORT(d)->port; in cxl_set_dsp_active_bm()
499 PCIEPort *usp = PCIE_PORT(cci->d); in cmd_identify_switch_device()
500 PCIBus *bus = &PCI_BRIDGE(cci->d)->sec_bus; in cmd_identify_switch_device()
519 .num_vcss = 1, /* Not yet support multiple VCS - potentially tricky */ in cmd_identify_switch_device()
527 if (object_dynamic_cast(OBJECT(cci->intf), TYPE_PCIE_PORT)) { in cmd_identify_switch_device()
528 out->ingress_port_id = PCIE_PORT(cci->intf)->port; in cmd_identify_switch_device()
531 out->ingress_port_id = 0; in cmd_identify_switch_device()
535 out->active_port_bitmask); in cmd_identify_switch_device()
536 out->active_port_bitmask[usp->port / 8] |= (1 << usp->port % 8); in cmd_identify_switch_device()
551 /* CXL r3.1 Table 7-17: Get Physical Port State Request Payload */ in cmd_get_physical_port_state()
554 uint8_t ports[]; in cmd_get_physical_port_state() member
558 * CXL r3.1 Table 7-19: Get Physical Port State Port Information Block in cmd_get_physical_port_state()
579 /* CXL r3.1 Table 7-18: Get Physical Port State Response Payload */ in cmd_get_physical_port_state()
583 struct cxl_fmapi_port_state_info_block ports[]; in cmd_get_physical_port_state() member
585 PCIBus *bus = &PCI_BRIDGE(cci->d)->sec_bus; in cmd_get_physical_port_state()
586 PCIEPort *usp = PCIE_PORT(cci->d); in cmd_get_physical_port_state()
597 if (sizeof(*out) + sizeof(*out->ports) * in->num_ports > cci->payload_max) { in cmd_get_physical_port_state()
602 out->num_ports = in->num_ports; in cmd_get_physical_port_state()
604 for (i = 0; i < in->num_ports; i++) { in cmd_get_physical_port_state()
610 port = &out->ports[i]; in cmd_get_physical_port_state()
612 port_dev = pcie_find_port_by_pn(bus, in->ports[i]); in cmd_get_physical_port_state()
615 ->devices[0]; in cmd_get_physical_port_state()
616 port->config_state = 3; in cmd_get_physical_port_state()
619 port->connected_device_type = 5; /* Assume MLD for now */ in cmd_get_physical_port_state()
621 port->connected_device_type = 1; in cmd_get_physical_port_state()
624 port->connected_device_type = 0; in cmd_get_physical_port_state()
626 port->supported_ld_count = 3; in cmd_get_physical_port_state()
627 } else if (usp->port == in->ports[i]) { /* USP */ in cmd_get_physical_port_state()
629 port->config_state = 4; in cmd_get_physical_port_state()
630 port->connected_device_type = 0; in cmd_get_physical_port_state()
635 port->port_id = in->ports[i]; in cmd_get_physical_port_state()
637 if (!port_dev->exp.exp_cap) { in cmd_get_physical_port_state()
640 lnksta = port_dev->config_read(port_dev, in cmd_get_physical_port_state()
641 port_dev->exp.exp_cap + PCI_EXP_LNKSTA, in cmd_get_physical_port_state()
643 lnkcap = port_dev->config_read(port_dev, in cmd_get_physical_port_state()
644 port_dev->exp.exp_cap + PCI_EXP_LNKCAP, in cmd_get_physical_port_state()
646 lnkcap2 = port_dev->config_read(port_dev, in cmd_get_physical_port_state()
647 port_dev->exp.exp_cap + PCI_EXP_LNKCAP2, in cmd_get_physical_port_state()
650 port->max_link_width = (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4; in cmd_get_physical_port_state()
651 port->negotiated_link_width = (lnksta & PCI_EXP_LNKSTA_NLW) >> 4; in cmd_get_physical_port_state()
653 port->supported_link_speeds_vector = (lnkcap2 & 0xFE) >> 1; in cmd_get_physical_port_state()
654 port->max_link_speed = lnkcap & PCI_EXP_LNKCAP_SLS; in cmd_get_physical_port_state()
655 port->current_link_speed = lnksta & PCI_EXP_LNKSTA_CLS; in cmd_get_physical_port_state()
657 port->ltssm_state = 0x7; in cmd_get_physical_port_state()
658 port->first_lane_num = 0; in cmd_get_physical_port_state()
659 port->link_state = 0; in cmd_get_physical_port_state()
660 port->port_cxl_version_bitmask = 0x2; in cmd_get_physical_port_state()
661 port->connected_device_cxl_version = 0x2; in cmd_get_physical_port_state()
664 pl_size = sizeof(*out) + sizeof(*out->ports) * in->num_ports; in cmd_get_physical_port_state()
688 bg_op_status->status = cci->bg.complete_pct << 1; in cmd_infostat_bg_op_sts()
689 if (cci->bg.runtime > 0) { in cmd_infostat_bg_op_sts()
690 bg_op_status->status |= 1U << 0; in cmd_infostat_bg_op_sts()
692 bg_op_status->opcode = cci->bg.opcode; in cmd_infostat_bg_op_sts()
693 bg_op_status->returncode = cci->bg.ret_code; in cmd_infostat_bg_op_sts()
710 int bg_set = cci->bg.opcode >> 8; in cmd_infostat_bg_op_abort()
711 int bg_cmd = cci->bg.opcode & 0xff; in cmd_infostat_bg_op_abort()
712 const struct cxl_cmd *bg_c = &cci->cxl_cmd_set[bg_set][bg_cmd]; in cmd_infostat_bg_op_abort()
714 if (!(bg_c->effect & CXL_MBOX_BACKGROUND_OPERATION_ABORT)) { in cmd_infostat_bg_op_abort()
718 qemu_mutex_lock(&cci->bg.lock); in cmd_infostat_bg_op_abort()
719 if (cci->bg.runtime) { in cmd_infostat_bg_op_abort()
721 if (cci->bg.complete_pct < 85) { in cmd_infostat_bg_op_abort()
722 timer_del(cci->bg.timer); in cmd_infostat_bg_op_abort()
723 cci->bg.ret_code = CXL_MBOX_ABORTED; in cmd_infostat_bg_op_abort()
724 cci->bg.starttime = 0; in cmd_infostat_bg_op_abort()
725 cci->bg.runtime = 0; in cmd_infostat_bg_op_abort()
726 cci->bg.aborted = true; in cmd_infostat_bg_op_abort()
729 qemu_mutex_unlock(&cci->bg.lock); in cmd_infostat_bg_op_abort()
745 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_firmware_update_get_info()
746 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in cmd_firmware_update_get_info()
759 if (!QEMU_IS_ALIGNED(cxl_dstate->vmem_size, CXL_CAPACITY_MULTIPLIER) || in cmd_firmware_update_get_info()
760 !QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER) || in cmd_firmware_update_get_info()
761 !QEMU_IS_ALIGNED(ct3d->dc.total_capacity, CXL_CAPACITY_MULTIPLIER)) { in cmd_firmware_update_get_info()
767 fw_info->slots_supported = CXL_FW_SLOTS; in cmd_firmware_update_get_info()
768 fw_info->slot_info = (cci->fw.active_slot & 0x7) | in cmd_firmware_update_get_info()
769 ((cci->fw.staged_slot & 0x7) << 3); in cmd_firmware_update_get_info()
770 fw_info->caps = BIT(0); /* online update supported */ in cmd_firmware_update_get_info()
772 if (cci->fw.slot[0]) { in cmd_firmware_update_get_info()
773 pstrcpy(fw_info->fw_rev1, sizeof(fw_info->fw_rev1), "BWFW VERSION 0"); in cmd_firmware_update_get_info()
775 if (cci->fw.slot[1]) { in cmd_firmware_update_get_info()
776 pstrcpy(fw_info->fw_rev2, sizeof(fw_info->fw_rev2), "BWFW VERSION 1"); in cmd_firmware_update_get_info()
813 if (fw_transfer->action == CXL_FW_XFER_ACTION_ABORT) { in cmd_firmware_update_transfer()
815 * At this point there aren't any on-going transfers in cmd_firmware_update_transfer()
816 * running in the bg - this is serialized before this in cmd_firmware_update_transfer()
820 cci->fw.transferring = false; in cmd_firmware_update_transfer()
824 offset = fw_transfer->offset * CXL_FW_XFER_ALIGNMENT; in cmd_firmware_update_transfer()
825 length = len - sizeof(*fw_transfer); in cmd_firmware_update_transfer()
830 if (cci->fw.transferring) { in cmd_firmware_update_transfer()
831 if (fw_transfer->action == CXL_FW_XFER_ACTION_FULL || in cmd_firmware_update_transfer()
832 fw_transfer->action == CXL_FW_XFER_ACTION_INIT) { in cmd_firmware_update_transfer()
838 * semantically treat this condition as an error - as in cmd_firmware_update_transfer()
841 if (difftime(time(NULL), cci->fw.last_partxfer) > 30.0) { in cmd_firmware_update_transfer()
842 cci->fw.transferring = false; in cmd_firmware_update_transfer()
845 } else if (fw_transfer->action == CXL_FW_XFER_ACTION_CONTINUE || in cmd_firmware_update_transfer()
846 fw_transfer->action == CXL_FW_XFER_ACTION_END) { in cmd_firmware_update_transfer()
850 /* allow back-to-back retransmission */ in cmd_firmware_update_transfer()
851 if ((offset != cci->fw.prev_offset || length != cci->fw.prev_len) && in cmd_firmware_update_transfer()
852 (fw_transfer->action == CXL_FW_XFER_ACTION_CONTINUE || in cmd_firmware_update_transfer()
853 fw_transfer->action == CXL_FW_XFER_ACTION_END)) { in cmd_firmware_update_transfer()
855 if (offset < cci->fw.prev_offset + cci->fw.prev_len) { in cmd_firmware_update_transfer()
860 switch (fw_transfer->action) { in cmd_firmware_update_transfer()
863 if (fw_transfer->slot == 0 || in cmd_firmware_update_transfer()
864 fw_transfer->slot == cci->fw.active_slot || in cmd_firmware_update_transfer()
865 fw_transfer->slot > CXL_FW_SLOTS) { in cmd_firmware_update_transfer()
876 cci->fw.transferring = true; in cmd_firmware_update_transfer()
877 cci->fw.prev_offset = offset; in cmd_firmware_update_transfer()
878 cci->fw.prev_len = length; in cmd_firmware_update_transfer()
881 cci->fw.prev_offset = offset; in cmd_firmware_update_transfer()
882 cci->fw.prev_len = length; in cmd_firmware_update_transfer()
888 if (fw_transfer->action == CXL_FW_XFER_ACTION_FULL) { in cmd_firmware_update_transfer()
889 cci->bg.runtime = 10 * 1000UL; in cmd_firmware_update_transfer()
891 cci->bg.runtime = 2 * 1000UL; in cmd_firmware_update_transfer()
894 cci->fw.curr_action = fw_transfer->action; in cmd_firmware_update_transfer()
895 cci->fw.curr_slot = fw_transfer->slot; in cmd_firmware_update_transfer()
903 switch (cci->fw.curr_action) { in __do_firmware_xfer()
906 cci->fw.slot[cci->fw.curr_slot - 1] = true; in __do_firmware_xfer()
907 cci->fw.transferring = false; in __do_firmware_xfer()
911 time(&cci->fw.last_partxfer); in __do_firmware_xfer()
932 if (fw_activate->slot == 0 || in cmd_firmware_update_activate()
933 fw_activate->slot == cci->fw.active_slot || in cmd_firmware_update_activate()
934 fw_activate->slot > CXL_FW_SLOTS) { in cmd_firmware_update_activate()
939 if (!cci->fw.slot[fw_activate->slot - 1]) { in cmd_firmware_update_activate()
943 switch (fw_activate->action) { in cmd_firmware_update_activate()
945 cci->fw.active_slot = fw_activate->slot; in cmd_firmware_update_activate()
948 cci->fw.staged_slot = fw_activate->slot; in cmd_firmware_update_activate()
965 CXLDeviceState *cxl_dstate = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_timestamp_get()
982 CXLDeviceState *cxl_dstate = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_timestamp_set()
984 cxl_dstate->timestamp.set = true; in cmd_timestamp_set()
985 cxl_dstate->timestamp.last_set = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in cmd_timestamp_set()
987 cxl_dstate->timestamp.host_set = le64_to_cpu(*(uint64_t *)payload_in); in cmd_timestamp_set()
1017 supported_logs->entries = 1; in cmd_logs_get_supported()
1018 supported_logs->log_entries[0].uuid = cel_uuid; in cmd_logs_get_supported()
1019 supported_logs->log_entries[0].size = 4 * cci->cel_size; in cmd_logs_get_supported()
1041 if (get_log->length > cci->payload_max) { in cmd_logs_get_log()
1045 if (!qemu_uuid_is_equal(&get_log->uuid, &cel_uuid)) { in cmd_logs_get_log()
1057 * beyond the end of cci->cel_log. in cmd_logs_get_log()
1059 if ((uint64_t)get_log->offset + get_log->length >= sizeof(cci->cel_log)) { in cmd_logs_get_log()
1064 *len_out = get_log->length; in cmd_logs_get_log()
1066 memmove(payload_out, cci->cel_log + get_log->offset, get_log->length); in cmd_logs_get_log()
1074 * CXL r3.1 section 8.2.9.6.1 Table 8-96
1084 * CXL r3.1 section 8.2.9.6.1 Table 8-97
1100 * CXL rev 3.1 section 8.2.9.6.1 Table 8-97
1132 * CXL r3.1 section 8.2.9.6.2 Table 8-99
1145 * CXL r3.1 section 8.2.9.6.3 Table 8-101
1201 uint32_t count; in cmd_features_get_supported() member
1213 if (!object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cmd_features_get_supported()
1216 if (get_feats_in->count < sizeof(CXLSupportedFeatureHeader) || in cmd_features_get_supported()
1217 get_feats_in->start_index >= CXL_FEATURE_MAX) { in cmd_features_get_supported()
1221 req_entries = (get_feats_in->count - in cmd_features_get_supported()
1225 (CXL_FEATURE_MAX - get_feats_in->start_index)); in cmd_features_get_supported()
1227 for (entry = 0, index = get_feats_in->start_index; in cmd_features_get_supported()
1232 get_feats_out->feat_entries[entry++] = in cmd_features_get_supported()
1247 get_feats_out->feat_entries[entry++] = in cmd_features_get_supported()
1264 get_feats_out->hdr.nsuppfeats_dev = CXL_FEATURE_MAX; in cmd_features_get_supported()
1265 get_feats_out->hdr.entries = req_entries; in cmd_features_get_supported()
1283 uint16_t count; in cmd_features_get_feature() member
1290 if (!object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cmd_features_get_feature()
1294 ct3d = CXL_TYPE3(cci->d); in cmd_features_get_feature()
1297 set_feat_info = &ct3d->set_feat_info; in cmd_features_get_feature()
1298 if (qemu_uuid_is_equal(&get_feature->uuid, &set_feat_info->uuid)) { in cmd_features_get_feature()
1302 if (get_feature->selection != CXL_GET_FEATURE_SEL_CURRENT_VALUE) { in cmd_features_get_feature()
1305 if (get_feature->offset + get_feature->count > cci->payload_max) { in cmd_features_get_feature()
1309 if (qemu_uuid_is_equal(&get_feature->uuid, &patrol_scrub_uuid)) { in cmd_features_get_feature()
1310 if (get_feature->offset >= sizeof(CXLMemPatrolScrubReadAttrs)) { in cmd_features_get_feature()
1313 bytes_to_copy = sizeof(CXLMemPatrolScrubReadAttrs) - in cmd_features_get_feature()
1314 get_feature->offset; in cmd_features_get_feature()
1315 bytes_to_copy = MIN(bytes_to_copy, get_feature->count); in cmd_features_get_feature()
1317 (uint8_t *)&ct3d->patrol_scrub_attrs + get_feature->offset, in cmd_features_get_feature()
1319 } else if (qemu_uuid_is_equal(&get_feature->uuid, &ecs_uuid)) { in cmd_features_get_feature()
1320 if (get_feature->offset >= sizeof(CXLMemECSReadAttrs)) { in cmd_features_get_feature()
1323 bytes_to_copy = sizeof(CXLMemECSReadAttrs) - get_feature->offset; in cmd_features_get_feature()
1324 bytes_to_copy = MIN(bytes_to_copy, get_feature->count); in cmd_features_get_feature()
1326 (uint8_t *)&ct3d->ecs_attrs + get_feature->offset, in cmd_features_get_feature()
1354 uint16_t count; in cmd_features_set_feature() local
1360 if (!object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cmd_features_set_feature()
1363 ct3d = CXL_TYPE3(cci->d); in cmd_features_set_feature()
1364 set_feat_info = &ct3d->set_feat_info; in cmd_features_set_feature()
1366 if (!qemu_uuid_is_null(&set_feat_info->uuid) && in cmd_features_set_feature()
1367 !qemu_uuid_is_equal(&hdr->uuid, &set_feat_info->uuid)) { in cmd_features_set_feature()
1370 if (hdr->flags & CXL_SET_FEAT_DATA_SAVED_ACROSS_RESET) { in cmd_features_set_feature()
1371 set_feat_info->data_saved_across_reset = true; in cmd_features_set_feature()
1373 set_feat_info->data_saved_across_reset = false; in cmd_features_set_feature()
1377 hdr->flags & CXL_SET_FEATURE_FLAG_DATA_TRANSFER_MASK; in cmd_features_set_feature()
1379 set_feat_info->uuid = hdr->uuid; in cmd_features_set_feature()
1380 set_feat_info->data_size = 0; in cmd_features_set_feature()
1382 set_feat_info->data_transfer_flag = data_transfer_flag; in cmd_features_set_feature()
1383 set_feat_info->data_offset = hdr->offset; in cmd_features_set_feature()
1384 bytes_to_copy = len_in - sizeof(CXLSetFeatureInHeader); in cmd_features_set_feature()
1390 if (qemu_uuid_is_equal(&hdr->uuid, &patrol_scrub_uuid)) { in cmd_features_set_feature()
1391 if (hdr->version != CXL_MEMDEV_PS_SET_FEATURE_VERSION) { in cmd_features_set_feature()
1396 ps_write_attrs = &ps_set_feature->feat_data; in cmd_features_set_feature()
1398 if ((uint32_t)hdr->offset + bytes_to_copy > in cmd_features_set_feature()
1399 sizeof(ct3d->patrol_scrub_wr_attrs)) { in cmd_features_set_feature()
1402 memcpy((uint8_t *)&ct3d->patrol_scrub_wr_attrs + hdr->offset, in cmd_features_set_feature()
1405 set_feat_info->data_size += bytes_to_copy; in cmd_features_set_feature()
1409 ct3d->patrol_scrub_attrs.scrub_cycle &= ~0xFF; in cmd_features_set_feature()
1410 ct3d->patrol_scrub_attrs.scrub_cycle |= in cmd_features_set_feature()
1411 ct3d->patrol_scrub_wr_attrs.scrub_cycle_hr & 0xFF; in cmd_features_set_feature()
1412 ct3d->patrol_scrub_attrs.scrub_flags &= ~0x1; in cmd_features_set_feature()
1413 ct3d->patrol_scrub_attrs.scrub_flags |= in cmd_features_set_feature()
1414 ct3d->patrol_scrub_wr_attrs.scrub_flags & 0x1; in cmd_features_set_feature()
1416 } else if (qemu_uuid_is_equal(&hdr->uuid, in cmd_features_set_feature()
1418 if (hdr->version != CXL_ECS_SET_FEATURE_VERSION) { in cmd_features_set_feature()
1423 ecs_write_attrs = ecs_set_feature->feat_data; in cmd_features_set_feature()
1425 if ((uint32_t)hdr->offset + bytes_to_copy > in cmd_features_set_feature()
1426 sizeof(ct3d->ecs_wr_attrs)) { in cmd_features_set_feature()
1429 memcpy((uint8_t *)&ct3d->ecs_wr_attrs + hdr->offset, in cmd_features_set_feature()
1432 set_feat_info->data_size += bytes_to_copy; in cmd_features_set_feature()
1436 ct3d->ecs_attrs.ecs_log_cap = ct3d->ecs_wr_attrs.ecs_log_cap; in cmd_features_set_feature()
1437 for (count = 0; count < CXL_ECS_NUM_MEDIA_FRUS; count++) { in cmd_features_set_feature()
1438 ct3d->ecs_attrs.fru_attrs[count].ecs_config = in cmd_features_set_feature()
1439 ct3d->ecs_wr_attrs.fru_attrs[count].ecs_config & 0x1F; in cmd_features_set_feature()
1449 memset(&set_feat_info->uuid, 0, sizeof(QemuUUID)); in cmd_features_set_feature()
1450 if (qemu_uuid_is_equal(&hdr->uuid, &patrol_scrub_uuid)) { in cmd_features_set_feature()
1451 memset(&ct3d->patrol_scrub_wr_attrs, 0, set_feat_info->data_size); in cmd_features_set_feature()
1452 } else if (qemu_uuid_is_equal(&hdr->uuid, &ecs_uuid)) { in cmd_features_set_feature()
1453 memset(&ct3d->ecs_wr_attrs, 0, set_feat_info->data_size); in cmd_features_set_feature()
1455 set_feat_info->data_transfer_flag = 0; in cmd_features_set_feature()
1456 set_feat_info->data_saved_across_reset = false; in cmd_features_set_feature()
1457 set_feat_info->data_offset = 0; in cmd_features_set_feature()
1458 set_feat_info->data_size = 0; in cmd_features_set_feature()
1490 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_identify_memory_device()
1492 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in cmd_identify_memory_device()
1494 if ((!QEMU_IS_ALIGNED(cxl_dstate->vmem_size, CXL_CAPACITY_MULTIPLIER)) || in cmd_identify_memory_device()
1495 (!QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER)) || in cmd_identify_memory_device()
1496 (!QEMU_IS_ALIGNED(ct3d->dc.total_capacity, CXL_CAPACITY_MULTIPLIER))) { in cmd_identify_memory_device()
1502 snprintf(id->fw_revision, 0x10, "BWFW VERSION %02d", 0); in cmd_identify_memory_device()
1504 stq_le_p(&id->total_capacity, in cmd_identify_memory_device()
1505 cxl_dstate->static_mem_size / CXL_CAPACITY_MULTIPLIER); in cmd_identify_memory_device()
1506 stq_le_p(&id->persistent_capacity, in cmd_identify_memory_device()
1507 cxl_dstate->pmem_size / CXL_CAPACITY_MULTIPLIER); in cmd_identify_memory_device()
1508 stq_le_p(&id->volatile_capacity, in cmd_identify_memory_device()
1509 cxl_dstate->vmem_size / CXL_CAPACITY_MULTIPLIER); in cmd_identify_memory_device()
1510 stl_le_p(&id->lsa_size, cvc->get_lsa_size(ct3d)); in cmd_identify_memory_device()
1512 st24_le_p(id->poison_list_max_mer, 256); in cmd_identify_memory_device()
1513 /* No limit - so limited by main poison record limit */ in cmd_identify_memory_device()
1514 stw_le_p(&id->inject_poison_limit, 0); in cmd_identify_memory_device()
1515 stw_le_p(&id->dc_event_log_size, CXL_DC_EVENT_LOG_SIZE); in cmd_identify_memory_device()
1529 CXLDeviceState *cxl_dstate = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_ccls_get_partition_info()
1539 if ((!QEMU_IS_ALIGNED(cxl_dstate->vmem_size, CXL_CAPACITY_MULTIPLIER)) || in cmd_ccls_get_partition_info()
1540 (!QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER)) || in cmd_ccls_get_partition_info()
1541 (!QEMU_IS_ALIGNED(ct3d->dc.total_capacity, CXL_CAPACITY_MULTIPLIER))) { in cmd_ccls_get_partition_info()
1545 stq_le_p(&part_info->active_vmem, in cmd_ccls_get_partition_info()
1546 cxl_dstate->vmem_size / CXL_CAPACITY_MULTIPLIER); in cmd_ccls_get_partition_info()
1551 stq_le_p(&part_info->next_vmem, 0); in cmd_ccls_get_partition_info()
1552 stq_le_p(&part_info->active_pmem, in cmd_ccls_get_partition_info()
1553 cxl_dstate->pmem_size / CXL_CAPACITY_MULTIPLIER); in cmd_ccls_get_partition_info()
1554 stq_le_p(&part_info->next_pmem, 0); in cmd_ccls_get_partition_info()
1572 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_ccls_get_lsa()
1577 offset = get_lsa->offset; in cmd_ccls_get_lsa()
1578 length = get_lsa->length; in cmd_ccls_get_lsa()
1580 if (offset + length > cvc->get_lsa_size(ct3d)) { in cmd_ccls_get_lsa()
1585 *len_out = cvc->get_lsa(ct3d, payload_out, length, offset); in cmd_ccls_get_lsa()
1603 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_ccls_set_lsa()
1612 if (set_lsa_payload->offset + len_in > cvc->get_lsa_size(ct3d) + hdr_len) { in cmd_ccls_set_lsa()
1615 len_in -= hdr_len; in cmd_ccls_set_lsa()
1617 cvc->set_lsa(ct3d, set_lsa_payload->data, len_in, set_lsa_payload->offset); in cmd_ccls_set_lsa()
1629 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_get_alert_config()
1632 memcpy(out, &ct3d->alert_config, sizeof(ct3d->alert_config)); in cmd_get_alert_config()
1633 *len_out = sizeof(ct3d->alert_config); in cmd_get_alert_config()
1646 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_set_alert_config()
1647 CXLAlertConfig *alert_config = &ct3d->alert_config; in cmd_set_alert_config()
1659 if (in->valid_alert_actions & CXL_ALERTS_LIFE_USED_WARN_THRESH) { in cmd_set_alert_config()
1661 * CXL r3.2 Table 8-149 The life used warning threshold shall be in cmd_set_alert_config()
1664 if (in->life_used_warn_thresh >= in cmd_set_alert_config()
1665 alert_config->life_used_crit_alert_thresh) { in cmd_set_alert_config()
1668 alert_config->life_used_warn_thresh = in->life_used_warn_thresh; in cmd_set_alert_config()
1669 alert_config->enable_alerts |= CXL_ALERTS_LIFE_USED_WARN_THRESH; in cmd_set_alert_config()
1672 if (in->valid_alert_actions & CXL_ALERTS_OVER_TEMP_WARN_THRESH) { in cmd_set_alert_config()
1674 * CXL r3.2 Table 8-149 The Device Over-Temperature Warning Threshold in cmd_set_alert_config()
1675 * shall be less than the the Device Over-Temperature Critical in cmd_set_alert_config()
1678 if (in->over_temp_warn_thresh >= in cmd_set_alert_config()
1679 alert_config->over_temp_crit_alert_thresh) { in cmd_set_alert_config()
1682 alert_config->over_temp_warn_thresh = in->over_temp_warn_thresh; in cmd_set_alert_config()
1683 alert_config->enable_alerts |= CXL_ALERTS_OVER_TEMP_WARN_THRESH; in cmd_set_alert_config()
1686 if (in->valid_alert_actions & CXL_ALERTS_UNDER_TEMP_WARN_THRESH) { in cmd_set_alert_config()
1688 * CXL r3.2 Table 8-149 The Device Under-Temperature Warning Threshold in cmd_set_alert_config()
1689 * shall be higher than the the Device Under-Temperature Critical in cmd_set_alert_config()
1692 if (in->under_temp_warn_thresh <= in cmd_set_alert_config()
1693 alert_config->under_temp_crit_alert_thresh) { in cmd_set_alert_config()
1696 alert_config->under_temp_warn_thresh = in->under_temp_warn_thresh; in cmd_set_alert_config()
1697 alert_config->enable_alerts |= CXL_ALERTS_UNDER_TEMP_WARN_THRESH; in cmd_set_alert_config()
1700 if (in->valid_alert_actions & CXL_ALERTS_COR_VMEM_ERR_WARN_THRESH) { in cmd_set_alert_config()
1701 alert_config->cor_vmem_err_warn_thresh = in->cor_vmem_err_warn_thresh; in cmd_set_alert_config()
1702 alert_config->enable_alerts |= CXL_ALERTS_COR_VMEM_ERR_WARN_THRESH; in cmd_set_alert_config()
1705 if (in->valid_alert_actions & CXL_ALERTS_COR_PMEM_ERR_WARN_THRESH) { in cmd_set_alert_config()
1706 alert_config->cor_pmem_err_warn_thresh = in->cor_pmem_err_warn_thresh; in cmd_set_alert_config()
1707 alert_config->enable_alerts |= CXL_ALERTS_COR_PMEM_ERR_WARN_THRESH; in cmd_set_alert_config()
1717 if (ct3d->hostvmem) { in __do_sanitization()
1718 mr = host_memory_backend_get_memory(ct3d->hostvmem); in __do_sanitization()
1725 if (ct3d->hostpmem) { in __do_sanitization()
1726 mr = host_memory_backend_get_memory(ct3d->hostpmem); in __do_sanitization()
1732 if (ct3d->lsa) { in __do_sanitization()
1733 mr = host_memory_backend_get_memory(ct3d->lsa); in __do_sanitization()
1739 cxl_discard_all_event_records(&ct3d->cxl_dstate); in __do_sanitization()
1800 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_sanitize_overwrite()
1804 total_mem = (ct3d->cxl_dstate.vmem_size + ct3d->cxl_dstate.pmem_size) >> 20; in cmd_sanitize_overwrite()
1808 cci->bg.runtime = secs * 1000UL; in cmd_sanitize_overwrite()
1811 cxl_dev_disable_media(&ct3d->cxl_dstate); in cmd_sanitize_overwrite()
1831 if (ct3d->hostvmem) { in get_vmr_size()
1832 mr = host_memory_backend_get_memory(ct3d->hostvmem); in get_vmr_size()
1844 if (ct3d->hostpmem) { in get_pmr_size()
1845 mr = host_memory_backend_get_memory(ct3d->hostpmem); in get_pmr_size()
1857 if (ct3d->dc.host_dc) { in get_dc_size()
1858 mr = host_memory_backend_get_memory(ct3d->dc.host_dc); in get_dc_size()
1875 return -EINVAL; in validate_dpa_addr()
1883 return -EINVAL; in validate_dpa_addr()
1888 return -ENODEV; in validate_dpa_addr()
1907 as = &ct3d->hostvmem_as; in sanitize_range()
1909 as = &ct3d->hostpmem_as; in sanitize_range()
1912 return -ENODEV; in sanitize_range()
1914 as = &ct3d->dc.host_dc_as; in sanitize_range()
1923 struct CXLSanitizeInfo *san_info = ct3d->media_op_sanitize; in __do_sanitize()
1924 int dpa_range_count = san_info->dpa_range_count; in __do_sanitize()
1929 rc = sanitize_range(ct3d, san_info->dpa_range_list[i].starting_dpa, in __do_sanitize()
1930 san_info->dpa_range_list[i].length, in __do_sanitize()
1931 san_info->fill_value); in __do_sanitize()
1937 g_free(ct3d->media_op_sanitize); in __do_sanitize()
1938 ct3d->media_op_sanitize = NULL; in __do_sanitize()
1986 int count = 0; in media_operations_discovery() local
1992 num_ops = media_op_in_disc_pl->discovery_osa.num_ops; in media_operations_discovery()
1993 start_index = media_op_in_disc_pl->discovery_osa.start_index; in media_operations_discovery()
2000 if (media_op_in_disc_pl->dpa_range_count || in media_operations_discovery()
2005 media_out_pl->dpa_range_granularity = CXL_CACHE_LINE_SIZE; in media_operations_discovery()
2006 media_out_pl->total_supported_operations = in media_operations_discovery()
2010 media_out_pl->entry[count].media_op_class = in media_operations_discovery()
2012 media_out_pl->entry[count].media_op_subclass = in media_operations_discovery()
2014 count++; in media_operations_discovery()
2015 if (count == num_ops) { in media_operations_discovery()
2021 media_out_pl->num_of_supported_operations = count; in media_operations_discovery()
2022 *len_out = sizeof(*media_out_pl) + count * sizeof(*media_out_pl->entry); in media_operations_discovery()
2041 uint32_t dpa_range_count = media_op_in_sanitize_pl->dpa_range_count; in media_operations_sanitize()
2057 media_op_in_sanitize_pl->dpa_range_list[i].starting_dpa; in media_operations_sanitize()
2058 uint64_t length = media_op_in_sanitize_pl->dpa_range_list[i].length; in media_operations_sanitize()
2065 ct3d->media_op_sanitize = g_malloc0(sizeof(struct CXLSanitizeInfo) + in media_operations_sanitize()
2068 ct3d->media_op_sanitize->dpa_range_count = dpa_range_count; in media_operations_sanitize()
2069 ct3d->media_op_sanitize->fill_value = fill_value; in media_operations_sanitize()
2070 memcpy(ct3d->media_op_sanitize->dpa_range_list, in media_operations_sanitize()
2071 media_op_in_sanitize_pl->dpa_range_list, in media_operations_sanitize()
2076 cci->bg.runtime = secs * 1000UL; in media_operations_sanitize()
2098 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_operations()
2106 media_op_cl = media_op_in_common_pl->media_operation_class; in cmd_media_operations()
2107 media_op_subclass = media_op_in_common_pl->media_operation_subclass; in cmd_media_operations()
2173 uint16_t count; in cmd_media_get_poison_list() member
2184 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_get_poison_list()
2187 CXLPoisonList *poison_list = &ct3d->poison_list; in cmd_media_get_poison_list()
2191 query_start = ldq_le_p(&in->pa); in cmd_media_get_poison_list()
2196 query_length = ldq_le_p(&in->length) * CXL_CACHE_LINE_SIZE; in cmd_media_get_poison_list()
2200 if (!ranges_overlap(ent->start, ent->length, in cmd_media_get_poison_list()
2206 out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]); in cmd_media_get_poison_list()
2213 if (!ranges_overlap(ent->start, ent->length, in cmd_media_get_poison_list()
2219 start = MAX(ROUND_DOWN(ent->start, 64ull), query_start); in cmd_media_get_poison_list()
2220 stop = MIN(ROUND_DOWN(ent->start, 64ull) + ent->length, in cmd_media_get_poison_list()
2222 stq_le_p(&out->records[i].addr, start | (ent->type & 0x7)); in cmd_media_get_poison_list()
2223 stl_le_p(&out->records[i].length, (stop - start) / CXL_CACHE_LINE_SIZE); in cmd_media_get_poison_list()
2226 if (ct3d->poison_list_overflowed) { in cmd_media_get_poison_list()
2227 out->flags = (1 << 1); in cmd_media_get_poison_list()
2228 stq_le_p(&out->overflow_timestamp, ct3d->poison_list_overflow_ts); in cmd_media_get_poison_list()
2231 out->flags |= (1 << 2); in cmd_media_get_poison_list()
2234 stw_le_p(&out->count, record_count); in cmd_media_get_poison_list()
2247 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_inject_poison()
2248 CXLPoisonList *poison_list = &ct3d->poison_list; in cmd_media_inject_poison()
2254 uint64_t dpa = ldq_le_p(&in->dpa); in cmd_media_inject_poison()
2258 if (dpa >= ent->start && in cmd_media_inject_poison()
2259 dpa + CXL_CACHE_LINE_SIZE <= ent->start + ent->length) { in cmd_media_inject_poison()
2264 * Freeze the list if there is an on-going scan media operation. in cmd_media_inject_poison()
2268 * XXX: Spec is ambiguous - is this case considered in cmd_media_inject_poison()
2274 if (ct3d->poison_list_cnt == CXL_POISON_LIST_LIMIT) { in cmd_media_inject_poison()
2279 p->length = CXL_CACHE_LINE_SIZE; in cmd_media_inject_poison()
2280 p->start = dpa; in cmd_media_inject_poison()
2281 p->type = CXL_POISON_TYPE_INJECTED; in cmd_media_inject_poison()
2287 ct3d->poison_list_cnt++; in cmd_media_inject_poison()
2302 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_clear_poison()
2303 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in cmd_media_clear_poison()
2304 CXLPoisonList *poison_list = &ct3d->poison_list; in cmd_media_clear_poison()
2315 dpa = ldq_le_p(&in->dpa); in cmd_media_clear_poison()
2316 if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size + in cmd_media_clear_poison()
2317 ct3d->dc.total_capacity) { in cmd_media_clear_poison()
2322 if (cvc->set_cacheline) { in cmd_media_clear_poison()
2323 if (!cvc->set_cacheline(ct3d, dpa, in->data)) { in cmd_media_clear_poison()
2329 * Freeze the list if there is an on-going scan media operation. in cmd_media_clear_poison()
2333 * XXX: Spec is ambiguous - is this case considered in cmd_media_clear_poison()
2344 if ((dpa >= ent->start) && (dpa < ent->start + ent->length)) { in cmd_media_clear_poison()
2353 ct3d->poison_list_cnt--; in cmd_media_clear_poison()
2355 if (dpa > ent->start) { in cmd_media_clear_poison()
2361 frag->start = ent->start; in cmd_media_clear_poison()
2362 frag->length = dpa - ent->start; in cmd_media_clear_poison()
2363 frag->type = ent->type; in cmd_media_clear_poison()
2366 ct3d->poison_list_cnt++; in cmd_media_clear_poison()
2369 if (dpa + CXL_CACHE_LINE_SIZE < ent->start + ent->length) { in cmd_media_clear_poison()
2372 if (ct3d->poison_list_cnt == CXL_POISON_LIST_LIMIT) { in cmd_media_clear_poison()
2377 frag->start = dpa + CXL_CACHE_LINE_SIZE; in cmd_media_clear_poison()
2378 frag->length = ent->start + ent->length - frag->start; in cmd_media_clear_poison()
2379 frag->type = ent->type; in cmd_media_clear_poison()
2381 ct3d->poison_list_cnt++; in cmd_media_clear_poison()
2412 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_get_scan_media_capabilities()
2413 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in cmd_media_get_scan_media_capabilities()
2419 query_start = ldq_le_p(&in->pa); in cmd_media_get_scan_media_capabilities()
2424 query_length = ldq_le_p(&in->length) * CXL_CACHE_LINE_SIZE; in cmd_media_get_scan_media_capabilities()
2426 if (query_start + query_length > cxl_dstate->static_mem_size) { in cmd_media_get_scan_media_capabilities()
2435 stl_le_p(&out->estimated_runtime_ms, in cmd_media_get_scan_media_capabilities()
2447 QLIST_FOREACH(ent, &ct3d->scan_media_results, node) { in __do_scan_media()
2452 if (ct3d->poison_list_overflowed && in __do_scan_media()
2453 ct3d->poison_list_cnt == results_cnt) { in __do_scan_media()
2457 ct3d->scan_media_hasrun = true; in __do_scan_media()
2477 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_scan_media()
2478 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in cmd_media_scan_media()
2483 query_start = ldq_le_p(&in->pa); in cmd_media_scan_media()
2488 query_length = ldq_le_p(&in->length) * CXL_CACHE_LINE_SIZE; in cmd_media_scan_media()
2490 if (query_start + query_length > cxl_dstate->static_mem_size) { in cmd_media_scan_media()
2493 if (ct3d->dc.num_regions && query_start + query_length >= in cmd_media_scan_media()
2494 cxl_dstate->static_mem_size + ct3d->dc.total_capacity) { in cmd_media_scan_media()
2498 if (in->flags == 0) { /* TODO */ in cmd_media_scan_media()
2504 QLIST_FOREACH_SAFE(ent, &ct3d->scan_media_results, node, next) { in cmd_media_scan_media()
2509 /* kill the poison list - it will be recreated */ in cmd_media_scan_media()
2510 if (ct3d->poison_list_overflowed) { in cmd_media_scan_media()
2511 QLIST_FOREACH_SAFE(ent, &ct3d->poison_list, node, next) { in cmd_media_scan_media()
2514 ct3d->poison_list_cnt--; in cmd_media_scan_media()
2523 QLIST_FOREACH_SAFE(ent, &ct3d->poison_list_bkp, node, next) { in cmd_media_scan_media()
2526 if (ent->start >= query_start + query_length || in cmd_media_scan_media()
2527 ent->start + ent->length <= query_start) { in cmd_media_scan_media()
2536 if (ct3d->poison_list_cnt < CXL_POISON_LIST_LIMIT) { in cmd_media_scan_media()
2539 p->start = ent->start; in cmd_media_scan_media()
2540 p->length = ent->length; in cmd_media_scan_media()
2541 p->type = ent->type; in cmd_media_scan_media()
2542 QLIST_INSERT_HEAD(&ct3d->poison_list, p, node); in cmd_media_scan_media()
2543 ct3d->poison_list_cnt++; in cmd_media_scan_media()
2547 res->start = ent->start; in cmd_media_scan_media()
2548 res->length = ent->length; in cmd_media_scan_media()
2549 res->type = ent->type; in cmd_media_scan_media()
2550 QLIST_INSERT_HEAD(&ct3d->scan_media_results, res, node); in cmd_media_scan_media()
2556 cci->bg.runtime = MAX(1, query_length * (0.0005L / 64)); in cmd_media_scan_media()
2577 uint16_t count; in cmd_media_get_scan_media_results() member
2587 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_media_get_scan_media_results()
2588 CXLPoisonList *scan_media_results = &ct3d->scan_media_results; in cmd_media_get_scan_media_results()
2593 if (!ct3d->scan_media_hasrun) { in cmd_media_get_scan_media_results()
2602 size_t rec_size = record_count * sizeof(out->records[0]); in cmd_media_get_scan_media_results()
2610 out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]); in cmd_media_get_scan_media_results()
2621 start = ROUND_DOWN(ent->start, 64ull); in cmd_media_get_scan_media_results()
2622 stop = ROUND_DOWN(ent->start, 64ull) + ent->length; in cmd_media_get_scan_media_results()
2623 stq_le_p(&out->records[i].addr, start); in cmd_media_get_scan_media_results()
2624 stl_le_p(&out->records[i].length, (stop - start) / CXL_CACHE_LINE_SIZE); in cmd_media_get_scan_media_results()
2632 stw_le_p(&out->count, record_count); in cmd_media_get_scan_media_results()
2634 out->flags = (1 << 0); /* More Media Error Records */ in cmd_media_get_scan_media_results()
2652 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_dcd_get_dyn_cap_config()
2682 start_rid = in->start_rid; in cmd_dcd_get_dyn_cap_config()
2683 if (start_rid >= ct3d->dc.num_regions) { in cmd_dcd_get_dyn_cap_config()
2687 record_count = MIN(ct3d->dc.num_regions - in->start_rid, in->region_cnt); in cmd_dcd_get_dyn_cap_config()
2689 out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]); in cmd_dcd_get_dyn_cap_config()
2694 out->num_regions = ct3d->dc.num_regions; in cmd_dcd_get_dyn_cap_config()
2695 out->regions_returned = record_count; in cmd_dcd_get_dyn_cap_config()
2697 stq_le_p(&out->records[i].base, in cmd_dcd_get_dyn_cap_config()
2698 ct3d->dc.regions[start_rid + i].base); in cmd_dcd_get_dyn_cap_config()
2699 stq_le_p(&out->records[i].decode_len, in cmd_dcd_get_dyn_cap_config()
2700 ct3d->dc.regions[start_rid + i].decode_len / in cmd_dcd_get_dyn_cap_config()
2702 stq_le_p(&out->records[i].region_len, in cmd_dcd_get_dyn_cap_config()
2703 ct3d->dc.regions[start_rid + i].len); in cmd_dcd_get_dyn_cap_config()
2704 stq_le_p(&out->records[i].block_size, in cmd_dcd_get_dyn_cap_config()
2705 ct3d->dc.regions[start_rid + i].block_size); in cmd_dcd_get_dyn_cap_config()
2706 stl_le_p(&out->records[i].dsmadhandle, in cmd_dcd_get_dyn_cap_config()
2707 ct3d->dc.regions[start_rid + i].dsmadhandle); in cmd_dcd_get_dyn_cap_config()
2708 out->records[i].flags = ct3d->dc.regions[start_rid + i].flags; in cmd_dcd_get_dyn_cap_config()
2714 stl_le_p(&extra_out->num_extents_supported, CXL_NUM_EXTENTS_SUPPORTED); in cmd_dcd_get_dyn_cap_config()
2715 stl_le_p(&extra_out->num_extents_available, CXL_NUM_EXTENTS_SUPPORTED - in cmd_dcd_get_dyn_cap_config()
2716 ct3d->dc.total_extent_count); in cmd_dcd_get_dyn_cap_config()
2717 stl_le_p(&extra_out->num_tags_supported, CXL_NUM_TAGS_SUPPORTED); in cmd_dcd_get_dyn_cap_config()
2718 stl_le_p(&extra_out->num_tags_available, CXL_NUM_TAGS_SUPPORTED); in cmd_dcd_get_dyn_cap_config()
2735 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_dcd_get_dyn_cap_ext_list()
2741 uint32_t count; in cmd_dcd_get_dyn_cap_ext_list() member
2747 uint32_t start_extent_id = in->start_extent_id; in cmd_dcd_get_dyn_cap_ext_list()
2748 CXLDCExtentList *extent_list = &ct3d->dc.extents; in cmd_dcd_get_dyn_cap_ext_list()
2753 if (start_extent_id > ct3d->dc.total_extent_count) { in cmd_dcd_get_dyn_cap_ext_list()
2757 record_count = MIN(in->extent_cnt, in cmd_dcd_get_dyn_cap_ext_list()
2758 ct3d->dc.total_extent_count - start_extent_id); in cmd_dcd_get_dyn_cap_ext_list()
2759 size = CXL_MAILBOX_MAX_PAYLOAD_SIZE - sizeof(*out); in cmd_dcd_get_dyn_cap_ext_list()
2760 record_count = MIN(record_count, size / sizeof(out->records[0])); in cmd_dcd_get_dyn_cap_ext_list()
2761 out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]); in cmd_dcd_get_dyn_cap_ext_list()
2763 stl_le_p(&out->count, record_count); in cmd_dcd_get_dyn_cap_ext_list()
2764 stl_le_p(&out->total_extents, ct3d->dc.total_extent_count); in cmd_dcd_get_dyn_cap_ext_list()
2765 stl_le_p(&out->generation_num, ct3d->dc.ext_list_gen_seq); in cmd_dcd_get_dyn_cap_ext_list()
2768 CXLDCExtentRaw *out_rec = &out->records[record_done]; in cmd_dcd_get_dyn_cap_ext_list()
2774 stq_le_p(&out_rec->start_dpa, ent->start_dpa); in cmd_dcd_get_dyn_cap_ext_list()
2775 stq_le_p(&out_rec->len, ent->len); in cmd_dcd_get_dyn_cap_ext_list()
2776 memcpy(&out_rec->tag, ent->tag, 0x10); in cmd_dcd_get_dyn_cap_ext_list()
2777 stw_le_p(&out_rec->shared_seq, ent->shared_seq); in cmd_dcd_get_dyn_cap_ext_list()
2806 CXLDCRegion *region = &ct3d->dc.regions[0]; in cxl_find_dc_region()
2808 if (dpa < region->base || in cxl_find_dc_region()
2809 dpa >= region->base + ct3d->dc.total_capacity) { in cxl_find_dc_region()
2816 * Regions are used in increasing-DPA order, with Region 0 being used for in cxl_find_dc_region()
2821 for (i = ct3d->dc.num_regions - 1; i >= 0; i--) { in cxl_find_dc_region()
2822 region = &ct3d->dc.regions[i]; in cxl_find_dc_region()
2823 if (dpa >= region->base) { in cxl_find_dc_region()
2824 if (dpa + len > region->base + region->len) { in cxl_find_dc_region()
2843 extent->start_dpa = dpa; in cxl_insert_extent_to_extent_list()
2844 extent->len = len; in cxl_insert_extent_to_extent_list()
2846 memcpy(extent->tag, tag, 0x10); in cxl_insert_extent_to_extent_list()
2848 extent->shared_seq = shared_seq; in cxl_insert_extent_to_extent_list()
2861 * Add a new extent to the extent "group" if group exists;
2862 * otherwise, create a new group
2863 * Return value: the extent group where the extent is inserted.
2865 CXLDCExtentGroup *cxl_insert_extent_to_extent_group(CXLDCExtentGroup *group, in cxl_insert_extent_to_extent_group() argument
2871 if (!group) { in cxl_insert_extent_to_extent_group()
2872 group = g_new0(CXLDCExtentGroup, 1); in cxl_insert_extent_to_extent_group()
2873 QTAILQ_INIT(&group->list); in cxl_insert_extent_to_extent_group()
2875 cxl_insert_extent_to_extent_list(&group->list, dpa, len, in cxl_insert_extent_to_extent_group()
2877 return group; in cxl_insert_extent_to_extent_group()
2881 CXLDCExtentGroup *group) in cxl_extent_group_list_insert_tail() argument
2883 QTAILQ_INSERT_TAIL(list, group, node); in cxl_extent_group_list_insert_tail()
2889 CXLDCExtentGroup *group = QTAILQ_FIRST(list); in cxl_extent_group_list_delete_front() local
2891 QTAILQ_REMOVE(list, group, node); in cxl_extent_group_list_delete_front()
2892 QTAILQ_FOREACH_SAFE(ent, &group->list, node, ent_next) { in cxl_extent_group_list_delete_front()
2893 cxl_remove_extent_from_extent_list(&group->list, ent); in cxl_extent_group_list_delete_front()
2895 g_free(group); in cxl_extent_group_list_delete_front()
2899 * CXL r3.1 Table 8-168: Add Dynamic Capacity Response Input Payload
2900 * CXL r3.1 Table 8-170: Release Dynamic Capacity Input Payload
2906 /* CXL r3.1 Table 8-169: Updated Extent */
2918 * 3. The start DPA and the length of the extent should align with the block
2927 CXLDCRegion *lastregion = &ct3d->dc.regions[ct3d->dc.num_regions - 1]; in cxl_detect_malformed_extent_list()
2932 for (i = 0; i < ct3d->dc.num_regions; i++) { in cxl_detect_malformed_extent_list()
2933 region = &ct3d->dc.regions[i]; in cxl_detect_malformed_extent_list()
2934 min_block_size = MIN(min_block_size, region->block_size); in cxl_detect_malformed_extent_list()
2937 blk_bitmap = bitmap_new((lastregion->base + lastregion->len - in cxl_detect_malformed_extent_list()
2938 ct3d->dc.regions[0].base) / min_block_size); in cxl_detect_malformed_extent_list()
2940 for (i = 0; i < in->num_entries_updated; i++) { in cxl_detect_malformed_extent_list()
2941 dpa = in->updated_entries[i].start_dpa; in cxl_detect_malformed_extent_list()
2942 len = in->updated_entries[i].len; in cxl_detect_malformed_extent_list()
2949 dpa -= ct3d->dc.regions[0].base; in cxl_detect_malformed_extent_list()
2950 if (dpa % region->block_size || len % region->block_size) { in cxl_detect_malformed_extent_list()
2973 for (i = 0; i < in->num_entries_updated; i++) { in cxl_dcd_add_dyn_cap_rsp_dry_run()
2974 dpa = in->updated_entries[i].start_dpa; in cxl_dcd_add_dyn_cap_rsp_dry_run()
2975 len = in->updated_entries[i].len; in cxl_dcd_add_dyn_cap_rsp_dry_run()
2980 * The host-accepted DPA range must be contained by the first extent in cxl_dcd_add_dyn_cap_rsp_dry_run()
2981 * group in the pending list in cxl_dcd_add_dyn_cap_rsp_dry_run()
2983 ext_group = QTAILQ_FIRST(&ct3d->dc.extents_pending); in cxl_dcd_add_dyn_cap_rsp_dry_run()
2984 if (!cxl_extents_contains_dpa_range(&ext_group->list, dpa, len)) { in cxl_dcd_add_dyn_cap_rsp_dry_run()
2988 /* to-be-added range should not overlap with range already accepted */ in cxl_dcd_add_dyn_cap_rsp_dry_run()
2989 QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) { in cxl_dcd_add_dyn_cap_rsp_dry_run()
2990 range_init_nofail(&range2, ent->start_dpa, ent->len); in cxl_dcd_add_dyn_cap_rsp_dry_run()
3012 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_dcd_add_dyn_cap_rsp()
3013 CXLDCExtentList *extent_list = &ct3d->dc.extents; in cmd_dcd_add_dyn_cap_rsp()
3022 if (in->num_entries_updated == 0) { in cmd_dcd_add_dyn_cap_rsp()
3023 cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending); in cmd_dcd_add_dyn_cap_rsp()
3028 sizeof(*in) + sizeof(*in->updated_entries) * in->num_entries_updated) { in cmd_dcd_add_dyn_cap_rsp()
3033 if (in->num_entries_updated + ct3d->dc.total_extent_count > in cmd_dcd_add_dyn_cap_rsp()
3048 for (i = 0; i < in->num_entries_updated; i++) { in cmd_dcd_add_dyn_cap_rsp()
3049 dpa = in->updated_entries[i].start_dpa; in cmd_dcd_add_dyn_cap_rsp()
3050 len = in->updated_entries[i].len; in cmd_dcd_add_dyn_cap_rsp()
3053 ct3d->dc.total_extent_count += 1; in cmd_dcd_add_dyn_cap_rsp()
3056 /* Remove the first extent group in the pending list */ in cmd_dcd_add_dyn_cap_rsp()
3057 cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending); in cmd_dcd_add_dyn_cap_rsp()
3077 cxl_insert_extent_to_extent_list(dst, ent->start_dpa, ent->len, in copy_extent_list()
3078 ent->tag, ent->shared_seq); in copy_extent_list()
3095 copy_extent_list(updated_list, &ct3d->dc.extents); in cxl_dc_extent_release_dry_run()
3097 for (i = 0; i < in->num_entries_updated; i++) { in cxl_dc_extent_release_dry_run()
3100 dpa = in->updated_entries[i].start_dpa; in cxl_dc_extent_release_dry_run()
3101 len = in->updated_entries[i].len; in cxl_dc_extent_release_dry_run()
3112 range_init_nofail(&range, ent->start_dpa, ent->len); in cxl_dc_extent_release_dry_run()
3116 uint64_t ent_start_dpa = ent->start_dpa; in cxl_dc_extent_release_dry_run()
3117 uint64_t ent_len = ent->len; in cxl_dc_extent_release_dry_run()
3119 len1 = dpa - ent->start_dpa; in cxl_dc_extent_release_dry_run()
3121 if (range_contains(&range, dpa + len - 1)) { in cxl_dc_extent_release_dry_run()
3122 len2 = ent_start_dpa + ent_len - dpa - len; in cxl_dc_extent_release_dry_run()
3126 len_done = ent_len - len1 - len2; in cxl_dc_extent_release_dry_run()
3129 cnt_delta--; in cxl_dc_extent_release_dry_run()
3144 if (cnt_delta + ct3d->dc.total_extent_count > in cxl_dc_extent_release_dry_run()
3150 len -= len_done; in cxl_dc_extent_release_dry_run()
3163 *updated_list_size = ct3d->dc.total_extent_count + cnt_delta; in cxl_dc_extent_release_dry_run()
3180 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_dcd_release_dyn_cap()
3190 if (in->num_entries_updated == 0) { in cmd_dcd_release_dyn_cap()
3195 sizeof(*in) + sizeof(*in->updated_entries) * in->num_entries_updated) { in cmd_dcd_release_dyn_cap()
3214 * list and update the extent count; in cmd_dcd_release_dyn_cap()
3216 QTAILQ_FOREACH_SAFE(ent, &ct3d->dc.extents, node, ent_next) { in cmd_dcd_release_dyn_cap()
3217 ct3_clear_region_block_backed(ct3d, ent->start_dpa, ent->len); in cmd_dcd_release_dyn_cap()
3218 cxl_remove_extent_from_extent_list(&ct3d->dc.extents, ent); in cmd_dcd_release_dyn_cap()
3220 copy_extent_list(&ct3d->dc.extents, &updated_list); in cmd_dcd_release_dyn_cap()
3222 ct3_set_region_block_backed(ct3d, ent->start_dpa, ent->len); in cmd_dcd_release_dyn_cap()
3225 ct3d->dc.total_extent_count = updated_list_size; in cmd_dcd_release_dyn_cap()
3361 cxl_cmd = &cci->cxl_cmd_set[set][cmd]; in cxl_process_cci_message()
3362 h = cxl_cmd->handler; in cxl_process_cci_message()
3369 if (len_in != cxl_cmd->in && cxl_cmd->in != ~0) { in cxl_process_cci_message()
3374 if ((cxl_cmd->effect & CXL_MBOX_BACKGROUND_OPERATION) && in cxl_process_cci_message()
3375 cci->bg.runtime > 0) { in cxl_process_cci_message()
3380 if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cxl_process_cci_message()
3381 cxl_dstate = &CXL_TYPE3(cci->d)->cxl_dstate; in cxl_process_cci_message()
3401 if ((cxl_cmd->effect & CXL_MBOX_BACKGROUND_OPERATION) && in cxl_process_cci_message()
3412 cci->bg.opcode = (set << 8) | cmd; in cxl_process_cci_message()
3414 cci->bg.complete_pct = 0; in cxl_process_cci_message()
3415 cci->bg.aborted = false; in cxl_process_cci_message()
3416 cci->bg.ret_code = 0; in cxl_process_cci_message()
3419 cci->bg.starttime = now; in cxl_process_cci_message()
3420 timer_mod(cci->bg.timer, now + CXL_MBOX_BG_UPDATE_FREQ); in cxl_process_cci_message()
3431 qemu_mutex_lock(&cci->bg.lock); in bg_timercb()
3434 total_time = cci->bg.starttime + cci->bg.runtime; in bg_timercb()
3439 cci->bg.complete_pct = 100; in bg_timercb()
3440 cci->bg.ret_code = ret; in bg_timercb()
3441 switch (cci->bg.opcode) { in bg_timercb()
3447 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in bg_timercb()
3450 cxl_dev_enable_media(&ct3d->cxl_dstate); in bg_timercb()
3455 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in bg_timercb()
3461 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in bg_timercb()
3472 cci->bg.complete_pct = in bg_timercb()
3473 100 * (now - cci->bg.starttime) / cci->bg.runtime; in bg_timercb()
3474 timer_mod(cci->bg.timer, now + CXL_MBOX_BG_UPDATE_FREQ); in bg_timercb()
3477 if (cci->bg.complete_pct == 100) { in bg_timercb()
3479 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in bg_timercb()
3480 CXLDeviceState *cxl_dstate = &ct3d->cxl_dstate; in bg_timercb()
3481 PCIDevice *pdev = PCI_DEVICE(cci->d); in bg_timercb()
3483 cci->bg.starttime = 0; in bg_timercb()
3484 /* registers are updated, allow new bg-capable cmds */ in bg_timercb()
3485 cci->bg.runtime = 0; in bg_timercb()
3488 msix_notify(pdev, cxl_dstate->mbox_msi_n); in bg_timercb()
3490 msi_notify(pdev, cxl_dstate->mbox_msi_n); in bg_timercb()
3494 qemu_mutex_unlock(&cci->bg.lock); in bg_timercb()
3499 cci->cel_size = 0; /* Reset for a fresh build */ in cxl_rebuild_cel()
3502 if (cci->cxl_cmd_set[set][cmd].handler) { in cxl_rebuild_cel()
3503 const struct cxl_cmd *c = &cci->cxl_cmd_set[set][cmd]; in cxl_rebuild_cel()
3505 &cci->cel_log[cci->cel_size]; in cxl_rebuild_cel()
3507 log->opcode = (set << 8) | cmd; in cxl_rebuild_cel()
3508 log->effect = c->effect; in cxl_rebuild_cel()
3509 cci->cel_size++; in cxl_rebuild_cel()
3517 cci->payload_max = payload_max; in cxl_init_cci()
3520 cci->bg.complete_pct = 0; in cxl_init_cci()
3521 cci->bg.starttime = 0; in cxl_init_cci()
3522 cci->bg.runtime = 0; in cxl_init_cci()
3523 cci->bg.aborted = false; in cxl_init_cci()
3524 cci->bg.timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, in cxl_init_cci()
3526 qemu_mutex_init(&cci->bg.lock); in cxl_init_cci()
3528 memset(&cci->fw, 0, sizeof(cci->fw)); in cxl_init_cci()
3529 cci->fw.active_slot = 1; in cxl_init_cci()
3530 cci->fw.slot[cci->fw.active_slot - 1] = true; in cxl_init_cci()
3531 cci->initialized = true; in cxl_init_cci()
3536 qemu_mutex_destroy(&cci->bg.lock); in cxl_destroy_cci()
3537 cci->initialized = false; in cxl_destroy_cci()
3545 cci->cxl_cmd_set[set][cmd] = cxl_cmds[set][cmd]; in cxl_copy_cci_commands()
3554 cci->payload_max = MAX(payload_max, cci->payload_max); in cxl_add_cci_commands()
3563 cci->d = d; in cxl_initialize_mailbox_swcci()
3564 cci->intf = intf; in cxl_initialize_mailbox_swcci()
3573 if (ct3d->dc.num_regions) { in cxl_initialize_mailbox_t3()
3576 cci->d = d; in cxl_initialize_mailbox_t3()
3579 cci->intf = d; in cxl_initialize_mailbox_t3()
3594 cci->d = d; in cxl_initialize_t3_ld_cci()
3595 cci->intf = intf; in cxl_initialize_t3_ld_cci()
3618 cci->d = d; in cxl_initialize_t3_fm_owned_ld_mctpcci()
3619 cci->intf = intf; in cxl_initialize_t3_fm_owned_ld_mctpcci()