hw/cxl/cxl-component-utils.c

383     uint8_t *wmask = pdev->wmask;  in cxl_component_create_dvsec()  local
403         wmask[offset + offsetof(CXLDVSECDevice, ctrl)] = 0xFD;  in cxl_component_create_dvsec()
404         wmask[offset + offsetof(CXLDVSECDevice, ctrl) + 1] = 0x4F;  in cxl_component_create_dvsec()
406         wmask[offset + offsetof(CXLDVSECDevice, ctrl2)] = 0x0F;  in cxl_component_create_dvsec()
408         wmask[offset + offsetof(CXLDVSECDevice, lock)] = 0x01;  in cxl_component_create_dvsec()
410         wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi)] = 0xFF;  in cxl_component_create_dvsec()
411         wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi) + 1] = 0xFF;  in cxl_component_create_dvsec()
412         wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi) + 2] = 0xFF;  in cxl_component_create_dvsec()
413         wmask[offset + offsetof(CXLDVSECDevice, range1_base_hi) + 3] = 0xFF;  in cxl_component_create_dvsec()
414         wmask[offset + offsetof(CXLDVSECDevice, range1_base_lo) + 3] = 0xF0;  in cxl_component_create_dvsec()
415         wmask[offset + offsetof(CXLDVSECDevice, range2_base_hi)] = 0xFF;  in cxl_component_create_dvsec()
416         wmask[offset + offsetof(CXLDVSECDevice, range2_base_hi) + 1] = 0xFF;  in cxl_component_create_dvsec()
417         wmask[offset + offsetof(CXLDVSECDevice, range2_base_hi) + 2] = 0xFF;  in cxl_component_create_dvsec()
418         wmask[offset + offsetof(CXLDVSECDevice, range2_base_hi) + 3] = 0xFF;  in cxl_component_create_dvsec()
419         wmask[offset + offsetof(CXLDVSECDevice, range2_base_lo) + 3] = 0xF0;  in cxl_component_create_dvsec()
424         wmask[offset + offsetof(CXLDVSECPortExt, control)] = 0x0F;  in cxl_component_create_dvsec()
425         wmask[offset + offsetof(CXLDVSECPortExt, control) + 1] = 0x40;  in cxl_component_create_dvsec()
426         wmask[offset + offsetof(CXLDVSECPortExt, alt_bus_base)] = 0xFF;  in cxl_component_create_dvsec()
427         wmask[offset + offsetof(CXLDVSECPortExt, alt_bus_limit)] = 0xFF;  in cxl_component_create_dvsec()
428         wmask[offset + offsetof(CXLDVSECPortExt, alt_memory_base)] = 0xF0;  in cxl_component_create_dvsec()
429         wmask[offset + offsetof(CXLDVSECPortExt, alt_memory_base) + 1] = 0xFF;  in cxl_component_create_dvsec()
430         wmask[offset + offsetof(CXLDVSECPortExt, alt_memory_limit)] = 0xF0;  in cxl_component_create_dvsec()
431         wmask[offset + offsetof(CXLDVSECPortExt, alt_memory_limit) + 1] = 0xFF;  in cxl_component_create_dvsec()
432         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_base)] = 0xF0;  in cxl_component_create_dvsec()
433         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_base) + 1] = 0xFF;  in cxl_component_create_dvsec()
434         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_limit)] = 0xF0;  in cxl_component_create_dvsec()
435         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_limit) + 1] =  in cxl_component_create_dvsec()
437         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_base_high)] =  in cxl_component_create_dvsec()
439         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_base_high) + 1] =  in cxl_component_create_dvsec()
441         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_base_high) + 2] =  in cxl_component_create_dvsec()
443         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_base_high) + 3] =  in cxl_component_create_dvsec()
445         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_limit_high)] =  in cxl_component_create_dvsec()
447         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_limit_high) + 1] =  in cxl_component_create_dvsec()
449         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_limit_high) + 2] =  in cxl_component_create_dvsec()
451         wmask[offset + offsetof(CXLDVSECPortExt, alt_prefetch_limit_high) + 3] =  in cxl_component_create_dvsec()
455         wmask[offset + offsetof(CXLDVSECPortGPF, phase1_ctrl)] = 0x0F;  in cxl_component_create_dvsec()
456         wmask[offset + offsetof(CXLDVSECPortGPF, phase1_ctrl) + 1] = 0x0F;  in cxl_component_create_dvsec()
457         wmask[offset + offsetof(CXLDVSECPortGPF, phase2_ctrl)] = 0x0F;  in cxl_component_create_dvsec()
458         wmask[offset + offsetof(CXLDVSECPortGPF, phase2_ctrl) + 1] = 0x0F;  in cxl_component_create_dvsec()
461         wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_duration)] = 0x0F;  in cxl_component_create_dvsec()
462         wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_duration) + 1] = 0x0F;  in cxl_component_create_dvsec()
463         wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power)] = 0xFF;  in cxl_component_create_dvsec()
464         wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power) + 1] = 0xFF;  in cxl_component_create_dvsec()
465         wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power) + 2] = 0xFF;  in cxl_component_create_dvsec()
466         wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power) + 3] = 0xFF;  in cxl_component_create_dvsec()
472             wmask[offset + offsetof(CXLDVSECPortFlexBus, ctrl)] = 0xbd;  in cxl_component_create_dvsec()
475             wmask[offset + offsetof(CXLDVSECPortFlexBus, ctrl)] = 0xfd;  in cxl_component_create_dvsec()