Lines Matching +full:0 +full:xf000
43 return 0; in stm32f2xx_usart_can_receive()
53 qemu_set_irq(s->irq, 0); in stm32f2xx_update_irq()
81 s->usart_dr = 0x00000000; in stm32f2xx_usart_reset()
82 s->usart_brr = 0x00000000; in stm32f2xx_usart_reset()
83 s->usart_cr1 = 0x00000000; in stm32f2xx_usart_reset()
84 s->usart_cr2 = 0x00000000; in stm32f2xx_usart_reset()
85 s->usart_cr3 = 0x00000000; in stm32f2xx_usart_reset()
86 s->usart_gtpr = 0x00000000; in stm32f2xx_usart_reset()
96 uint64_t retvalue = 0; in stm32f2xx_usart_read()
104 retvalue = s->usart_dr & 0x3FF; in stm32f2xx_usart_read()
126 "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); in stm32f2xx_usart_read()
127 return 0; in stm32f2xx_usart_read()
147 if (value <= 0x3FF) { in stm32f2xx_usart_write()
157 if (value < 0xF000) { in stm32f2xx_usart_write()
165 clear TC by writing 0 to the SR register, so set it again in stm32f2xx_usart_write()
189 "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); in stm32f2xx_usart_write()
210 TYPE_STM32F2XX_USART, 0x400); in stm32f2xx_usart_init()