9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "hw/qdev-properties.h"
28 #include "hw/qdev-properties-system.h"
36     case SHAKTI_UART_BAUD:  in shakti_uart_read()
37         return s->uart_baud;  in shakti_uart_read()
38     case SHAKTI_UART_RX:  in shakti_uart_read()
39         qemu_chr_fe_accept_input(&s->chr);  in shakti_uart_read()
40         s->uart_status &= ~SHAKTI_UART_STATUS_RX_NOT_EMPTY;  in shakti_uart_read()
41         return s->uart_rx;  in shakti_uart_read()
42     case SHAKTI_UART_STATUS:  in shakti_uart_read()
43         return s->uart_status;  in shakti_uart_read()
44     case SHAKTI_UART_DELAY:  in shakti_uart_read()
45         return s->uart_delay;  in shakti_uart_read()
46     case SHAKTI_UART_CONTROL:  in shakti_uart_read()
47         return s->uart_control;  in shakti_uart_read()
48     case SHAKTI_UART_INT_EN:  in shakti_uart_read()
49         return s->uart_interrupt;  in shakti_uart_read()
50     case SHAKTI_UART_IQ_CYCLES:  in shakti_uart_read()
51         return s->uart_iq_cycles;  in shakti_uart_read()
52     case SHAKTI_UART_RX_THRES:  in shakti_uart_read()
53         return s->uart_rx_threshold;  in shakti_uart_read()
71     case SHAKTI_UART_BAUD:  in shakti_uart_write()
72         s->uart_baud = value;  in shakti_uart_write()
74     case SHAKTI_UART_TX:  in shakti_uart_write()
76         qemu_chr_fe_write_all(&s->chr, &ch, 1);  in shakti_uart_write()
77         s->uart_status &= ~SHAKTI_UART_STATUS_TX_FULL;  in shakti_uart_write()
79     case SHAKTI_UART_STATUS:  in shakti_uart_write()
80         s->uart_status = value;  in shakti_uart_write()
82     case SHAKTI_UART_DELAY:  in shakti_uart_write()
83         s->uart_delay = value;  in shakti_uart_write()
85     case SHAKTI_UART_CONTROL:  in shakti_uart_write()
86         s->uart_control = value;  in shakti_uart_write()
88     case SHAKTI_UART_INT_EN:  in shakti_uart_write()
89         s->uart_interrupt = value;  in shakti_uart_write()
91     case SHAKTI_UART_IQ_CYCLES:  in shakti_uart_write()
92         s->uart_iq_cycles = value;  in shakti_uart_write()
94     case SHAKTI_UART_RX_THRES:  in shakti_uart_write()
95         s->uart_rx_threshold = value;  in shakti_uart_write()
115     s->uart_baud = SHAKTI_UART_BAUD_DEFAULT;  in shakti_uart_reset()
116     s->uart_tx = 0x0;  in shakti_uart_reset()
117     s->uart_rx = 0x0;  in shakti_uart_reset()
118     s->uart_status = 0x0000;  in shakti_uart_reset()
119     s->uart_delay = 0x0000;  in shakti_uart_reset()
120     s->uart_control = SHAKTI_UART_CONTROL_DEFAULT;  in shakti_uart_reset()
121     s->uart_interrupt = 0x0000;  in shakti_uart_reset()
122     s->uart_iq_cycles = 0x00;  in shakti_uart_reset()
123     s->uart_rx_threshold = 0x00;  in shakti_uart_reset()
130     return !(s->uart_status & SHAKTI_UART_STATUS_RX_NOT_EMPTY);  in shakti_uart_can_receive()
137     s->uart_rx = *buf;  in shakti_uart_receive()
138     s->uart_status |= SHAKTI_UART_STATUS_RX_NOT_EMPTY;  in shakti_uart_receive()
144     qemu_chr_fe_set_handlers(&sus->chr, shakti_uart_can_receive,  in shakti_uart_realize()
151     memory_region_init_io(&sus->mmio,  in shakti_uart_instance_init()
157     sysbus_init_mmio(SYS_BUS_DEVICE(obj), &sus->mmio);  in shakti_uart_instance_init()
168     dc->realize = shakti_uart_realize;  in shakti_uart_class_init()
170     set_bit(DEVICE_CATEGORY_INPUT, dc->categories);  in shakti_uart_class_init()