Lines Matching full:1
42 #define UART_DATA_READY (1 << 0)
43 #define UART_TRANSMIT_SHIFT_EMPTY (1 << 1)
44 #define UART_TRANSMIT_FIFO_EMPTY (1 << 2)
45 #define UART_BREAK_RECEIVED (1 << 3)
46 #define UART_OVERRUN (1 << 4)
47 #define UART_PARITY_ERROR (1 << 5)
48 #define UART_FRAMING_ERROR (1 << 6)
49 #define UART_TRANSMIT_FIFO_HALF (1 << 7)
50 #define UART_RECEIVE_FIFO_HALF (1 << 8)
51 #define UART_TRANSMIT_FIFO_FULL (1 << 9)
52 #define UART_RECEIVE_FIFO_FULL (1 << 10)
55 #define UART_RECEIVE_ENABLE (1 << 0)
56 #define UART_TRANSMIT_ENABLE (1 << 1)
57 #define UART_RECEIVE_INTERRUPT (1 << 2)
58 #define UART_TRANSMIT_INTERRUPT (1 << 3)
59 #define UART_PARITY_SELECT (1 << 4)
60 #define UART_PARITY_ENABLE (1 << 5)
61 #define UART_FLOW_CONTROL (1 << 6)
62 #define UART_LOOPBACK (1 << 7)
63 #define UART_EXTERNAL_CLOCK (1 << 8)
64 #define UART_RECEIVE_FIFO_INTERRUPT (1 << 9)
65 #define UART_TRANSMIT_FIFO_INTERRUPT (1 << 10)
66 #define UART_FIFO_DEBUG_MODE (1 << 11)
67 #define UART_OUTPUT_ENABLE (1 << 12)
68 #define UART_FIFO_AVAILABLE (1 << 31)
215 qemu_chr_fe_write_all(&uart->chr, &c, 1); in grlib_apbuart_write()