58 #define UINTSP     0x0034 /* Interrupt Source Pending */  macro
89     {"UINTSP",   UINTSP,   0x00000000},
296             s->reg[I_(UINTSP)] |= UINTSP_TXD;  in exynos4210_uart_update_irq()
307             s->reg[I_(UINTSP)] |= UINTSP_RXD;  in exynos4210_uart_update_irq()
312         s->reg[I_(UINTSP)] |= UINTSP_RXD;  in exynos4210_uart_update_irq()
315     s->reg[I_(UINTP)] = s->reg[I_(UINTSP)] & ~s->reg[I_(UINTM)];  in exynos4210_uart_update_irq()
331                                  s->reg[I_(UINTSP)]);  in exynos4210_uart_timeout_int()
335         s->reg[I_(UINTSP)] |= UINTSP_RXD;  in exynos4210_uart_timeout_int()
441             s->reg[I_(UINTSP)]  |= UINTSP_TXD;  in exynos4210_uart_write()
448         s->reg[I_(UINTSP)] &= ~val;  in exynos4210_uart_write()
464     case UINTSP:  in exynos4210_uart_write()
465         s->reg[I_(UINTSP)]  &= ~val;  in exynos4210_uart_write()
514                 s->reg[I_(UINTSP)] |= UINTSP_ERROR;  in exynos4210_uart_read()
572             s->reg[I_(UINTSP)] |= UINTSP_ERROR;  in exynos4210_uart_receive()