Lines Matching +full:async +full:- +full:enum
4 * Copyright (c) 2019-2020 Philippe Mathieu-Daudé
7 * See the COPYING file in the top-level directory.
8 * SPDX-License-Identifier: GPL-2.0-or-later
17 #include "system/address-spaces.h"
19 #include "hw/qdev-properties.h"
26 enum AtmegaPeripheral {
42 enum AtmegaPeripheral power_index;
89 [TIMER2] = { 0xb0, POWER0, 6, 0x70, 0x37, false }, /* TODO async */
105 enum AtmegaIrq {
196 int cpu_irq = k->irq[peripheral_index]; in connect_peripheral_irq()
203 cpu_irq -= 2; in connect_peripheral_irq()
213 unsigned power_index = k->dev[peripheral_index].power_index; in connect_power_reduction_gpio()
214 assert(k->dev[power_index].addr); in connect_power_reduction_gpio()
215 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pwr[power_index - POWER0]), in connect_power_reduction_gpio()
216 k->dev[peripheral_index].power_bit, in connect_power_reduction_gpio()
229 if (!s->xtal_freq_hz) { in atmega_realize()
230 error_setg(errp, "\"xtal-frequency-hz\" property must be provided."); in atmega_realize()
235 object_initialize_child(OBJECT(dev), "cpu", &s->cpu, mc->cpu_type); in atmega_realize()
237 object_property_set_uint(OBJECT(&s->cpu), "init-sp", in atmega_realize()
238 mc->io_size + mc->sram_size - 1, &error_abort); in atmega_realize()
240 qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); in atmega_realize()
241 cpudev = DEVICE(&s->cpu); in atmega_realize()
253 assert(mc->io_size == 0x100 || mc->io_size == 0x200); in atmega_realize()
254 if (mc->io_size >= TARGET_PAGE_SIZE) { in atmega_realize()
255 memory_region_init_ram(&s->sram, OBJECT(dev), "sram", mc->sram_size, in atmega_realize()
258 OFFSET_DATA + mc->io_size, &s->sram); in atmega_realize()
260 int sram_io_size = TARGET_PAGE_SIZE - mc->io_size; in atmega_realize()
263 memory_region_init_ram_device_ptr(&s->sram_io, OBJECT(dev), "sram-as-io", in atmega_realize()
266 OFFSET_DATA + mc->io_size, &s->sram_io); in atmega_realize()
267 vmstate_register_ram(&s->sram_io, dev); in atmega_realize()
269 memory_region_init_ram(&s->sram, OBJECT(dev), "sram", in atmega_realize()
270 mc->sram_size - sram_io_size, &error_abort); in atmega_realize()
272 OFFSET_DATA + TARGET_PAGE_SIZE, &s->sram); in atmega_realize()
276 memory_region_init_rom(&s->flash, OBJECT(dev), in atmega_realize()
277 "flash", mc->flash_size, &error_fatal); in atmega_realize()
278 memory_region_add_subregion(get_system_memory(), OFFSET_CODE, &s->flash); in atmega_realize()
283 * 0x00 - 0x1f: Registers in atmega_realize()
284 * 0x20 - 0x5f: I/O memory in atmega_realize()
285 * 0x60 - 0xff: Extended I/O in atmega_realize()
287 s->io = qdev_new(TYPE_UNIMPLEMENTED_DEVICE); in atmega_realize()
288 qdev_prop_set_string(s->io, "name", "I/O"); in atmega_realize()
289 qdev_prop_set_uint64(s->io, "size", mc->io_size); in atmega_realize()
290 sysbus_realize_and_unref(SYS_BUS_DEVICE(s->io), &error_fatal); in atmega_realize()
291 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->io), 0, OFFSET_DATA, -1234); in atmega_realize()
296 if (!mc->dev[idx].addr) { in atmega_realize()
300 object_initialize_child(OBJECT(dev), devname, &s->pwr[i], in atmega_realize()
302 sysbus_realize(SYS_BUS_DEVICE(&s->pwr[i]), &error_abort); in atmega_realize()
303 sysbus_mmio_map(SYS_BUS_DEVICE(&s->pwr[i]), 0, in atmega_realize()
304 OFFSET_DATA + mc->dev[idx].addr); in atmega_realize()
311 if (!mc->dev[idx].addr) { in atmega_realize()
314 devname = g_strdup_printf("atmega-gpio-%c", 'a' + (char)i); in atmega_realize()
316 OFFSET_DATA + mc->dev[idx].addr, 3); in atmega_realize()
323 if (!mc->dev[idx].addr) { in atmega_realize()
327 object_initialize_child(OBJECT(dev), devname, &s->usart[i], in atmega_realize()
329 qdev_prop_set_chr(DEVICE(&s->usart[i]), "chardev", serial_hd(i)); in atmega_realize()
330 sbd = SYS_BUS_DEVICE(&s->usart[i]); in atmega_realize()
332 sysbus_mmio_map(sbd, 0, OFFSET_DATA + mc->dev[USART(i)].addr); in atmega_realize()
336 connect_power_reduction_gpio(s, mc, DEVICE(&s->usart[i]), idx); in atmega_realize()
343 if (!mc->dev[idx].addr) { in atmega_realize()
346 if (!mc->dev[idx].is_timer16) { in atmega_realize()
347 create_unimplemented_device("avr-timer8", in atmega_realize()
348 OFFSET_DATA + mc->dev[idx].addr, 5); in atmega_realize()
349 create_unimplemented_device("avr-timer8-intmask", in atmega_realize()
351 + mc->dev[idx].intmask_addr, 1); in atmega_realize()
352 create_unimplemented_device("avr-timer8-intflag", in atmega_realize()
354 + mc->dev[idx].intflag_addr, 1); in atmega_realize()
358 object_initialize_child(OBJECT(dev), devname, &s->timer[i], in atmega_realize()
360 object_property_set_uint(OBJECT(&s->timer[i]), "cpu-frequency-hz", in atmega_realize()
361 s->xtal_freq_hz, &error_abort); in atmega_realize()
362 sbd = SYS_BUS_DEVICE(&s->timer[i]); in atmega_realize()
364 sysbus_mmio_map(sbd, 0, OFFSET_DATA + mc->dev[idx].addr); in atmega_realize()
365 sysbus_mmio_map(sbd, 1, OFFSET_DATA + mc->dev[idx].intmask_addr); in atmega_realize()
366 sysbus_mmio_map(sbd, 2, OFFSET_DATA + mc->dev[idx].intflag_addr); in atmega_realize()
372 connect_power_reduction_gpio(s, mc, DEVICE(&s->timer[i]), idx); in atmega_realize()
376 create_unimplemented_device("avr-twi", OFFSET_DATA + 0x0b8, 6); in atmega_realize()
377 create_unimplemented_device("avr-adc", OFFSET_DATA + 0x078, 8); in atmega_realize()
378 create_unimplemented_device("avr-ext-mem-ctrl", OFFSET_DATA + 0x074, 2); in atmega_realize()
379 create_unimplemented_device("avr-watchdog", OFFSET_DATA + 0x060, 1); in atmega_realize()
380 create_unimplemented_device("avr-spi", OFFSET_DATA + 0x04c, 3); in atmega_realize()
381 create_unimplemented_device("avr-eeprom", OFFSET_DATA + 0x03f, 3); in atmega_realize()
385 DEFINE_PROP_UINT64("xtal-frequency-hz", AtmegaMcuState,
393 dc->realize = atmega_realize; in atmega_class_init()
396 dc->user_creatable = false; in atmega_class_init()
403 amc->cpu_type = AVR_CPU_TYPE_NAME("avr5"); in atmega168_class_init()
404 amc->flash_size = 16 * KiB; in atmega168_class_init()
405 amc->eeprom_size = 512; in atmega168_class_init()
406 amc->sram_size = 1 * KiB; in atmega168_class_init()
407 amc->io_size = 256; in atmega168_class_init()
408 amc->gpio_count = 23; in atmega168_class_init()
409 amc->adc_count = 6; in atmega168_class_init()
410 amc->irq = irq168_328; in atmega168_class_init()
411 amc->dev = dev168_328; in atmega168_class_init()
418 amc->cpu_type = AVR_CPU_TYPE_NAME("avr5"); in atmega328_class_init()
419 amc->flash_size = 32 * KiB; in atmega328_class_init()
420 amc->eeprom_size = 1 * KiB; in atmega328_class_init()
421 amc->sram_size = 2 * KiB; in atmega328_class_init()
422 amc->io_size = 256; in atmega328_class_init()
423 amc->gpio_count = 23; in atmega328_class_init()
424 amc->adc_count = 6; in atmega328_class_init()
425 amc->irq = irq168_328; in atmega328_class_init()
426 amc->dev = dev168_328; in atmega328_class_init()
433 amc->cpu_type = AVR_CPU_TYPE_NAME("avr51"); in atmega1280_class_init()
434 amc->flash_size = 128 * KiB; in atmega1280_class_init()
435 amc->eeprom_size = 4 * KiB; in atmega1280_class_init()
436 amc->sram_size = 8 * KiB; in atmega1280_class_init()
437 amc->io_size = 512; in atmega1280_class_init()
438 amc->gpio_count = 86; in atmega1280_class_init()
439 amc->adc_count = 16; in atmega1280_class_init()
440 amc->irq = irq1280_2560; in atmega1280_class_init()
441 amc->dev = dev1280_2560; in atmega1280_class_init()
448 amc->cpu_type = AVR_CPU_TYPE_NAME("avr6"); in atmega2560_class_init()
449 amc->flash_size = 256 * KiB; in atmega2560_class_init()
450 amc->eeprom_size = 4 * KiB; in atmega2560_class_init()
451 amc->sram_size = 8 * KiB; in atmega2560_class_init()
452 amc->io_size = 512; in atmega2560_class_init()
453 amc->gpio_count = 54; in atmega2560_class_init()
454 amc->adc_count = 16; in atmega2560_class_init()
455 amc->irq = irq1280_2560; in atmega2560_class_init()
456 amc->dev = dev1280_2560; in atmega2560_class_init()