Lines Matching refs:mpu
730 static void omap_ulpd_pm_reset(struct omap_mpu_state_s *mpu) in omap_ulpd_pm_reset() argument
732 mpu->ulpd_pm_regs[0x00 >> 2] = 0x0001; in omap_ulpd_pm_reset()
733 mpu->ulpd_pm_regs[0x04 >> 2] = 0x0000; in omap_ulpd_pm_reset()
734 mpu->ulpd_pm_regs[0x08 >> 2] = 0x0001; in omap_ulpd_pm_reset()
735 mpu->ulpd_pm_regs[0x0c >> 2] = 0x0000; in omap_ulpd_pm_reset()
736 mpu->ulpd_pm_regs[0x10 >> 2] = 0x0000; in omap_ulpd_pm_reset()
737 mpu->ulpd_pm_regs[0x18 >> 2] = 0x01; in omap_ulpd_pm_reset()
738 mpu->ulpd_pm_regs[0x1c >> 2] = 0x01; in omap_ulpd_pm_reset()
739 mpu->ulpd_pm_regs[0x20 >> 2] = 0x01; in omap_ulpd_pm_reset()
740 mpu->ulpd_pm_regs[0x24 >> 2] = 0x03ff; in omap_ulpd_pm_reset()
741 mpu->ulpd_pm_regs[0x28 >> 2] = 0x01; in omap_ulpd_pm_reset()
742 mpu->ulpd_pm_regs[0x2c >> 2] = 0x01; in omap_ulpd_pm_reset()
743 omap_ulpd_clk_update(mpu, mpu->ulpd_pm_regs[0x30 >> 2], 0x0000); in omap_ulpd_pm_reset()
744 mpu->ulpd_pm_regs[0x30 >> 2] = 0x0000; in omap_ulpd_pm_reset()
745 omap_ulpd_req_update(mpu, mpu->ulpd_pm_regs[0x34 >> 2], 0x0000); in omap_ulpd_pm_reset()
746 mpu->ulpd_pm_regs[0x34 >> 2] = 0x0000; in omap_ulpd_pm_reset()
747 mpu->ulpd_pm_regs[0x38 >> 2] = 0x0001; in omap_ulpd_pm_reset()
748 mpu->ulpd_pm_regs[0x3c >> 2] = 0x2211; in omap_ulpd_pm_reset()
749 mpu->ulpd_pm_regs[0x40 >> 2] = 0x0000; /* FIXME: dump a real STATUS_REQ */ in omap_ulpd_pm_reset()
750 mpu->ulpd_pm_regs[0x48 >> 2] = 0x960; in omap_ulpd_pm_reset()
751 mpu->ulpd_pm_regs[0x4c >> 2] = 0x08; in omap_ulpd_pm_reset()
752 mpu->ulpd_pm_regs[0x50 >> 2] = 0x08; in omap_ulpd_pm_reset()
753 omap_clk_setrate(omap_findclk(mpu, "dpll4"), 1, 4); in omap_ulpd_pm_reset()
754 omap_clk_reparent(omap_findclk(mpu, "ck_48m"), omap_findclk(mpu, "dpll4")); in omap_ulpd_pm_reset()
759 struct omap_mpu_state_s *mpu) in omap_ulpd_pm_init() argument
761 memory_region_init_io(&mpu->ulpd_pm_iomem, NULL, &omap_ulpd_pm_ops, mpu, in omap_ulpd_pm_init()
763 memory_region_add_subregion(system_memory, base, &mpu->ulpd_pm_iomem); in omap_ulpd_pm_init()
764 omap_ulpd_pm_reset(mpu); in omap_ulpd_pm_init()
964 static void omap_pin_cfg_reset(struct omap_mpu_state_s *mpu) in omap_pin_cfg_reset() argument
967 mpu->compat1509 = 1; in omap_pin_cfg_reset()
968 omap_pin_funcmux0_update(mpu, mpu->func_mux_ctrl[0], 0); in omap_pin_cfg_reset()
969 omap_pin_funcmux1_update(mpu, mpu->func_mux_ctrl[1], 0); in omap_pin_cfg_reset()
970 omap_pin_modconf1_update(mpu, mpu->mod_conf_ctrl[0], 0); in omap_pin_cfg_reset()
971 memset(mpu->func_mux_ctrl, 0, sizeof(mpu->func_mux_ctrl)); in omap_pin_cfg_reset()
972 memset(mpu->comp_mode_ctrl, 0, sizeof(mpu->comp_mode_ctrl)); in omap_pin_cfg_reset()
973 memset(mpu->pull_dwn_ctrl, 0, sizeof(mpu->pull_dwn_ctrl)); in omap_pin_cfg_reset()
974 memset(mpu->gate_inh_ctrl, 0, sizeof(mpu->gate_inh_ctrl)); in omap_pin_cfg_reset()
975 memset(mpu->voltage_ctrl, 0, sizeof(mpu->voltage_ctrl)); in omap_pin_cfg_reset()
976 memset(mpu->test_dbg_ctrl, 0, sizeof(mpu->test_dbg_ctrl)); in omap_pin_cfg_reset()
977 memset(mpu->mod_conf_ctrl, 0, sizeof(mpu->mod_conf_ctrl)); in omap_pin_cfg_reset()
982 struct omap_mpu_state_s *mpu) in omap_pin_cfg_init() argument
984 memory_region_init_io(&mpu->pin_cfg_iomem, NULL, &omap_pin_cfg_ops, mpu, in omap_pin_cfg_init()
986 memory_region_add_subregion(system_memory, base, &mpu->pin_cfg_iomem); in omap_pin_cfg_init()
987 omap_pin_cfg_reset(mpu); in omap_pin_cfg_init()
1055 static void omap_id_init(MemoryRegion *memory, struct omap_mpu_state_s *mpu) in omap_id_init() argument
1057 memory_region_init_io(&mpu->id_iomem, NULL, &omap_id_ops, mpu, in omap_id_init()
1059 memory_region_init_alias(&mpu->id_iomem_e18, NULL, "omap-id-e18", &mpu->id_iomem, in omap_id_init()
1061 memory_region_add_subregion(memory, 0xfffe1800, &mpu->id_iomem_e18); in omap_id_init()
1062 memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-ed4", &mpu->id_iomem, in omap_id_init()
1064 memory_region_add_subregion(memory, 0xfffed400, &mpu->id_iomem_ed4); in omap_id_init()
1065 if (!cpu_is_omap15xx(mpu)) { in omap_id_init()
1066 memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-e20", in omap_id_init()
1067 &mpu->id_iomem, 0xfffe2000, 0x800); in omap_id_init()
1068 memory_region_add_subregion(memory, 0xfffe2000, &mpu->id_iomem_e20); in omap_id_init()
1150 struct omap_mpu_state_s *mpu) in omap_mpui_init() argument
1152 memory_region_init_io(&mpu->mpui_iomem, NULL, &omap_mpui_ops, mpu, in omap_mpui_init()
1154 memory_region_add_subregion(memory, base, &mpu->mpui_iomem); in omap_mpui_init()
1156 omap_mpui_reset(mpu); in omap_mpui_init()
1352 static void omap_tcmi_reset(struct omap_mpu_state_s *mpu) in omap_tcmi_reset() argument
1354 mpu->tcmi_regs[0x00 >> 2] = 0x00000000; in omap_tcmi_reset()
1355 mpu->tcmi_regs[0x04 >> 2] = 0x00000000; in omap_tcmi_reset()
1356 mpu->tcmi_regs[0x08 >> 2] = 0x00000000; in omap_tcmi_reset()
1357 mpu->tcmi_regs[0x0c >> 2] = 0x00000010; in omap_tcmi_reset()
1358 mpu->tcmi_regs[0x10 >> 2] = 0x0010fffb; in omap_tcmi_reset()
1359 mpu->tcmi_regs[0x14 >> 2] = 0x0010fffb; in omap_tcmi_reset()
1360 mpu->tcmi_regs[0x18 >> 2] = 0x0010fffb; in omap_tcmi_reset()
1361 mpu->tcmi_regs[0x1c >> 2] = 0x0010fffb; in omap_tcmi_reset()
1362 mpu->tcmi_regs[0x20 >> 2] = 0x00618800; in omap_tcmi_reset()
1363 mpu->tcmi_regs[0x24 >> 2] = 0x00000037; in omap_tcmi_reset()
1364 mpu->tcmi_regs[0x28 >> 2] = 0x00000000; in omap_tcmi_reset()
1365 mpu->tcmi_regs[0x2c >> 2] = 0x00000000; in omap_tcmi_reset()
1366 mpu->tcmi_regs[0x30 >> 2] = 0x00000000; in omap_tcmi_reset()
1367 mpu->tcmi_regs[0x3c >> 2] = 0x00000003; in omap_tcmi_reset()
1368 mpu->tcmi_regs[0x40 >> 2] = 0x00000000; in omap_tcmi_reset()
1372 struct omap_mpu_state_s *mpu) in omap_tcmi_init() argument
1374 memory_region_init_io(&mpu->tcmi_iomem, NULL, &omap_tcmi_ops, mpu, in omap_tcmi_init()
1376 memory_region_add_subregion(memory, base, &mpu->tcmi_iomem); in omap_tcmi_init()
1377 omap_tcmi_reset(mpu); in omap_tcmi_init()
3654 struct omap_mpu_state_s *mpu) in omap_setup_mpui_io() argument
3656 memory_region_init_io(&mpu->mpui_io_iomem, NULL, &omap_mpui_io_ops, mpu, in omap_setup_mpui_io()
3659 &mpu->mpui_io_iomem); in omap_setup_mpui_io()
3665 struct omap_mpu_state_s *mpu = opaque; in omap1_mpu_reset() local
3667 omap_dma_reset(mpu->dma); in omap1_mpu_reset()
3668 omap_mpu_timer_reset(mpu->timer[0]); in omap1_mpu_reset()
3669 omap_mpu_timer_reset(mpu->timer[1]); in omap1_mpu_reset()
3670 omap_mpu_timer_reset(mpu->timer[2]); in omap1_mpu_reset()
3671 omap_wd_timer_reset(mpu->wdt); in omap1_mpu_reset()
3672 omap_os_timer_reset(mpu->os_timer); in omap1_mpu_reset()
3673 omap_lcdc_reset(mpu->lcd); in omap1_mpu_reset()
3674 omap_ulpd_pm_reset(mpu); in omap1_mpu_reset()
3675 omap_pin_cfg_reset(mpu); in omap1_mpu_reset()
3676 omap_mpui_reset(mpu); in omap1_mpu_reset()
3677 omap_tipb_bridge_reset(mpu->private_tipb); in omap1_mpu_reset()
3678 omap_tipb_bridge_reset(mpu->public_tipb); in omap1_mpu_reset()
3679 omap_dpll_reset(mpu->dpll[0]); in omap1_mpu_reset()
3680 omap_dpll_reset(mpu->dpll[1]); in omap1_mpu_reset()
3681 omap_dpll_reset(mpu->dpll[2]); in omap1_mpu_reset()
3682 omap_uart_reset(mpu->uart[0]); in omap1_mpu_reset()
3683 omap_uart_reset(mpu->uart[1]); in omap1_mpu_reset()
3684 omap_uart_reset(mpu->uart[2]); in omap1_mpu_reset()
3685 omap_mpuio_reset(mpu->mpuio); in omap1_mpu_reset()
3686 omap_uwire_reset(mpu->microwire); in omap1_mpu_reset()
3687 omap_pwl_reset(mpu->pwl); in omap1_mpu_reset()
3688 omap_pwt_reset(mpu->pwt); in omap1_mpu_reset()
3689 omap_rtc_reset(mpu->rtc); in omap1_mpu_reset()
3690 omap_mcbsp_reset(mpu->mcbsp1); in omap1_mpu_reset()
3691 omap_mcbsp_reset(mpu->mcbsp2); in omap1_mpu_reset()
3692 omap_mcbsp_reset(mpu->mcbsp3); in omap1_mpu_reset()
3693 omap_lpg_reset(mpu->led[0]); in omap1_mpu_reset()
3694 omap_lpg_reset(mpu->led[1]); in omap1_mpu_reset()
3695 omap_clkm_reset(mpu); in omap1_mpu_reset()
3696 cpu_reset(CPU(mpu->cpu)); in omap1_mpu_reset()
3744 struct omap_mpu_state_s *mpu = opaque; in omap_mpu_wakeup() local
3745 CPUState *cpu = CPU(mpu->cpu); in omap_mpu_wakeup()