7  * See the COPYING file in the top-level directory.
35     int ticks = tr->tco.tmr & TCO_TMR_MASK;  in tco_timer_reload()
39     tr->expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + nsec;  in tco_timer_reload()
40     timer_mod(tr->tco_timer, tr->expire_time);  in tco_timer_reload()
45     tr->expire_time = -1;  in tco_timer_stop()
46     timer_del(tr->tco_timer);  in tco_timer_stop()
54     uint32_t gcs = pci_get_long(lpc->chip_config + ICH9_CC_GCS);  in tco_timer_expired()
56     trace_tco_timer_expired(tr->timeouts_no,  in tco_timer_expired()
57                             lpc->pin_strap.spkr_hi,  in tco_timer_expired()
59     tr->tco.rld = 0;  in tco_timer_expired()
60     tr->tco.sts1 |= TCO_TIMEOUT;  in tco_timer_expired()
61     if (++tr->timeouts_no == 2) {  in tco_timer_expired()
62         tr->tco.sts2 |= TCO_SECOND_TO_STS;  in tco_timer_expired()
63         tr->tco.sts2 |= TCO_BOOT_STS;  in tco_timer_expired()
64         tr->timeouts_no = 0;  in tco_timer_expired()
66         if (!lpc->pin_strap.spkr_hi && !(gcs & ICH9_CC_GCS_NO_REBOOT)) {  in tco_timer_expired()
73     if (pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN) {  in tco_timer_expired()
76     tr->tco.rld = tr->tco.tmr;  in tco_timer_expired()
83     return !(tr->tco.cnt1 & TCO_TMR_HLT) && tr->tco.tmr > 1;  in can_start_tco_timer()
93         if (tr->expire_time != -1) {  in tco_ioport_readw()
95             int64_t elapsed = (tr->expire_time - now) / TCO_TICK_NSEC;  in tco_ioport_readw()
96             rld = (uint16_t)elapsed | (tr->tco.rld & ~TCO_RLD_MASK);  in tco_ioport_readw()
98             rld = tr->tco.rld;  in tco_ioport_readw()
103         ret = tr->tco.din;  in tco_ioport_readw()
106         ret = tr->tco.dout;  in tco_ioport_readw()
109         ret = tr->tco.sts1;  in tco_ioport_readw()
112         ret = tr->tco.sts2;  in tco_ioport_readw()
115         ret = tr->tco.cnt1;  in tco_ioport_readw()
118         ret = tr->tco.cnt2;  in tco_ioport_readw()
121         ret = tr->tco.msg1;  in tco_ioport_readw()
124         ret = tr->tco.msg2;  in tco_ioport_readw()
127         ret = tr->tco.wdcnt;  in tco_ioport_readw()
130         ret = tr->tco.tmr;  in tco_ioport_readw()
133         ret = tr->sw_irq_gen;  in tco_ioport_readw()
145         tr->timeouts_no = 0;  in tco_ioport_writew()
147             tr->tco.rld = tr->tco.tmr;  in tco_ioport_writew()
150             tr->tco.rld = val;  in tco_ioport_writew()
154         tr->tco.din = val;  in tco_ioport_writew()
155         tr->tco.sts1 |= SW_TCO_SMI;  in tco_ioport_writew()
159         tr->tco.dout = val;  in tco_ioport_writew()
160         tr->tco.sts1 |= TCO_INT_STS;  in tco_ioport_writew()
164         tr->tco.sts1 = val & TCO1_STS_MASK;  in tco_ioport_writew()
167         tr->tco.sts2 = val & TCO2_STS_MASK;  in tco_ioport_writew()
173          * is required to change this bit from 1 to 0 -- it defaults to 0.  in tco_ioport_writew()
175         tr->tco.cnt1 = val | (tr->tco.cnt1 & TCO_LOCK);  in tco_ioport_writew()
177             tr->tco.rld = tr->tco.tmr;  in tco_ioport_writew()
184         tr->tco.cnt2 = val;  in tco_ioport_writew()
187         tr->tco.msg1 = val;  in tco_ioport_writew()
190         tr->tco.msg2 = val;  in tco_ioport_writew()
193         tr->tco.wdcnt = val;  in tco_ioport_writew()
196         tr->tco.tmr = val;  in tco_ioport_writew()
199         tr->sw_irq_gen = val;  in tco_ioport_writew()
204 static uint64_t tco_io_readw(void *opaque, hwaddr addr, unsigned width)  in tco_io_readw()  argument
211                           unsigned width)  in tco_io_writew()  argument
245         .expire_time   = -1,  in acpi_pm_tco_init()
248     memory_region_init_io(&tr->io, memory_region_owner(parent),  in acpi_pm_tco_init()
249                           &tco_io_ops, tr, "sm-tco", ICH9_PMIO_TCO_LEN);  in acpi_pm_tco_init()
250     memory_region_add_subregion(parent, ICH9_PMIO_TCO_RLD, &tr->io);  in acpi_pm_tco_init()
254     .name = "tco io device status",