system/riscv/virt.rst

8 real-world hardware.
11 -----------------
17 * Platform-Level Interrupt Controller (PLIC)
22 * 8 virtio-mmio transport devices
27 machines with hypervisor extension can simply be used without explicitly
31 ----------------------------------
34 which it passes to the guest, if there is no ``-dtb`` option. This provides
39 If users want to provide their own DTB, they can use the ``-dtb`` option.
42 * The number of subnodes of the /cpus node should match QEMU's ``-smp`` option
43 * The /memory reg size should match QEMU’s selected ram_size via ``-m``
48 ------------
50 The ``virt`` machine can start using the standard -kernel functionality
51 for loading a Linux kernel, a VxWorks kernel, an S-mode U-Boot bootloader
52 with the default OpenSBI firmware image as the -bios. It also supports
53 the recommended RISC-V bootflow: U-Boot SPL (M-mode) loads OpenSBI fw_dynamic
54 firmware and U-Boot proper (S-mode), using the standard -bios functionality.
57 -------------------
60 S-mode firmware code. It can be configured as read-only, with the
65 .. code-block:: bash
67   $ qemu-system-riscv64 \
68      -blockdev node-name=pflash0,driver=file,read-only=on,filename=<edk2_code> \
69      -blockdev node-name=pflash1,driver=file,filename=<edk2_vars> \
70      -M virt,pflash0=pflash0,pflash1=pflash1 \
73 For TCG guests only, it is also possible to boot M-mode firmware from
74 the first flash device (pflash0) by additionally passing ``-bios
77 .. code-block:: bash
79   $ qemu-system-riscv64 \
80      -bios none \
81      -blockdev node-name=pflash0,driver=file,read-only=on,filename=<m_mode_code> \
82      -M virt,pflash0=pflash0 \
87 riscv-iommu support
88 -------------------
90 The board has support for the riscv-iommu-pci device by using the following
93 .. code-block:: bash
95   $ qemu-system-riscv64 -M virt -device riscv-iommu-pci (...)
97 It also has support for the riscv-iommu-sys platform device:
99 .. code-block:: bash
101   $ qemu-system-riscv64 -M virt,iommu-sys=on (...)
103 Refer to :ref:`riscv-iommu` for more information on how the RISC-V IOMMU support
106 Machine-specific options
107 ------------------------
109 The following machine-specific options are supported:
111 - aclint=[on|off]
117 - acpi=[on|off|auto]
122 - aia=[none|aplic|aplic-imsic]
127   interrupts whereas the "aia=aplic-imsic" selects APLIC and IMSIC (incoming
132   This option also interacts with '-accel kvm'.  When using "aia=aplic-imsic"
134   by using "-accel kvm,kernel-irqchip=split".  In this case the ``virt`` machine
136   the irqchip.  See :ref:`riscv-aia` for more details on all available AIA
139 - aia-guests=nnn
141   The number of per-HART VS-level AIA IMSIC pages to be emulated for a guest
142   having AIA IMSIC (i.e. "aia=aplic-imsic" selected). When not specified,
143   the default number of per-HART VS-level AIA IMSIC pages is 0.
145 - iommu-sys=[on|off]
147   Enables the riscv-iommu-sys platform device. Defaults to 'off'.
150 --------------------
152 Linux mainline v5.12 release is tested at the time of writing. To build a
154 64-bit mode, simply configure the kernel using the defconfig configuration:
156 .. code-block:: bash
159   $ export CROSS_COMPILE=riscv64-linux-
165 .. code-block:: bash
167   $ qemu-system-riscv64 -M virt -smp 4 -m 2G \
168       -display none -serial stdio \
169       -kernel arch/riscv/boot/Image \
170       -initrd /path/to/rootfs.cpio \
171       -append "root=/dev/ram"
173 To build a Linux mainline kernel that can be booted by the ``virt`` machine
174 in 32-bit mode, use the rv32_defconfig configuration. A patch is required to
175 fix the 32-bit boot issue for Linux kernel v5.12.
177 .. code-block:: bash
180   $ export CROSS_COMPILE=riscv64-linux-
181 …$ curl https://patchwork.kernel.org/project/linux-riscv/patch/20210627135117.28641-1-bmeng.cn@gmai…
186 Replace ``qemu-system-riscv64`` with ``qemu-system-riscv32`` in the command
187 line above to boot the 32-bit Linux kernel. A rootfs image containing 32-bit
190 Running U-Boot
191 --------------
193 U-Boot mainline v2021.04 release is tested at the time of writing. To build an
194 S-mode U-Boot bootloader that can be booted by the ``virt`` machine, use
195 the qemu-riscv64_smode_defconfig with similar commands as described above for Linux:
197 .. code-block:: bash
199   $ export CROSS_COMPILE=riscv64-linux-
200   $ make qemu-riscv64_smode_defconfig
202 Boot the 64-bit U-Boot S-mode image directly:
204 .. code-block:: bash
206   $ qemu-system-riscv64 -M virt -smp 4 -m 2G \
207       -display none -serial stdio \
208       -kernel /path/to/u-boot.bin
210 To test booting U-Boot SPL which in M-mode, which in turn loads a FIT image
211 that bundles OpenSBI fw_dynamic firmware and U-Boot proper (S-mode) together,
212 build the U-Boot images using riscv64_spl_defconfig:
214 .. code-block:: bash
216   $ export CROSS_COMPILE=riscv64-linux-
217   $ export OPENSBI=/path/to/opensbi-riscv64-generic-fw_dynamic.bin
218   $ make qemu-riscv64_spl_defconfig
220 The minimal QEMU commands to run U-Boot SPL are:
222 .. code-block:: bash
224   $ qemu-system-riscv64 -M virt -smp 4 -m 2G \
225       -display none -serial stdio \
226       -bios /path/to/u-boot-spl \
227       -device loader,file=/path/to/u-boot.itb,addr=0x80200000
229 To test 32-bit U-Boot images, switch to use qemu-riscv32_smode_defconfig and
230 riscv32_spl_defconfig builds, and replace ``qemu-system-riscv64`` with
231 ``qemu-system-riscv32`` in the command lines above to boot the 32-bit U-Boot.
234 ------------
240 .. code-block:: bash
242   $ swtpm socket --tpm2 -t -d --tpmstate dir=/tmp/tpm \
243         --ctrl type=unixio,path=swtpm-sock
247 .. code-block:: bash
249   $ qemu-system-riscv64 \
251     -chardev socket,id=chrtpm,path=swtpm-sock \
252     -tpmdev emulator,id=tpm0,chardev=chrtpm \
253     -device tpm-tis-device,tpmdev=tpm0