Lines Matching refs:guest

18 SGX feature is exposed to guest via SGX CPUID. Looking at SGX CPUID, we can
19 report the same CPUID info to guest as on host for most of SGX CPUID. With
20 reporting the same CPUID guest is able to use full capacity of SGX, and KVM
23 The guest's EPC base and size are determined by QEMU, and KVM needs QEMU to
24 notify such info to it before it can initialize SGX for guest.
39 guest, e.g. QEMU will happily allow you to create 64 1M EPC sections. Be aware
59 To simplify the implementation, EPC is always located above 4g in the guest
68 can be supported in the sense if guest software stack can support recreating
69 enclaves when it suffers sudden lose of EPC; and if guest enclaves can detect
71 with #PF.SGX, guest software can gracefully detect it and recreate enclaves;
80 Control) to a guest, you must either use ``-cpu host`` to pass-through the
87 i.e. may marginally reduce SGX performance in the guest. All SGX sub-features
119 when getting/putting guest state, but QEMU does not add new controls to
121 the LC configuration to a non-Intel value is left to guest firmware.  Unlike
123 for SGX guest by our design. If host is in locked mode, we can still allow
131 i.e. existing guest firmware will automatically set SGX and SGX LC accordingly,
134 Launching a guest
137 To launch a SGX guest:
146 Utilizing SGX in the guest requires a kernel/OS with SGX support.
147 The support can be determined in guest by::
157 To launch a SGX numa guest: