Lines Matching +full:cpu +full:- +full:interrupt +full:- +full:controller

1 .. _arm-virt:
10 idiosyncrasies and limitations of a particular bit of real-world
18 ``virt-5.0`` machine type will behave like the ``virt`` machine from
19 the QEMU 5.0 release, and migration should work between ``virt-5.0``
20 of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
22 the non-versioned ``virt`` machine type.
24 VM migration is not guaranteed when using ``-cpu max``, as features
26 migrated, it is recommended to use another cpu model instead.
33 - PCI/PCIe devices
34 - Flash memory
35 - Either one or two PL011 UARTs for the NonSecure World
36 - An RTC
37 - The fw_cfg device that allows a guest to obtain data from QEMU
38 - A PL061 GPIO controller
39 - An optional SMMUv3 IOMMU
40 - hotpluggable DIMMs
41 - hotpluggable NVDIMMs
42 - An MSI controller (GICv2M or ITS). GICv2M is selected by default along
43 with GICv2. ITS is selected by default with GICv3 (>= virt-2.7). Note
45 - 32 virtio-mmio transport devices
46 - running guests using the KVM accelerator on aarch64 hardware
47 - large amounts of RAM (at least 255GB, and more if using highmem)
48 - many CPUs (up to 512 if using a GICv3 and highmem)
49 - Secure-World-only devices if the CPU has TrustZone:
51 - A second PL011 UART
52 - A second PL061 GPIO controller, with GPIO lines for triggering
54 - A secure flash memory
55 - 16MB of secure RAM
58 explicitly (e.g. with a second -serial command line option) and
61 Supported guest CPU types:
63 - ``cortex-a7`` (32-bit)
64 - ``cortex-a15`` (32-bit; the default)
65 - ``cortex-a35`` (64-bit)
66 - ``cortex-a53`` (64-bit)
67 - ``cortex-a55`` (64-bit)
68 - ``cortex-a57`` (64-bit)
69 - ``cortex-a72`` (64-bit)
70 - ``cortex-a76`` (64-bit)
71 - ``cortex-a710`` (64-bit)
72 - ``a64fx`` (64-bit)
73 - ``host`` (with KVM and HVF only)
74 - ``neoverse-n1`` (64-bit)
75 - ``neoverse-v1`` (64-bit)
76 - ``neoverse-n2`` (64-bit)
77 - ``max`` (same as ``host`` for KVM and HVF; best possible emulation with TCG)
79 Note that the default is ``cortex-a15``, so for an AArch64 guest you must
80 specify a CPU type.
82 Also, please note that passing ``max`` CPU (i.e. ``-cpu max``) won't
83 enable all the CPU features for a given ``virt`` machine. Where a CPU
84 architectural feature requires support in both the CPU itself and in the
88 For example, MTE support must be enabled with ``-machine virt,mte=on``,
89 as well as by selecting an MTE-capable CPU (e.g., ``max``) with the
90 ``-cpu`` option.
92 See the machine-specific options below, or check them for a given machine
93 by passing the ``help`` suboption, like: ``-machine virt-9.0,help``.
97 the Display devices section of "-device help". The recommended option
98 is ``virtio-gpu-pci``; this is the only one which will work correctly
102 Machine-specific options
105 The following machine-specific options are supported:
108 Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the
112 Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the
116 Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the
122 later than ``virt-2.12`` when the CPU supports an address space
123 bigger than 32 bits (i.e. 64-bit CPUs, and 32-bit CPUs with the
125 boot a 32-bit kernel which does not have ``CONFIG_LPAE`` enabled on
126 a CPU type which implements LPAE, you will need to manually set
127 this to ``off``; otherwise some devices, such as the PCI controller,
130 compact-highmem
132 The default is ``on`` for machine types later than ``virt-7.2``.
134 highmem-redists
139 highmem-ecam
141 The default is ``on`` for machine types later than ``virt-3.0``.
143 highmem-mmio
147 highmem-mmio-size
151 gic-version
152 Specify the version of the Generic Interrupt Controller (GIC) to provide.
170 for machine types later than ``virt-2.7``.
180 default-bus-bypass-iommu
182 <https://gitlab.com/qemu-project/qemu/-/blob/master/docs/bypass-iommu.txt>`_
192 dtb-randomness
194 rng-seed and kaslr-seed nodes (in both "/chosen" and
195 "/secure-chosen") to use for features like the random number
199 DTB to be non-deterministic. It would be the responsibility of
202 dtb-kaslr-seed
203 A deprecated synonym for dtb-randomness.
205 x-oem-id
209 x-oem-table-id
217 right device drivers for virtio and the PCI controller; however some older
218 kernel versions, especially for 32-bit Arm, did not have everything
226 If you want to use the ``virtio-gpu-pci`` graphics device you will also
232 Hardware configuration information for bare-metal programming
237 addresses, interrupt lines and other configuration of the various devices
238 in the system. Guest code can rely on and hard-code the following
241 - Flash memory starts at address 0x0000_0000
243 - RAM starts at 0x4000_0000
251 - For guests using the Linux kernel boot protocol (this means any
252 non-ELF file passed to the QEMU ``-kernel`` option) the address
253 of the DTB is passed in a register (``r2`` for 32-bit guests,
254 or ``x0`` for 64-bit guests)
256 - For guests booting as "bare-metal" (any other kind of boot),