system/arm/cpu-features.rst

7 that the feature is implemented, and, conversely, when disabled,
8 indicate that it is not implemented. An example of an Arm CPU feature
9 is the Performance Monitoring Unit (PMU).  CPU types such as the
26 disabled, enables the optional AArch32 CPU feature, is only supported
36 CPU type is possible with the ``query-cpu-model-expansion`` QMP command.
38 block in the script for usage) is used to issue the QMP commands.
41    (Note, we started QEMU with qemu-system-aarch64, so ``max`` is
58 all SVE vector lengths can be supported, when KVM is in use it's more
59 likely that only a few lengths will be supported, if SVE is supported at
74 We see it worked, as ``pmu`` is now ``false``.
81        "'aarch64' feature cannot be disabled unless KVM is enabled and 32-bit EL1 is supported"
84 It looks like this feature is limited to a configuration we do not
107 Only the ``pmu`` CPU feature is available.
120 collection is valid.
127 seattle host, but mostly if KVM is enabled the ``host`` CPU type must be
128 used.  This means the guest is provided all the same CPU features as the
136 affect is not only limited to specific features, as pointed out in example
138 When KVM is enabled, only the ``max``, ``host``, and current CPU type may be
139 expanded.  This restriction is necessary as it's not possible to know all
142 above, the ``cortex-a57`` CPU type is also valid when KVM is enabled.
148 seattle host is using the ``cortex-a57`` CPU type, then querying ``cortex-a57``
163 type, ``sve`` is already on by default.  Also, based on our probe of
175 The features' CPU properties are only available when KVM is enabled and
177 enabled, and disabled in the same way as other CPU features.  Below is
181   By default kvm-no-adjvtime is disabled.  This means that by default
182   the virtual time adjustment is enabled (vtime is not *not* adjusted).
184   When virtual time adjustment is enabled each time the VM transitions
185   back to running state the VCPU's virtual counter is updated to
186   ensure stopped time is not counted.  This avoids time jumps
198   Since v5.2, kvm-steal-time is enabled by default when KVM is
199   enabled, the feature is supported, and the guest is 64-bit.
201   When kvm-steal-time is enabled a 64-bit guest can account for time
211 Below is the list of TCG VCPU features and their descriptions.
217   When ``pauth`` is enabled, select the QEMU implementation defined algorithm.
220   When ``pauth`` is enabled, select the architected QARMA3 algorithm.
223   When ``pauth`` is enabled, select the architected QARMA5 algorithm.
226 the QEMU impdef algorithm is used.  The architected QARMA5
228 be quite slow to emulate.  The impdef algorithm used by QEMU is
235 is used to enable or disable the entire SVE feature, just as the ``pmu``
237 is used to enable or disable specific vector lengths, where ``N`` is the
249   1) At least one vector length must be enabled when ``sve`` is enabled.
251   2) If a vector length ``N`` is enabled, then, when KVM is enabled, all
253      KVM is not enabled, then only all the smaller, power-of-two vector
256      is enabled, the 128-bit vector length, 256-bit vector length, and
260   3) If KVM is enabled then only vector lengths that the host CPU type
261      support may be enabled.  If SVE is not supported by the host, then
267   1) If SVE is disabled (``sve=off``), then which SVE vector lengths
268      are enabled or disabled is irrelevant to the guest, as the entire
269      SVE feature is disabled and that disables all vector lengths for
271      properties provided by the user.  If later an ``sve=on`` is provided,
273      is provided and there are explicitly enabled vector lengths, then
274      an error is generated.
276   2) If SVE is enabled (``sve=on``), but no ``sve<N>`` CPU properties are
278      KVM is not in use means including the non-power-of-two lengths, and,
279      when KVM is in use, it means all vector lengths supported by the host
282   3) If SVE is enabled, then an error is generated when attempting to
288      has been explicitly disabled, then an error is generated (see
291   5) When KVM is enabled, if the host does not support SVE, then an error
292      is generated when attempting to enable any ``sve*`` properties (see
295   6) When KVM is enabled, if the host does support SVE, then an error is
303      When KVM is not enabled, disabling a power-of-two vector length also
305      When KVM is enabled, then disabling any supported vector length also
317      "SVE CPU Property Parsing Semantics"), then if later an ``sve=on`` is
332   3) When KVM is enabled, implicitly enable all host CPU supported vector
342      since 512 is a power-of-two.  This results in all the smaller,
372 lengths is to explicitly enable each desired length.  Therefore only
403 For qemu-aarch64, the cpu property ``sve-default-vector-length=N`` is
406 is in units of bytes and must be between 16 and 8192.
407 If not specified, the default vector length is 64.
409 If the default length is larger than the maximum vector length enabled,
411 length supported by QEMU is 256.
413 If this property is set to ``-1`` then the default vector length
414 is set to the maximum possible length.
419 The SME CPU properties are much like the SVE properties: ``sme`` is
420 used to enable or disable the entire SME feature, and ``sme<N>`` is
422 ``sme_fa64`` is used to enable or disable ``FEAT_SME_FA64``, which
424 SVE mode is enabled.
426 SME is not supported by KVM at this time.
428 At least one vector length must be enabled when ``sme`` is enabled,
430 length supported by qemu is 2048 bits.  Otherwise, there are no
436 For qemu-aarch64, the cpu property ``sme-default-vector-length=N`` is
439 is in units of bytes and must be between 16 and 8192.
440 If not specified, the default vector length is 32.
442 As with ``sve-default-vector-length``, if the default length is larger
444 be reduced.  If this property is set to ``-1`` then the default vector
445 length is set to the maximum possible length.
450 The status of RME support with QEMU is experimental.  At this time we
452 The feature is enabled by the CPU property ``x-rme``, with the ``x-``
465 Legal values for ``S`` are 30, 34, 36, and 39; the default is 30.