Lines Matching refs:integer

42   First 4-bytes: big-endian (BE) encoded integer denoting the number of entries.
66   First 4-bytes: BE-encoded integer denoting the number of entries.
68   Each 4-byte entry: BE-encoded ``<index>`` integer that is unique across all
75       ``bit[31:28]``: integer encoding of ``<type>``, where ``<type>`` is:
87       ``bit[27:0]``: integer encoding of ``<id>``, where ``<id>`` is unique
93   First 4-bytes: BE-encoded integer denoting the number of entries.
95   Each 4-byte entry: 32-bit, BE-encoded ``<index>`` integer that specifies the
98   assumed to be managed automatically. The integer value for this domain is a
105   First 4-bytes: BE-encoded integer denoting the number of entries.
135   ``arg[0]``: integer identifying power domain.
148   ``arg[0]``: integer identifying power domain.
159   ``arg[0]``: integer identifying sensor/indicator type.
213   ``arg[0]``: integer identifying sensor/indicator type.
435   ``<maxcpus>``, a BE-encoded integer, represents the maximum number of
455 This 64-bit integer defines the size of each dynamically reconfigurable LMB.
462 that begins with an integer M, the number of associativity lists followed
463 by an integer N, the number of entries per associativity list and terminated
476 property encoded array that has an integer N, the number of LMBs followed
481 - Logical address of the start of the LMB encoded as a 64-bit integer. This
497 It is a property encoded array that has an integer N (the number of
503 - Number of sequential LMBs in the entry represented by a 32-bit integer.
504 - Logical address of the first LMB in the set encoded as a 64-bit integer.