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25 Setting the selector register will cause the data offset to be set
31 read, and all write access to the data port will be ignored. A value
38 longer supported, and will be ignored (treated as no-ops)!
63 port number will always be one greater than the port number of the
72 will be set to zero. Each successful access to the data register will
77 end of this maximum data length, then any reads will return a data
78 value of 0x00, and all writes will be ignored.
80 An N-byte wide read of the data register will return the next available
116 present, the four bytes read will contain the characters ``QEMU``.
217 If the ``control`` field has bit 1 set, a read operation will be performed.
218 ``length`` bytes for the current selector and offset will be copied into the
221 If the ``control`` field has bit 4 set (and not bit 1), a write operation will be
222 performed. ``length`` bytes will be copied from the physical RAM address
230 operation will be performed. The offset for the current selector will be
269 Item names beginning with ``opt/`` are reserved for users. QEMU will
284 entirely unsupported. QEMU will warn if you try.