Lines Matching +full:- +full:- +full:-
1 .. _tcg-ops-ref:
43 a sequence of basic blocks connected by the fall-through paths of
60 .. code-block:: none
62 add_i32 t0, t1, t2 /* (t0 <- t1 + t2) */
109 A 32-bit integer.
113 A 64-bit integer. For 32-bit hosts, such variables are split into a pair
116 host-endian representation.
131 A 128-bit integer. For all hosts, such variables are split into a number
134 host-endian representation.
138 A 64-bit vector. This type is valid only if the TCG target
143 A 128-bit vector. This type is valid only if the TCG target
148 A 256-bit vector. This type is valid only if the TCG target
154 Helpers are registered in a guest-specific ``helper.h``,
189 - Single instructions are simplified, e.g.
191 .. code-block:: none
197 - A liveness analysis is done at the basic block level. The
205 .. code-block:: none
218 -------------
220 .. list-table::
222 * - call *<ret>* *<params>* ptr
224 - | call function 'ptr' (pointer type)
230 ------------
232 .. list-table::
234 * - set_label $label
236 - | Define label 'label' at the current program point.
238 * - br $label
240 - | Jump to label.
242 * - brcond *t0*, *t1*, *cond*, *label*
244 - | Conditional jump if *t0* *cond* *t1* is true. *cond* can be:
260 ----------
262 .. list-table::
264 * - add *t0*, *t1*, *t2*
266 - | *t0* = *t1* + *t2*
268 * - sub *t0*, *t1*, *t2*
270 - | *t0* = *t1* - *t2*
272 * - neg *t0*, *t1*
274 - | *t0* = -*t1* (two's complement)
276 * - mul *t0*, *t1*, *t2*
278 - | *t0* = *t1* * *t2*
280 * - divs *t0*, *t1*, *t2*
282 - | *t0* = *t1* / *t2* (signed)
285 * - divu *t0*, *t1*, *t2*
287 - | *t0* = *t1* / *t2* (unsigned)
290 * - rems *t0*, *t1*, *t2*
292 - | *t0* = *t1* % *t2* (signed)
295 * - remu *t0*, *t1*, *t2*
297 - | *t0* = *t1* % *t2* (unsigned)
300 * - divs2 *q*, *r*, *nl*, *nh*, *d*
302 - | *q* = *nh:nl* / *d* (signed)
304 | Undefined behaviour if division by zero, or the double-word
305 numerator divided by the single-word divisor does not fit
306 within the single-word quotient. The code generator will
307 pass *nh* as a simple sign-extension of *nl*, so the only
308 overflow should be *INT_MIN* / -1.
310 * - divu2 *q*, *r*, *nl*, *nh*, *d*
312 - | *q* = *nh:nl* / *d* (unsigned)
314 | Undefined behaviour if division by zero, or the double-word
315 numerator divided by the single-word divisor does not fit
316 within the single-word quotient. The code generator will
317 pass 0 to *nh* to make a simple zero-extension of *nl*,
321 -------
323 .. list-table::
325 * - and *t0*, *t1*, *t2*
327 - | *t0* = *t1* & *t2*
329 * - or *t0*, *t1*, *t2*
331 - | *t0* = *t1* | *t2*
333 * - xor *t0*, *t1*, *t2*
335 - | *t0* = *t1* ^ *t2*
337 * - not *t0*, *t1*
339 - | *t0* = ~\ *t1*
341 * - andc *t0*, *t1*, *t2*
343 - | *t0* = *t1* & ~\ *t2*
345 * - eqv *t0*, *t1*, *t2*
347 - | *t0* = ~(*t1* ^ *t2*), or equivalently, *t0* = *t1* ^ ~\ *t2*
349 * - nand *t0*, *t1*, *t2*
351 - | *t0* = ~(*t1* & *t2*)
353 * - nor *t0*, *t1*, *t2*
355 - | *t0* = ~(*t1* | *t2*)
357 * - orc *t0*, *t1*, *t2*
359 - | *t0* = *t1* | ~\ *t2*
361 * - clz *t0*, *t1*, *t2*
363 - | *t0* = *t1* ? clz(*t1*) : *t2*
365 * - ctz *t0*, *t1*, *t2*
367 - | *t0* = *t1* ? ctz(*t1*) : *t2*
369 * - ctpop *t0*, *t1*
371 - | *t0* = number of bits set in *t1*
374 the function name used in ``include/qemu/host-utils.h``.
378 --------------
380 .. list-table::
382 * - shl *t0*, *t1*, *t2*
384 - | *t0* = *t1* << *t2*
385 | Unspecified behavior for negative or out-of-range shifts.
387 * - shr *t0*, *t1*, *t2*
389 - | *t0* = *t1* >> *t2* (unsigned)
390 | Unspecified behavior for negative or out-of-range shifts.
392 * - sar *t0*, *t1*, *t2*
394 - | *t0* = *t1* >> *t2* (signed)
395 | Unspecified behavior for negative or out-of-range shifts.
397 * - rotl *t0*, *t1*, *t2*
399 - | Rotation of *t2* bits to the left
400 | Unspecified behavior for negative or out-of-range shifts.
402 * - rotr *t0*, *t1*, *t2*
404 - | Rotation of *t2* bits to the right.
405 | Unspecified behavior for negative or out-of-range shifts.
409 ----
411 .. list-table::
413 * - mov *t0*, *t1*
415 - | *t0* = *t1*
418 * - bswap16 *t0*, *t1*, *flags*
420 - | 16 bit byte swap on the low bits of a 32/64 bit input.
422 | If *flags* & ``TCG_BSWAP_IZ``, then *t1* is known to be zero-extended from bit 15.
423 | If *flags* & ``TCG_BSWAP_OZ``, then *t0* will be zero-extended from bit 15.
424 | If *flags* & ``TCG_BSWAP_OS``, then *t0* will be sign-extended from bit 15.
428 * - bswap32 *t0*, *t1*, *flags*
430 - | 32 bit byte swap. The flags are the same as for bswap16, except
434 * - bswap64 *t0*, *t1*, *flags*
436 - | 64 bit byte swap. The flags are ignored, but still present
440 * - discard_i32/i64 *t0*
442 - | Indicate that the value of *t0* won't be used later. It is useful to
445 * - deposit *dest*, *t1*, *t2*, *pos*, *len*
447 - | Deposit *t2* as a bitfield into *t1*, placing the result in *dest*.
451 | *len* - the length of the bitfield
452 | *pos* - the position of the first bit, counting from the LSB
454 | For example, "deposit dest, t1, t2, 8, 4" indicates a 4-bit field
461 * - extract *dest*, *t1*, *pos*, *len*
465 - | Extract a bitfield from *t1*, placing the result in *dest*.
470 to the left with copies of the bitfield sign bit at *pos* + *len* - 1.
472 | For example, "sextract dest, t1, 8, 4" indicates a 4-bit field
479 * - extract2 *dest*, *t1*, *t2*, *pos*
481 - | For TCG_TYPE_I{N}, extract an N-bit quantity from the concatenation
486 * - extrl_i64_i32 *t0*, *t1*
488 - | For 64-bit hosts only, extract the low 32-bits of input *t1* and place it
489 into 32-bit output *t0*. Depending on the host, this may be a simple move,
492 * - extrh_i64_i32 *t0*, *t1*
494 - | For 64-bit hosts only, extract the high 32-bits of input *t1* and place it
495 into 32-bit output *t0*. Depending on the host, this may be a simple shift,
500 -----------------
502 .. list-table::
504 * - setcond *dest*, *t1*, *t2*, *cond*
506 - | *dest* = (*t1* *cond* *t2*)
510 * - negsetcond *dest*, *t1*, *t2*, *cond*
512 - | *dest* = -(*t1* *cond* *t2*)
514 | Set *dest* to -1 if (*t1* *cond* *t2*) is true, otherwise set to 0.
516 * - movcond *dest*, *c1*, *c2*, *v1*, *v2*, *cond*
518 - | *dest* = (*c1* *cond* *c2* ? *v1* : *v2*)
524 ----------------
526 .. list-table::
528 * - ext_i32_i64 *t0*, *t1*
530 - | Convert *t1* (32 bit) to *t0* (64 bit) and does sign extension
532 * - extu_i32_i64 *t0*, *t1*
534 - | Convert *t1* (32 bit) to *t0* (64 bit) and does zero extension
536 * - trunc_i64_i32 *t0*, *t1*
538 - | Truncate *t1* (64 bit) to *t0* (32 bit)
540 * - concat_i32_i64 *t0*, *t1*, *t2*
542 - | Construct *t0* (64-bit) taking the low half from *t1* (32 bit) and the high half
545 * - concat32_i64 *t0*, *t1*, *t2*
547 - | Construct *t0* (64-bit) taking the low half from *t1* (64 bit) and the high half
552 ----------
554 .. list-table::
556 * - ld_i32/i64 *t0*, *t1*, *offset*
570 - | *t0* = read(*t1* + *offset*)
575 * - st_i32/i64 *t0*, *t1*, *offset*
583 - | write(*t0*, *t1* + *offset*)
592 ----------------------------
594 .. list-table::
596 * - addco *t0*, *t1*, *t2*
598 - | Compute *t0* = *t1* + *t2* and in addition output to the
601 * - addci *t0, *t1*, *t2*
603 - | Compute *t0* = *t1* + *t2* + *C*, where *C* is the
607 * - addcio *t0, *t1*, *t2*
609 - | Compute *t0* = *t1* + *t2* + *C*, where *C* is the
613 * - addc1o *t0, *t1*, *t2*
615 - | Compute *t0* = *t1* + *t2* + 1, and in addition output to the
617 *addcio* with a fixed carry-in value of 1.
625 * - subbo *t0*, *t1*, *t2*
627 - | Compute *t0* = *t1* - *t2* and in addition output to the
633 * - subbi *t0, *t1*, *t2*
635 - | Compute *t0* = *t1* - *t2* - *B*, where *B* is the
639 * - subbio *t0, *t1*, *t2*
641 - | Compute *t0* = *t1* - *t2* - *B*, where *B* is the
645 * - subb1o *t0, *t1*, *t2*
647 - | Compute *t0* = *t1* - *t2* - 1, and in addition output to the
649 *subbio* with a fixed borrow-in value of 1.
657 * - mulu2 *t0_low*, *t0_high*, *t1*, *t2*
659 - | Similar to mul, except two unsigned inputs *t1* and *t2* yielding the full
660 double-word product *t0*. The latter is returned in two single-word outputs.
662 * - muls2 *t0_low*, *t0_high*, *t1*, *t2*
664 - | Similar to mulu2, except the two inputs *t1* and *t2* are signed.
666 * - mulsh *t0*, *t1*, *t2*
670 - | Provide the high part of a signed or unsigned multiply, respectively.
672 | If mulu2/muls2 are not provided by the backend, the tcg-op generator
677 ----------------------
679 .. list-table::
681 * - mb *<$arg>*
683 - | Generate a target memory barrier instruction to ensure memory ordering
696 | Please see :ref:`atomics-ref` for more information on memory barriers.
699 64-bit guest on 32-bit host support
700 -----------------------------------
703 32-bit host code generators, but are not to be emitted by guest translators.
704 They are emitted as needed by inline functions within ``tcg-op.h``.
706 .. list-table::
708 * - brcond2_i32 *t0_low*, *t0_high*, *t1_low*, *t1_high*, *cond*, *label*
710 - | Similar to brcond, except that the 64-bit values *t0* and *t1*
711 are formed from two 32-bit arguments.
713 * - setcond2_i32 *dest*, *t1_low*, *t1_high*, *t2_low*, *t2_high*, *cond*
715 - | Similar to setcond, except that the 64-bit values *t1* and *t2* are
716 formed from two 32-bit arguments. The result is a 32-bit value.
720 ------------------------
722 .. list-table::
724 * - exit_tb *t0*
726 - | Exit the current TB and return the value *t0* (word type).
728 * - goto_tb *index*
730 - | Exit the current TB and jump to the TB index *index* (constant) if the
735 * - lookup_and_goto_ptr *tb_addr*
737 - | Look up a TB address *tb_addr* and jump to it if valid. If not valid,
743 * - qemu_ld_i32/i64/i128 *t0*, *t1*, *flags*, *memidx*
747 - | Load data at the guest address *t1* into *t0*, or store data in *t0* at guest
752 | Both *t0* and *t1* may be split into little-endian ordered pairs of registers
753 if dealing with 64-bit quantities on a 32-bit host, or 128-bit quantities on
754 a 64-bit host.
760 | For a 32-bit host, qemu_ld/st_i64 is guaranteed to only be used with a
761 64-bit memory access specified in *flags*.
763 | For qemu_ld/st_i128, these are only supported for a 64-bit host.
767 ----------------------
771 specifies the length of the element (if applicable) in log2 8-bit units.
773 .. list-table::
775 * - mov_vec *v0*, *v1*
781 - | Move, load and store.
783 * - dup_vec *v0*, *r1*
785 - | Duplicate the low N bits of *r1* into TYPE/VECE copies across *v0*.
787 * - dupi_vec *v0*, *c*
789 - | Similarly, for a constant.
792 * - dup2_vec *v0*, *r1*, *r2*
794 - | Duplicate *r2*:*r1* into TYPE/64 copies across *v0*. This opcode is
795 only present for 32-bit hosts.
797 * - add_vec *v0*, *v1*, *v2*
799 - | *v0* = *v1* + *v2*, in elements across the vector.
801 * - sub_vec *v0*, *v1*, *v2*
803 - | Similarly, *v0* = *v1* - *v2*.
805 * - mul_vec *v0*, *v1*, *v2*
807 - | Similarly, *v0* = *v1* * *v2*.
809 * - neg_vec *v0*, *v1*
811 - | Similarly, *v0* = -*v1*.
813 * - abs_vec *v0*, *v1*
815 - | Similarly, *v0* = *v1* < 0 ? -*v1* : *v1*, in elements across the vector.
817 * - smin_vec *v0*, *v1*, *v2*
821 - | Similarly, *v0* = MIN(*v1*, *v2*), for signed and unsigned element types.
823 * - smax_vec *v0*, *v1*, *v2*
827 - | Similarly, *v0* = MAX(*v1*, *v2*), for signed and unsigned element types.
829 * - ssadd_vec *v0*, *v1*, *v2*
837 - | Signed and unsigned saturating addition and subtraction.
842 * - and_vec *v0*, *v1*, *v2*
854 - | Similarly, logical operations with and without complement.
858 * - shli_vec *v0*, *v1*, *i2*
862 - | Shift all elements from v1 by a scalar *i2*/*s2*. I.e.
864 .. code-block:: c
870 * - shri_vec *v0*, *v1*, *i2*
880 - | Similarly for logical and arithmetic right shift, and left rotate.
882 * - shlv_vec *v0*, *v1*, *v2*
884 - | Shift elements from *v1* by elements from *v2*. I.e.
886 .. code-block:: c
892 * - shrv_vec *v0*, *v1*, *v2*
900 - | Similarly for logical and arithmetic right shift, and rotates.
902 * - cmp_vec *v0*, *v1*, *v2*, *cond*
904 - | Compare vectors by element, storing -1 for true and 0 for false.
906 * - bitsel_vec *v0*, *v1*, *v2*, *v3*
908 - | Bitwise select, *v0* = (*v2* & *v1*) | (*v3* & ~\ *v1*), across the entire vector.
910 * - cmpsel_vec *v0*, *c1*, *c2*, *v3*, *v4*, *cond*
912 - | Select elements based on comparison results:
914 .. code-block:: c
931 ``tcg-target.h`` contains the target specific definitions. ``tcg-target.c.inc``
936 -----------
945 On a 64 bit target, the values are transferred between 32 and 64-bit
948 - extrl_i64_i32
949 - extrh_i64_i32
950 - ext_i32_i64
951 - extu_i32_i64
954 moved from a 32-bit to a 64-bit register or vice-versa. Note that the
958 - 64-bit registers can hold 32-bit values
959 - 32-bit values in a 64-bit register do not need to stay zero or
961 - all 32-bit TCG ops ignore the high part of 64-bit registers
968 ----------------
1003 -------------------------
1005 - The only supported types for parameters and return value are: 32 and
1007 - The stack grows downwards.
1008 - The first N parameters are passed in registers.
1009 - The next parameters are passed on the stack by storing them as words.
1010 - Some registers are clobbered during the call.
1011 - The function can return 0 or 1 value in registers. On a 32 bit
1019 - Use globals to represent the parts of the QEMU CPU state which are
1023 - Don't hesitate to use helpers for complicated or seldom used guest
1032 - Use the 'discard' instruction if you know that TCG won't be able to