Lines Matching refs:idx
25 uint32_t idx; member
47 GUEST_ASSERT(msr->idx); in guest_msr()
50 vector = wrmsr_safe(msr->idx, msr->write_val); in guest_msr()
52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx))) in guest_msr()
53 vector = rdmsr_safe(msr->idx, &msr_val); in guest_msr()
58 msr->write ? "WR" : "RD", msr->idx, ex_str(vector)); in guest_msr()
62 msr->write ? "WR" : "RD", msr->idx, ex_str(vector)); in guest_msr()
64 if (vector || is_write_only_msr(msr->idx)) in guest_msr()
70 msr->idx, msr->write_val, msr_val); in guest_msr()
73 if (msr->idx == HV_X64_MSR_TSC_INVARIANT_CONTROL) { in guest_msr()
168 msr->idx = HV_X64_MSR_GUEST_OS_ID; in guest_test_msrs_access()
173 msr->idx = HV_X64_MSR_HYPERCALL; in guest_test_msrs_access()
183 msr->idx = HV_X64_MSR_GUEST_OS_ID; in guest_test_msrs_access()
189 msr->idx = HV_X64_MSR_GUEST_OS_ID; in guest_test_msrs_access()
194 msr->idx = HV_X64_MSR_HYPERCALL; in guest_test_msrs_access()
200 msr->idx = HV_X64_MSR_VP_RUNTIME; in guest_test_msrs_access()
206 msr->idx = HV_X64_MSR_VP_RUNTIME; in guest_test_msrs_access()
212 msr->idx = HV_X64_MSR_VP_RUNTIME; in guest_test_msrs_access()
219 msr->idx = HV_X64_MSR_TIME_REF_COUNT; in guest_test_msrs_access()
225 msr->idx = HV_X64_MSR_TIME_REF_COUNT; in guest_test_msrs_access()
231 msr->idx = HV_X64_MSR_TIME_REF_COUNT; in guest_test_msrs_access()
238 msr->idx = HV_X64_MSR_VP_INDEX; in guest_test_msrs_access()
244 msr->idx = HV_X64_MSR_VP_INDEX; in guest_test_msrs_access()
250 msr->idx = HV_X64_MSR_VP_INDEX; in guest_test_msrs_access()
257 msr->idx = HV_X64_MSR_RESET; in guest_test_msrs_access()
263 msr->idx = HV_X64_MSR_RESET; in guest_test_msrs_access()
268 msr->idx = HV_X64_MSR_RESET; in guest_test_msrs_access()
281 msr->idx = HV_X64_MSR_REFERENCE_TSC; in guest_test_msrs_access()
287 msr->idx = HV_X64_MSR_REFERENCE_TSC; in guest_test_msrs_access()
292 msr->idx = HV_X64_MSR_REFERENCE_TSC; in guest_test_msrs_access()
299 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
308 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
314 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
319 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
326 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
332 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
337 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
344 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
351 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
358 msr->idx = HV_X64_MSR_EOI; in guest_test_msrs_access()
364 msr->idx = HV_X64_MSR_EOI; in guest_test_msrs_access()
371 msr->idx = HV_X64_MSR_TSC_FREQUENCY; in guest_test_msrs_access()
377 msr->idx = HV_X64_MSR_TSC_FREQUENCY; in guest_test_msrs_access()
383 msr->idx = HV_X64_MSR_TSC_FREQUENCY; in guest_test_msrs_access()
390 msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL; in guest_test_msrs_access()
396 msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL; in guest_test_msrs_access()
401 msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL; in guest_test_msrs_access()
408 msr->idx = HV_X64_MSR_TSC_EMULATION_STATUS; in guest_test_msrs_access()
415 msr->idx = HV_X64_MSR_CRASH_P0; in guest_test_msrs_access()
421 msr->idx = HV_X64_MSR_CRASH_P0; in guest_test_msrs_access()
426 msr->idx = HV_X64_MSR_CRASH_P0; in guest_test_msrs_access()
433 msr->idx = HV_X64_MSR_SYNDBG_STATUS; in guest_test_msrs_access()
440 msr->idx = HV_X64_MSR_SYNDBG_STATUS; in guest_test_msrs_access()
445 msr->idx = HV_X64_MSR_SYNDBG_STATUS; in guest_test_msrs_access()
455 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
464 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
472 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
481 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
497 msr->idx, msr->write ? "write" : "read"); in guest_test_msrs_access()