soc/codecs/wm8995.c

382 	struct fll_config fll[2], fll_suspend[2];
693 		rate = wm8995->fll[0].out;
697 		rate = wm8995->fll[1].out;
1723 static int wm8995_get_fll_config(struct fll_div *fll,
1732 	fll->clk_ref_div = 0;
1734 		fll->clk_ref_div++;
1737 		if (fll->clk_ref_div > 3)
1740 	pr_debug("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in);
1743 	fll->outdiv = 3;
1744 	while (freq_out * (fll->outdiv + 1) < 90000000) {
1745 		fll->outdiv++;
1746 		if (fll->outdiv > 63)
1749 	freq_out *= fll->outdiv + 1;
1750 	pr_debug("OUTDIV=%d, Fvco=%dHz\n", fll->outdiv, freq_out);
1753 		fll->fll_fratio = 0;
1755 		fll->fll_fratio = 1;
1758 		fll->fll_fratio = 2;
1761 		fll->fll_fratio = 3;
1764 		fll->fll_fratio = 4;
1767 	pr_debug("FLL_FRATIO=%d, Fref=%dHz\n", fll->fll_fratio, freq_in);
1772 	fll->n = Ndiv;
1787 	fll->k = K / 10;
1789 	pr_debug("N=%x K=%x\n", fll->n, fll->k);
1801 	struct fll_div fll;
1842 	if (wm8995->fll[id].src == src &&
1843 	    wm8995->fll[id].in == freq_in && wm8995->fll[id].out == freq_out)
1851 		ret = wm8995_get_fll_config(&fll, freq_in, freq_out);
1853 		ret = wm8995_get_fll_config(&fll, wm8995->fll[id].in,
1854 					    wm8995->fll[id].out);
1868 	reg = (fll.outdiv << WM8995_FLL1_OUTDIV_SHIFT) |
1869 	      (fll.fll_fratio << WM8995_FLL1_FRATIO_SHIFT);
1874 	snd_soc_component_write(component, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k);
1878 			    fll.n << WM8995_FLL1_N_SHIFT);
1883 			    (fll.clk_ref_div << WM8995_FLL1_REFCLK_DIV_SHIFT) |
1890 	wm8995->fll[id].in = freq_in;
1891 	wm8995->fll[id].out = freq_out;
1892 	wm8995->fll[id].src = src;