Lines Matching refs:sysclk_rate

215 	unsigned int sysclk_rate;
590 			wm8993->sysclk_rate = wm8993->mclk_rate / 2;
593 			wm8993->sysclk_rate = wm8993->mclk_rate;
606 			wm8993->sysclk_rate = wm8993->fll_fout / 2;
609 			wm8993->sysclk_rate = wm8993->fll_fout;
619 	dev_dbg(component->dev, "CLK_SYS is %dHz\n", wm8993->sysclk_rate);
1242 	best_val = abs((wm8993->sysclk_rate / clk_sys_rates[0].ratio)
1245 		cur_val = abs((wm8993->sysclk_rate /
1277 		cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div)
1286 	wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div;