soc/codecs/wm8961.c

194 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
195 	u16 hp_reg = snd_soc_component_read(component, WM8961_ANALOGUE_HP_0);
196 	u16 cp_reg = snd_soc_component_read(component, WM8961_CHARGE_PUMP_1);
197 	u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2);
198 	u16 dcs_reg = snd_soc_component_read(component, WM8961_DC_SERVO_1);
204 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
208 		snd_soc_component_write(component, WM8961_CHARGE_PUMP_1, cp_reg);
213 		snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
217 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
221 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
227 		dev_dbg(component->dev, "Enabling DC servo\n");
229 		snd_soc_component_write(component, WM8961_DC_SERVO_1, dcs_reg);
232 			dcs_reg = snd_soc_component_read(component, WM8961_DC_SERVO_1);
238 			dev_err(component->dev, "DC servo timed out\n");
240 			dev_dbg(component->dev, "DC servo startup complete\n");
244 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
248 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
254 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
258 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
263 		snd_soc_component_write(component, WM8961_DC_SERVO_1, dcs_reg);
268 		snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
272 		snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
275 		dev_dbg(component->dev, "Disabling charge pump\n");
276 		snd_soc_component_write(component, WM8961_CHARGE_PUMP_1,
286 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
287 	u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2);
288 	u16 spk_reg = snd_soc_component_read(component, WM8961_CLASS_D_CONTROL_1);
293 		snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
297 		snd_soc_component_write(component, WM8961_CLASS_D_CONTROL_1, spk_reg);
303 		snd_soc_component_write(component, WM8961_CLASS_D_CONTROL_1, spk_reg);
307 		snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
505 	struct snd_soc_component *component = dai->component;
506 	struct wm8961_priv *wm8961 = snd_soc_component_get_drvdata(component);
513 		dev_err(component->dev, "MCLK has not been specified\n");
524 	reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_3);
527 	snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_3, reg);
528 	dev_dbg(component->dev, "Selected SRATE %dHz for %dHz\n",
535 		dev_err(component->dev,
540 		dev_err(component->dev,
550 		dev_err(component->dev, "Unable to generate CLK_SYS_RATE\n");
553 	dev_dbg(component->dev, "Selected CLK_SYS_RATE of %d for %d/%d=%d\n",
557 	reg = snd_soc_component_read(component, WM8961_CLOCKING_4);
560 	snd_soc_component_write(component, WM8961_CLOCKING_4, reg);
562 	reg = snd_soc_component_read(component, WM8961_AUDIO_INTERFACE_0);
579 	snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_0, reg);
582 	reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_2);
587 	snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_2, reg);
596 	struct snd_soc_component *component = dai->component;
597 	struct wm8961_priv *wm8961 = snd_soc_component_get_drvdata(component);
598 	u16 reg = snd_soc_component_read(component, WM8961_CLOCKING1);
601 		dev_err(component->dev, "MCLK must be <33MHz\n");
606 		dev_dbg(component->dev, "Using MCLK/2 for %dHz MCLK\n", freq);
610 		dev_dbg(component->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
614 	snd_soc_component_write(component, WM8961_CLOCKING1, reg);
623 	struct snd_soc_component *component = dai->component;
624 	u16 aif = snd_soc_component_read(component, WM8961_AUDIO_INTERFACE_0);
685 	return snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_0, aif);
690 	struct snd_soc_component *component = dai->component;
691 	u16 reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_2);
698 	return snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_2, reg);
703 	struct snd_soc_component *component = dai->component;
704 	u16 reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_1);
713 	return snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_1, reg);
718 	struct snd_soc_component *component = dai->component;
723 		reg = snd_soc_component_read(component, WM8961_CLOCKING2);
726 		snd_soc_component_write(component, WM8961_CLOCKING2, reg);
730 		reg = snd_soc_component_read(component, WM8961_AUDIO_INTERFACE_2);
733 		snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_2, reg);
743 static int wm8961_set_bias_level(struct snd_soc_component *component,
758 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
760 			reg = snd_soc_component_read(component, WM8961_ANTI_POP);
762 			snd_soc_component_write(component, WM8961_ANTI_POP, reg);
765 			reg = snd_soc_component_read(component, WM8961_PWR_MGMT_1);
768 			snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
773 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
775 			reg = snd_soc_component_read(component, WM8961_PWR_MGMT_1);
777 			snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
780 			reg = snd_soc_component_read(component, WM8961_ANTI_POP);
782 			snd_soc_component_write(component, WM8961_ANTI_POP, reg);
785 			reg = snd_soc_component_read(component, WM8961_PWR_MGMT_1);
787 			snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
832 static int wm8961_probe(struct snd_soc_component *component)
837 	reg = snd_soc_component_read(component, WM8961_CHARGE_PUMP_B);
839 	snd_soc_component_write(component, WM8961_CHARGE_PUMP_B, reg);
843 	reg = snd_soc_component_read(component, WM8961_ROUT1_VOLUME);
844 	snd_soc_component_write(component, WM8961_ROUT1_VOLUME,
846 	snd_soc_component_write(component, WM8961_LOUT1_VOLUME, reg | WM8961_LO1ZC);
847 	reg = snd_soc_component_read(component, WM8961_ROUT2_VOLUME);
848 	snd_soc_component_write(component, WM8961_ROUT2_VOLUME,
850 	snd_soc_component_write(component, WM8961_LOUT2_VOLUME, reg | WM8961_SPKLZC);
852 	reg = snd_soc_component_read(component, WM8961_RIGHT_ADC_VOLUME);
853 	snd_soc_component_write(component, WM8961_RIGHT_ADC_VOLUME, reg | WM8961_ADCVU);
854 	reg = snd_soc_component_read(component, WM8961_RIGHT_INPUT_VOLUME);
855 	snd_soc_component_write(component, WM8961_RIGHT_INPUT_VOLUME, reg | WM8961_IPVU);
858 	reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_2);
860 	snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_2, reg);
865 	reg = snd_soc_component_read(component, WM8961_CLOCKING_3);
867 	snd_soc_component_write(component, WM8961_CLOCKING_3, reg);
874 static int wm8961_resume(struct snd_soc_component *component)
876 	snd_soc_component_cache_sync(component);