Lines Matching defs:fll
2105 static int arizona_validate_fll(struct arizona_fll *fll,
2111 if (fll->fout && Fout != fll->fout) {
2112 arizona_fll_err(fll,
2118 arizona_fll_err(fll,
2124 Fvco_min = ARIZONA_FLL_MIN_FVCO * fll->vco_mult;
2126 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
2150 static int arizona_calc_fratio(struct arizona_fll *fll,
2173 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
2178 switch (fll->arizona->type) {
2184 if (fll->arizona->rev < 3 || sync)
2198 arizona_fll_dbg(fll, "pseudo: initial ratio=%u fref=%u refdiv=%u\n",
2209 arizona_fll_dbg(fll,
2219 (fll->vco_mult * ratio) < Fref) {
2220 arizona_fll_dbg(fll, "pseudo: hit VCO corner\n");
2225 arizona_fll_dbg(fll,
2235 arizona_fll_dbg(fll,
2246 arizona_fll_dbg(fll,
2251 arizona_fll_warn(fll, "Falling back to integer mode operation\n");
2255 static int arizona_calc_fll(struct arizona_fll *fll,
2262 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout);
2266 while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) {
2271 target = fll->fout * div / fll->vco_mult;
2274 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
2277 ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync);
2288 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
2314 arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
2319 arizona_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n",
2321 arizona_fll_dbg(fll, "FRATIO=0x%x(%d) OUTDIV=%d REFCLK_DIV=0x%x(%d)\n",
2324 arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain);
2364 static int arizona_is_enabled_fll(struct arizona_fll *fll, int base)
2366 struct arizona *arizona = fll->arizona;
2372 arizona_fll_err(fll, "Failed to read current state: %d\n",
2380 static int arizona_set_fll_clks(struct arizona_fll *fll, int base, bool ena)
2382 struct arizona *arizona = fll->arizona;
2389 arizona_fll_err(fll, "Failed to read current source: %d\n",
2416 static int arizona_enable_fll(struct arizona_fll *fll)
2418 struct arizona *arizona = fll->arizona;
2420 int already_enabled = arizona_is_enabled_fll(fll, fll->base);
2421 int sync_enabled = arizona_is_enabled_fll(fll, fll->base + 0x10);
2433 regmap_update_bits(fll->arizona->regmap, fll->base + 1,
2436 regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9,
2439 if (arizona_is_enabled_fll(fll, fll->base + 0x10) > 0)
2440 arizona_set_fll_clks(fll, fll->base + 0x10, false);
2441 arizona_set_fll_clks(fll, fll->base, false);
2448 if (fll->ref_src >= 0 && fll->ref_freq &&
2449 fll->ref_src != fll->sync_src) {
2450 arizona_calc_fll(fll, &cfg, fll->ref_freq, false);
2453 if (fll->sync_src >= 0 && cfg.lambda)
2456 arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src,
2458 if (fll->sync_src >= 0) {
2459 arizona_calc_fll(fll, &cfg, fll->sync_freq, true);
2461 arizona_apply_fll(arizona, fll->base + 0x10, &cfg,
2462 fll->sync_src, true);
2465 } else if (fll->sync_src >= 0) {
2466 arizona_calc_fll(fll, &cfg, fll->sync_freq, false);
2468 arizona_apply_fll(arizona, fll->base, &cfg,
2469 fll->sync_src, false);
2471 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2474 arizona_fll_err(fll, "No clocks provided\n");
2479 arizona_fll_warn(fll, "Synchroniser changed on active FLL\n");
2485 if (use_sync && fll->sync_freq > 100000)
2486 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2489 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2497 arizona_set_fll_clks(fll, fll->base + 0x10, true);
2498 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2502 arizona_set_fll_clks(fll, fll->base, true);
2503 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2507 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2510 arizona_fll_dbg(fll, "Waiting for FLL lock...\n");
2521 if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)))
2525 arizona_fll_warn(fll, "Timed out waiting for lock\n");
2527 arizona_fll_dbg(fll, "FLL locked (%d polls)\n", i);
2532 static void arizona_disable_fll(struct arizona_fll *fll)
2534 struct arizona *arizona = fll->arizona;
2537 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2539 regmap_update_bits_check(arizona->regmap, fll->base + 1,
2541 regmap_update_bits_check(arizona->regmap, fll->base + 0x11,
2543 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2547 arizona_set_fll_clks(fll, fll->base + 0x10, false);
2550 arizona_set_fll_clks(fll, fll->base, false);
2555 int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
2560 if (fll->ref_src == source && fll->ref_freq == Fref)
2563 if (fll->fout && Fref > 0) {
2564 ret = arizona_validate_fll(fll, Fref, fll->fout);
2569 fll->ref_src = source;
2570 fll->ref_freq = Fref;
2572 if (fll->fout && Fref > 0)
2573 ret = arizona_enable_fll(fll);
2579 int arizona_set_fll(struct arizona_fll *fll, int source,
2584 if (fll->sync_src == source &&
2585 fll->sync_freq == Fref && fll->fout == Fout)
2589 if (fll->ref_src >= 0) {
2590 ret = arizona_validate_fll(fll, fll->ref_freq, Fout);
2595 ret = arizona_validate_fll(fll, Fref, Fout);
2600 fll->sync_src = source;
2601 fll->sync_freq = Fref;
2602 fll->fout = Fout;
2605 ret = arizona_enable_fll(fll);
2607 arizona_disable_fll(fll);
2614 int ok_irq, struct arizona_fll *fll)
2618 fll->id = id;
2619 fll->base = base;
2620 fll->arizona = arizona;
2621 fll->sync_src = ARIZONA_FLL_SRC_NONE;
2628 fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
2631 fll->ref_src = ARIZONA_FLL_SRC_NONE;
2633 fll->ref_freq = 32768;
2635 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
2636 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
2639 regmap_update_bits(arizona->regmap, fll->base + 1,