pci/vx222/vx222_ops.c

76 	struct snd_vx222 *chip = to_vx222(_chip);
77 	return chip->port[vx2_reg_index[reg]] + vx2_reg_offset[reg];
82  * @chip: VX core instance
85 static unsigned char vx2_inb(struct vx_core *chip, int offset)
87 	return inb(vx2_reg_addr(chip, offset));
92  * @chip: VX core instance
96 static void vx2_outb(struct vx_core *chip, int offset, unsigned char val)
98 	outb(val, vx2_reg_addr(chip, offset));
100 	dev_dbg(chip->card->dev, "outb: %x -> %x\n", val, vx2_reg_addr(chip, offset));
106  * @chip: VX core instance
109 static unsigned int vx2_inl(struct vx_core *chip, int offset)
111 	return inl(vx2_reg_addr(chip, offset));
116  * @chip: VX core instance
120 static void vx2_outl(struct vx_core *chip, int offset, unsigned int val)
123 	dev_dbg(chip->card->dev, "outl: %x -> %x\n", val, vx2_reg_addr(chip, offset));
125 	outl(val, vx2_reg_addr(chip, offset));
132 #define vx_inb(chip,reg)	vx2_inb((struct vx_core*)(chip), VX_##reg)
134 #define vx_outb(chip,reg,val)	vx2_outb((struct vx_core*)(chip), VX_##reg, val)
136 #define vx_inl(chip,reg)	vx2_inl((struct vx_core*)(chip), VX_##reg)
138 #define vx_outl(chip,reg,val)	vx2_outl((struct vx_core*)(chip), VX_##reg, val)
149 	struct snd_vx222 *chip = to_vx222(_chip);
152 	vx_outl(chip, CDSP, chip->regCDSP & ~VX_CDSP_DSP_RESET_MASK);
156 	chip->regCDSP |= VX_CDSP_DSP_RESET_MASK;
158 	vx_outl(chip, CDSP, chip->regCDSP);
164 	struct snd_vx222 *chip = to_vx222(_chip);
173 	vx_outl(chip, CDSP, chip->regCDSP | VX_CDSP_TEST0_MASK);
174 	vx_inl(chip, ISR);
175 	data = vx_inl(chip, STATUS);
182 	vx_outl(chip, CDSP, chip->regCDSP & ~VX_CDSP_TEST0_MASK);
183 	vx_inl(chip, ISR);
184 	data = vx_inl(chip, STATUS);
193 		vx_outl(chip, CDSP, chip->regCDSP | VX_CDSP_TEST1_MASK);
194 		vx_inl(chip, ISR);
195 		data = vx_inl(chip, STATUS);
202 		vx_outl(chip, CDSP, chip->regCDSP & ~VX_CDSP_TEST1_MASK);
203 		vx_inl(chip, ISR);
204 		data = vx_inl(chip, STATUS);
217  * @chip: VX core instance
220 static void vx2_setup_pseudo_dma(struct vx_core *chip, int do_write)
225 	vx_outl(chip, ICR, do_write ? ICR_TREQ : ICR_RREQ);
230 	vx_outl(chip, RESET_DMA, 0);
236 static inline void vx2_release_pseudo_dma(struct vx_core *chip)
239 	vx_outl(chip, ICR, 0);
245 static void vx2_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
248 	unsigned long port = vx2_reg_addr(chip, VX_DMA);
255 	vx2_setup_pseudo_dma(chip, 1);
279 	vx2_release_pseudo_dma(chip);
284 static void vx2_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
289 	unsigned long port = vx2_reg_addr(chip, VX_DMA);
294 	vx2_setup_pseudo_dma(chip, 0);
313 	vx2_release_pseudo_dma(chip);
324 static int put_xilinx_data(struct vx_core *chip, unsigned int port, unsigned int counts, unsigned char data)
333 		vx2_outl(chip, port, val);
334 		vx2_inl(chip, port);
341 		vx2_outl(chip, port, val);
342 		vx2_inl(chip, port);
346 		vx2_outl(chip, port, val);
347 		vx2_inl(chip, port);
356 static int vx2_load_xilinx_binary(struct vx_core *chip, const struct firmware *xilinx)
363 	vx_outl(chip, CNTRL, VX_CNTRL_REGISTER_VALUE | VX_XILINX_RESET_MASK);
364 	vx_inl(chip, CNTRL);
366 	vx_outl(chip, CNTRL, VX_CNTRL_REGISTER_VALUE);
367 	vx_inl(chip, CNTRL);
370 	if (chip->type == VX_TYPE_BOARD)
377 		if (put_xilinx_data(chip, port, 8, *image) < 0)
382 	put_xilinx_data(chip, port, 4, 0xff); /* end signature */
387 	if (chip->type != VX_TYPE_BOARD) {
389 		i = vx_inl(chip, GPIOC);
392 		dev_err(chip->card->dev,
438 static int vx2_test_and_ack(struct vx_core *chip)
441 	if (! (chip->chip_status & VX_STAT_XILINX_LOADED))
444 	if (! (vx_inl(chip, STATUS) & VX_STATUS_MEMIRQ_MASK))
449 	vx_outl(chip, STATUS, 0);
453 	vx_inl(chip, STATUS);
455 	vx_outl(chip, STATUS, VX_STATUS_MEMIRQ_MASK);
458 	vx_inl(chip, STATUS);
460 	vx_outl(chip, STATUS, 0);
471 	struct snd_vx222 *chip = to_vx222(_chip);
476 		vx_outl(chip, INTCSR, VX_INTCSR_VALUE|VX_PCI_INTERRUPT_MASK);
477 		chip->regCDSP |= VX_CDSP_VALID_IRQ_MASK;
480 		vx_outl(chip, INTCSR, VX_INTCSR_VALUE&~VX_PCI_INTERRUPT_MASK);
481 		chip->regCDSP &= ~VX_CDSP_VALID_IRQ_MASK;
483 	vx_outl(chip, CDSP, chip->regCDSP);
490 static void vx2_write_codec_reg(struct vx_core *chip, unsigned int data)
494 	vx_inl(chip, HIFREQ);
498 		vx_outl(chip, DATA, ((data & 0x800000) ? VX_DATA_CODEC_MASK : 0));
500 	vx_inl(chip, RUER);
666 static void vx2_write_akm(struct vx_core *chip, int reg, unsigned int data)
671 		vx2_write_codec_reg(chip, data ? AKM_CODEC_MUTE_CMD : AKM_CODEC_UNMUTE_CMD);
695 	vx2_write_codec_reg(chip, val);
702 static void vx2_old_write_codec_bit(struct vx_core *chip, int codec, unsigned int data)
707 	vx_inl(chip, HIFREQ);
710 		vx_outl(chip, DATA, ((data & 0x800000) ? VX_DATA_CODEC_MASK : 0));
713 	vx_inl(chip, RUER);
722 	struct snd_vx222 *chip = to_vx222(_chip);
725 	vx_outl(chip, CDSP, chip->regCDSP &~ VX_CDSP_CODEC_RESET_MASK);
726 	vx_inl(chip, CDSP);
729 	chip->regCDSP |= VX_CDSP_CODEC_RESET_MASK;
730 	vx_outl(chip, CDSP, chip->regCDSP);
731 	vx_inl(chip, CDSP);
747 		chip->regSELMIC =  MICRO_SELECT_INPUT_NORM |
752 		chip->regSELMIC &= ~MICRO_SELECT_PHANTOM_ALIM;
754 		vx_outl(_chip, SELMIC, chip->regSELMIC);
764 	struct snd_vx222 *chip = to_vx222(_chip);
768 		chip->regCFG |= VX_CFG_DATAIN_SEL_MASK;
771 		chip->regCFG &= ~VX_CFG_DATAIN_SEL_MASK;
774 	vx_outl(chip, CFG, chip->regCFG);
783 	struct snd_vx222 *chip = to_vx222(_chip);
786 		chip->regCFG &= ~VX_CFG_CLOCKIN_SEL_MASK;
788 		chip->regCFG |= VX_CFG_CLOCKIN_SEL_MASK;
789 	vx_outl(chip, CFG, chip->regCFG);
797 	struct snd_vx222 *chip = to_vx222(_chip);
800 	chip->regCDSP = VX_CDSP_CODEC_RESET_MASK | VX_CDSP_DSP_RESET_MASK ;
801 	chip->regCFG = 0;
816 static void vx2_set_input_level(struct snd_vx222 *chip)
821 	miclevel = chip->mic_level;
832 	chip->regSELMIC &= ~MICRO_SELECT_PREAMPLI_MASK;
833 	chip->regSELMIC |= (preamp << MICRO_SELECT_PREAMPLI_OFFSET) & MICRO_SELECT_PREAMPLI_MASK;
834 	vx_outl(chip, SELMIC, chip->regSELMIC);
837 		(unsigned int)chip->input_level[1] << 8 |
838 		(unsigned int)chip->input_level[0];
839 	vx_inl(chip, DATA); /* Activate input level programming */
843 		vx_outl(chip, DATA, ((data & 0x80000000) ? VX_DATA_CODEC_MASK : 0));
845 	vx_inl(chip, RUER); /* Terminate input level programming */
870 	struct snd_vx222 *chip = to_vx222(_chip);
872 	ucontrol->value.integer.value[0] = chip->input_level[0];
873 	ucontrol->value.integer.value[1] = chip->input_level[1];
881 	struct snd_vx222 *chip = to_vx222(_chip);
889 	if (chip->input_level[0] != ucontrol->value.integer.value[0] ||
890 	    chip->input_level[1] != ucontrol->value.integer.value[1]) {
891 		chip->input_level[0] = ucontrol->value.integer.value[0];
892 		chip->input_level[1] = ucontrol->value.integer.value[1];
893 		vx2_set_input_level(chip);
914 	struct snd_vx222 *chip = to_vx222(_chip);
915 	ucontrol->value.integer.value[0] = chip->mic_level;
922 	struct snd_vx222 *chip = to_vx222(_chip);
927 	if (chip->mic_level != ucontrol->value.integer.value[0]) {
928 		chip->mic_level = ucontrol->value.integer.value[0];
929 		vx2_set_input_level(chip);
965 	struct snd_vx222 *chip = to_vx222(_chip);
972 	chip->input_level[0] = chip->input_level[1] = 0;
973 	chip->mic_level = 0;
974 	vx2_set_input_level(chip);
977 	err = snd_ctl_add(_chip->card, snd_ctl_new1(&vx_control_input_level, chip));
980 	err = snd_ctl_add(_chip->card, snd_ctl_new1(&vx_control_mic_level, chip));