sound/pci/cmipci.c

79 #define CM_REG_FUNCTRL1		0x04
641  * at the register CM_REG_FUNCTRL1 (0x04).
813 	val = snd_cmipci_read(cm, CM_REG_FUNCTRL1);
821 	snd_cmipci_write(cm, CM_REG_FUNCTRL1, val);
1236 		/* snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_SPDO2DAC); */
1238 			snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF);
1252 		/* snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_SPDO2DAC); */
1254 		snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF);
1324 		val = snd_cmipci_read(cm, CM_REG_FUNCTRL1);
1327 		snd_cmipci_write(cm, CM_REG_FUNCTRL1, val);
1383 	snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_CAPTURE_SPDF);
1405 	snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_CAPTURE_SPDF);
2394 DEFINE_BIT_SWITCH_ARG(spdif_in, CM_REG_FUNCTRL1, CM_SPDF_1, 0, 0);
2395 DEFINE_BIT_SWITCH_ARG(spdif_out, CM_REG_FUNCTRL1, CM_SPDF_0, 0, 0);
2400 DEFINE_BIT_SWITCH_ARG(spdo2dac, CM_REG_FUNCTRL1, CM_SPDO2DAC, 0, 1);
2406 DEFINE_BIT_SWITCH_ARG(spdif_loop, CM_REG_FUNCTRL1, CM_SPDFLOOP, 0, 1);
2419 // DEFINE_BIT_SWITCH_ARG(joystick, CM_REG_FUNCTRL1, CM_JYSTK_EN, 0, 0); /* now module option */
2458 				snd_cmipci_set_bit(chip, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF);
2461 				snd_cmipci_clear_bit(chip, CM_REG_FUNCTRL1, CM_PLAYBACK_SPDF);
2860 	snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_JYSTK_EN);
2873 		snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_JYSTK_EN);
2891 	snd_cmipci_write(cm, CM_REG_FUNCTRL1, 0);
3034 	snd_cmipci_write(cm, CM_REG_FUNCTRL1, 0);
3048 	snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_BREQ);
3120 			snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_UART_EN);
3125 				snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1,
3188 		snd_cmipci_clear_bit(cm, CM_REG_FUNCTRL1, CM_JYSTK_EN);
3252 	CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL,