Lines Matching defs:chip
8 * Yamaha OPL3-SA3 chip
151 static inline void wss_outb(struct snd_wss *chip, u8 offset, u8 val)
153 outb(val, chip->port + offset);
156 static inline u8 wss_inb(struct snd_wss *chip, u8 offset)
158 return inb(chip->port + offset);
161 static void snd_wss_wait(struct snd_wss *chip)
166 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
171 static void snd_wss_dout(struct snd_wss *chip, unsigned char reg,
177 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
180 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
181 wss_outb(chip, CS4231P(REG), value);
185 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char value)
187 snd_wss_wait(chip);
189 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
190 dev_dbg(chip->card->dev,
194 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
195 wss_outb(chip, CS4231P(REG), value);
196 chip->image[reg] = value;
198 dev_dbg(chip->card->dev, "codec out - reg 0x%x = 0x%x\n",
199 chip->mce_bit | reg, value);
203 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg)
205 snd_wss_wait(chip);
207 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
208 dev_dbg(chip->card->dev,
211 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
213 return wss_inb(chip, CS4231P(REG));
217 void snd_cs4236_ext_out(struct snd_wss *chip, unsigned char reg,
220 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
221 wss_outb(chip, CS4231P(REG),
222 reg | (chip->image[CS4236_EXT_REG] & 0x01));
223 wss_outb(chip, CS4231P(REG), val);
224 chip->eimage[CS4236_REG(reg)] = val;
226 dev_dbg(chip->card->dev, "ext out : reg = 0x%x, val = 0x%x\n", reg, val);
231 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg)
233 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
234 wss_outb(chip, CS4231P(REG),
235 reg | (chip->image[CS4236_EXT_REG] & 0x01));
237 return wss_inb(chip, CS4231P(REG));
241 res = wss_inb(chip, CS4231P(REG));
242 dev_dbg(chip->card->dev, "ext in : reg = 0x%x, val = 0x%x\n",
252 static void snd_wss_debug(struct snd_wss *chip)
254 dev_dbg(chip->card->dev,
257 wss_inb(chip, CS4231P(REGSEL)),
258 wss_inb(chip, CS4231P(STATUS)));
259 dev_dbg(chip->card->dev,
262 snd_wss_in(chip, 0x00),
263 snd_wss_in(chip, 0x10));
264 dev_dbg(chip->card->dev,
267 snd_wss_in(chip, 0x01),
268 snd_wss_in(chip, 0x11));
269 dev_dbg(chip->card->dev,
272 snd_wss_in(chip, 0x02),
273 snd_wss_in(chip, 0x12));
274 dev_dbg(chip->card->dev,
277 snd_wss_in(chip, 0x03),
278 snd_wss_in(chip, 0x13));
279 dev_dbg(chip->card->dev,
282 snd_wss_in(chip, 0x04),
283 snd_wss_in(chip, 0x14));
284 dev_dbg(chip->card->dev,
287 snd_wss_in(chip, 0x05),
288 snd_wss_in(chip, 0x15));
289 dev_dbg(chip->card->dev,
292 snd_wss_in(chip, 0x06),
293 snd_wss_in(chip, 0x16));
294 dev_dbg(chip->card->dev,
297 snd_wss_in(chip, 0x07),
298 snd_wss_in(chip, 0x17));
299 dev_dbg(chip->card->dev,
302 snd_wss_in(chip, 0x08),
303 snd_wss_in(chip, 0x18));
304 dev_dbg(chip->card->dev,
307 snd_wss_in(chip, 0x09),
308 snd_wss_in(chip, 0x19));
309 dev_dbg(chip->card->dev,
312 snd_wss_in(chip, 0x0a),
313 snd_wss_in(chip, 0x1a));
314 dev_dbg(chip->card->dev,
317 snd_wss_in(chip, 0x0b),
318 snd_wss_in(chip, 0x1b));
319 dev_dbg(chip->card->dev,
322 snd_wss_in(chip, 0x0c),
323 snd_wss_in(chip, 0x1c));
324 dev_dbg(chip->card->dev,
327 snd_wss_in(chip, 0x0d),
328 snd_wss_in(chip, 0x1d));
329 dev_dbg(chip->card->dev,
332 snd_wss_in(chip, 0x0e),
333 snd_wss_in(chip, 0x1e));
334 dev_dbg(chip->card->dev,
337 snd_wss_in(chip, 0x0f),
338 snd_wss_in(chip, 0x1f));
347 static void snd_wss_busy_wait(struct snd_wss *chip)
351 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
353 wss_inb(chip, CS4231P(REGSEL));
356 timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
361 void snd_wss_mce_up(struct snd_wss *chip)
366 snd_wss_wait(chip);
368 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
369 dev_dbg(chip->card->dev,
372 spin_lock_irqsave(&chip->reg_lock, flags);
373 chip->mce_bit |= CS4231_MCE;
374 timeout = wss_inb(chip, CS4231P(REGSEL));
376 dev_dbg(chip->card->dev,
378 chip->port);
380 wss_outb(chip, CS4231P(REGSEL),
381 chip->mce_bit | (timeout & 0x1f));
382 spin_unlock_irqrestore(&chip->reg_lock, flags);
386 void snd_wss_mce_down(struct snd_wss *chip)
393 snd_wss_busy_wait(chip);
396 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
397 dev_dbg(chip->card->dev,
401 spin_lock_irqsave(&chip->reg_lock, flags);
402 chip->mce_bit &= ~CS4231_MCE;
403 timeout = wss_inb(chip, CS4231P(REGSEL));
404 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
405 spin_unlock_irqrestore(&chip->reg_lock, flags);
407 dev_dbg(chip->card->dev,
409 chip->port);
410 if ((timeout & CS4231_MCE) == 0 || !(chip->hardware & hw_mask))
420 dev_dbg(chip->card->dev, "(1) jiffies = %lu\n", jiffies);
424 while (snd_wss_in(chip, CS4231_TEST_INIT) &
428 dev_err(chip->card->dev,
435 dev_dbg(chip->card->dev, "(2) jiffies = %lu\n", jiffies);
439 while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
441 dev_err(chip->card->dev,
448 dev_dbg(chip->card->dev, "(3) jiffies = %lu\n", jiffies);
449 dev_dbg(chip->card->dev, "mce_down - exit = 0x%x\n",
450 wss_inb(chip, CS4231P(REGSEL)));
472 struct snd_wss *chip = snd_pcm_substream_chip(substream);
491 if (s == chip->playback_substream) {
494 } else if (s == chip->capture_substream) {
499 spin_lock(&chip->reg_lock);
501 chip->image[CS4231_IFACE_CTRL] |= what;
502 if (chip->trigger)
503 chip->trigger(chip, what, 1);
505 chip->image[CS4231_IFACE_CTRL] &= ~what;
506 if (chip->trigger)
507 chip->trigger(chip, what, 0);
509 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
510 spin_unlock(&chip->reg_lock);
512 snd_wss_debug(chip);
532 static unsigned char snd_wss_get_format(struct snd_wss *chip,
549 dev_dbg(chip->card->dev, "get_format: 0x%x (mode=0x%x)\n", format, mode);
554 static void snd_wss_calibrate_mute(struct snd_wss *chip, int mute)
559 spin_lock_irqsave(&chip->reg_lock, flags);
560 if (chip->calibrate_mute == mute) {
561 spin_unlock_irqrestore(&chip->reg_lock, flags);
565 snd_wss_dout(chip, CS4231_LEFT_INPUT,
566 chip->image[CS4231_LEFT_INPUT]);
567 snd_wss_dout(chip, CS4231_RIGHT_INPUT,
568 chip->image[CS4231_RIGHT_INPUT]);
569 snd_wss_dout(chip, CS4231_LOOPBACK,
570 chip->image[CS4231_LOOPBACK]);
572 snd_wss_dout(chip, CS4231_LEFT_INPUT,
574 snd_wss_dout(chip, CS4231_RIGHT_INPUT,
576 snd_wss_dout(chip, CS4231_LOOPBACK,
580 snd_wss_dout(chip, CS4231_AUX1_LEFT_INPUT,
581 mute | chip->image[CS4231_AUX1_LEFT_INPUT]);
582 snd_wss_dout(chip, CS4231_AUX1_RIGHT_INPUT,
583 mute | chip->image[CS4231_AUX1_RIGHT_INPUT]);
584 snd_wss_dout(chip, CS4231_AUX2_LEFT_INPUT,
585 mute | chip->image[CS4231_AUX2_LEFT_INPUT]);
586 snd_wss_dout(chip, CS4231_AUX2_RIGHT_INPUT,
587 mute | chip->image[CS4231_AUX2_RIGHT_INPUT]);
588 snd_wss_dout(chip, CS4231_LEFT_OUTPUT,
589 mute | chip->image[CS4231_LEFT_OUTPUT]);
590 snd_wss_dout(chip, CS4231_RIGHT_OUTPUT,
591 mute | chip->image[CS4231_RIGHT_OUTPUT]);
592 if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
593 snd_wss_dout(chip, CS4231_LEFT_LINE_IN,
594 mute | chip->image[CS4231_LEFT_LINE_IN]);
595 snd_wss_dout(chip, CS4231_RIGHT_LINE_IN,
596 mute | chip->image[CS4231_RIGHT_LINE_IN]);
597 snd_wss_dout(chip, CS4231_MONO_CTRL,
598 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
600 if (chip->hardware == WSS_HW_INTERWAVE) {
601 snd_wss_dout(chip, CS4231_LEFT_MIC_INPUT,
602 mute | chip->image[CS4231_LEFT_MIC_INPUT]);
603 snd_wss_dout(chip, CS4231_RIGHT_MIC_INPUT,
604 mute | chip->image[CS4231_RIGHT_MIC_INPUT]);
605 snd_wss_dout(chip, CS4231_LINE_LEFT_OUTPUT,
606 mute | chip->image[CS4231_LINE_LEFT_OUTPUT]);
607 snd_wss_dout(chip, CS4231_LINE_RIGHT_OUTPUT,
608 mute | chip->image[CS4231_LINE_RIGHT_OUTPUT]);
610 chip->calibrate_mute = mute;
611 spin_unlock_irqrestore(&chip->reg_lock, flags);
614 static void snd_wss_playback_format(struct snd_wss *chip,
621 mutex_lock(&chip->mce_mutex);
622 if (chip->hardware == WSS_HW_CS4231A ||
623 (chip->hardware & WSS_HW_CS4232_MASK)) {
624 spin_lock_irqsave(&chip->reg_lock, flags);
625 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
626 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
627 chip->image[CS4231_ALT_FEATURE_1] | 0x10);
628 chip->image[CS4231_PLAYBK_FORMAT] = pdfr;
629 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
630 chip->image[CS4231_PLAYBK_FORMAT]);
631 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
632 chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
636 spin_unlock_irqrestore(&chip->reg_lock, flags);
637 } else if (chip->hardware == WSS_HW_AD1845) {
649 spin_lock_irqsave(&chip->reg_lock, flags);
650 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, (pdfr & 0xf0));
651 snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff);
652 snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff);
654 spin_unlock_irqrestore(&chip->reg_lock, flags);
657 snd_wss_mce_up(chip);
658 spin_lock_irqsave(&chip->reg_lock, flags);
659 if (chip->hardware != WSS_HW_INTERWAVE && !chip->single_dma) {
660 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)
662 (chip->image[CS4231_REC_FORMAT] & 0x0f);
664 chip->image[CS4231_PLAYBK_FORMAT] = pdfr;
666 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr);
667 spin_unlock_irqrestore(&chip->reg_lock, flags);
668 if (chip->hardware == WSS_HW_OPL3SA2)
670 snd_wss_mce_down(chip);
672 mutex_unlock(&chip->mce_mutex);
675 static void snd_wss_capture_format(struct snd_wss *chip,
682 mutex_lock(&chip->mce_mutex);
683 if (chip->hardware == WSS_HW_CS4231A ||
684 (chip->hardware & WSS_HW_CS4232_MASK)) {
685 spin_lock_irqsave(&chip->reg_lock, flags);
686 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
687 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
688 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
689 chip->image[CS4231_ALT_FEATURE_1] | 0x20);
690 snd_wss_out(chip, CS4231_REC_FORMAT,
691 chip->image[CS4231_REC_FORMAT] = cdfr);
692 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
693 chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
696 spin_unlock_irqrestore(&chip->reg_lock, flags);
697 } else if (chip->hardware == WSS_HW_AD1845) {
709 spin_lock_irqsave(&chip->reg_lock, flags);
710 snd_wss_out(chip, CS4231_REC_FORMAT, (cdfr & 0xf0));
711 snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff);
712 snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff);
714 spin_unlock_irqrestore(&chip->reg_lock, flags);
717 snd_wss_mce_up(chip);
718 spin_lock_irqsave(&chip->reg_lock, flags);
719 if (chip->hardware != WSS_HW_INTERWAVE &&
720 !(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
721 if (chip->single_dma)
722 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr);
724 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
725 (chip->image[CS4231_PLAYBK_FORMAT] & 0xf0) |
727 spin_unlock_irqrestore(&chip->reg_lock, flags);
728 snd_wss_mce_down(chip);
729 snd_wss_mce_up(chip);
730 spin_lock_irqsave(&chip->reg_lock, flags);
732 if (chip->hardware & WSS_HW_AD1848_MASK)
733 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, cdfr);
735 snd_wss_out(chip, CS4231_REC_FORMAT, cdfr);
736 spin_unlock_irqrestore(&chip->reg_lock, flags);
737 snd_wss_mce_down(chip);
739 mutex_unlock(&chip->mce_mutex);
748 struct snd_wss *chip = snd_timer_chip(timer);
749 if (chip->hardware & WSS_HW_CS4236B_MASK)
752 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
759 struct snd_wss *chip = snd_timer_chip(timer);
760 spin_lock_irqsave(&chip->reg_lock, flags);
762 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
763 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
764 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
765 chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8);
766 snd_wss_out(chip, CS4231_TIMER_HIGH,
767 chip->image[CS4231_TIMER_HIGH]);
768 chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks;
769 snd_wss_out(chip, CS4231_TIMER_LOW,
770 chip->image[CS4231_TIMER_LOW]);
771 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
772 chip->image[CS4231_ALT_FEATURE_1] |
775 spin_unlock_irqrestore(&chip->reg_lock, flags);
782 struct snd_wss *chip = snd_timer_chip(timer);
783 spin_lock_irqsave(&chip->reg_lock, flags);
784 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
785 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
786 chip->image[CS4231_ALT_FEATURE_1]);
787 spin_unlock_irqrestore(&chip->reg_lock, flags);
791 static void snd_wss_init(struct snd_wss *chip)
795 snd_wss_calibrate_mute(chip, 1);
796 snd_wss_mce_down(chip);
799 dev_dbg(chip->card->dev, "init: (1)\n");
801 snd_wss_mce_up(chip);
802 spin_lock_irqsave(&chip->reg_lock, flags);
803 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
808 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
809 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
810 spin_unlock_irqrestore(&chip->reg_lock, flags);
811 snd_wss_mce_down(chip);
814 dev_dbg(chip->card->dev, "init: (2)\n");
817 snd_wss_mce_up(chip);
818 spin_lock_irqsave(&chip->reg_lock, flags);
819 chip->image[CS4231_IFACE_CTRL] &= ~CS4231_AUTOCALIB;
820 snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
821 snd_wss_out(chip,
822 CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
823 spin_unlock_irqrestore(&chip->reg_lock, flags);
824 snd_wss_mce_down(chip);
827 dev_dbg(chip->card->dev, "init: (3) - afei = 0x%x\n",
828 chip->image[CS4231_ALT_FEATURE_1]);
831 spin_lock_irqsave(&chip->reg_lock, flags);
832 snd_wss_out(chip, CS4231_ALT_FEATURE_2,
833 chip->image[CS4231_ALT_FEATURE_2]);
834 spin_unlock_irqrestore(&chip->reg_lock, flags);
836 snd_wss_mce_up(chip);
837 spin_lock_irqsave(&chip->reg_lock, flags);
838 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
839 chip->image[CS4231_PLAYBK_FORMAT]);
840 spin_unlock_irqrestore(&chip->reg_lock, flags);
841 snd_wss_mce_down(chip);
844 dev_dbg(chip->card->dev, "init: (4)\n");
847 snd_wss_mce_up(chip);
848 spin_lock_irqsave(&chip->reg_lock, flags);
849 if (!(chip->hardware & WSS_HW_AD1848_MASK))
850 snd_wss_out(chip, CS4231_REC_FORMAT,
851 chip->image[CS4231_REC_FORMAT]);
852 spin_unlock_irqrestore(&chip->reg_lock, flags);
853 snd_wss_mce_down(chip);
854 snd_wss_calibrate_mute(chip, 0);
857 dev_dbg(chip->card->dev, "init: (5)\n");
861 static int snd_wss_open(struct snd_wss *chip, unsigned int mode)
865 mutex_lock(&chip->open_mutex);
866 if ((chip->mode & mode) ||
867 ((chip->mode & WSS_MODE_OPEN) && chip->single_dma)) {
868 mutex_unlock(&chip->open_mutex);
871 if (chip->mode & WSS_MODE_OPEN) {
872 chip->mode |= mode;
873 mutex_unlock(&chip->open_mutex);
877 spin_lock_irqsave(&chip->reg_lock, flags);
878 if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
879 snd_wss_out(chip, CS4231_IRQ_STATUS,
883 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
885 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
886 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
887 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
888 snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
889 if (!(chip->hardware & WSS_HW_AD1848_MASK)) {
890 snd_wss_out(chip, CS4231_IRQ_STATUS,
894 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
896 spin_unlock_irqrestore(&chip->reg_lock, flags);
898 chip->mode = mode;
899 mutex_unlock(&chip->open_mutex);
903 static void snd_wss_close(struct snd_wss *chip, unsigned int mode)
907 mutex_lock(&chip->open_mutex);
908 chip->mode &= ~mode;
909 if (chip->mode & WSS_MODE_OPEN) {
910 mutex_unlock(&chip->open_mutex);
914 spin_lock_irqsave(&chip->reg_lock, flags);
915 if (!(chip->hardware & WSS_HW_AD1848_MASK))
916 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
917 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
918 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
919 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
920 snd_wss_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
924 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
926 spin_unlock_irqrestore(&chip->reg_lock, flags);
927 snd_wss_mce_up(chip);
928 spin_lock_irqsave(&chip->reg_lock, flags);
929 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
931 snd_wss_out(chip, CS4231_IFACE_CTRL,
932 chip->image[CS4231_IFACE_CTRL]);
933 spin_unlock_irqrestore(&chip->reg_lock, flags);
934 snd_wss_mce_down(chip);
935 spin_lock_irqsave(&chip->reg_lock, flags);
939 if (!(chip->hardware & WSS_HW_AD1848_MASK))
940 snd_wss_out(chip, CS4231_IRQ_STATUS, 0);
941 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
942 wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
943 spin_unlock_irqrestore(&chip->reg_lock, flags);
945 chip->mode = 0;
946 mutex_unlock(&chip->open_mutex);
955 struct snd_wss *chip = snd_timer_chip(timer);
956 snd_wss_open(chip, WSS_MODE_TIMER);
962 struct snd_wss *chip = snd_timer_chip(timer);
963 snd_wss_close(chip, WSS_MODE_TIMER);
986 struct snd_wss *chip = snd_pcm_substream_chip(substream);
989 new_pdfr = snd_wss_get_format(chip, params_format(hw_params),
992 chip->set_playback_format(chip, hw_params, new_pdfr);
998 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1004 spin_lock_irqsave(&chip->reg_lock, flags);
1005 chip->p_dma_size = size;
1006 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
1007 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
1008 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
1009 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
1010 snd_wss_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
1011 spin_unlock_irqrestore(&chip->reg_lock, flags);
1013 snd_wss_debug(chip);
1021 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1024 new_cdfr = snd_wss_get_format(chip, params_format(hw_params),
1027 chip->set_capture_format(chip, hw_params, new_cdfr);
1033 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1039 spin_lock_irqsave(&chip->reg_lock, flags);
1040 chip->c_dma_size = size;
1041 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
1042 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
1043 if (chip->hardware & WSS_HW_AD1848_MASK)
1044 count = snd_wss_get_count(chip->image[CS4231_PLAYBK_FORMAT],
1047 count = snd_wss_get_count(chip->image[CS4231_REC_FORMAT],
1050 if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) {
1051 snd_wss_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
1052 snd_wss_out(chip, CS4231_PLY_UPR_CNT,
1055 snd_wss_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
1056 snd_wss_out(chip, CS4231_REC_UPR_CNT,
1059 spin_unlock_irqrestore(&chip->reg_lock, flags);
1063 void snd_wss_overrange(struct snd_wss *chip)
1068 spin_lock_irqsave(&chip->reg_lock, flags);
1069 res = snd_wss_in(chip, CS4231_TEST_INIT);
1070 spin_unlock_irqrestore(&chip->reg_lock, flags);
1072 chip->capture_substream->runtime->overrange++;
1078 struct snd_wss *chip = dev_id;
1081 if (chip->hardware & WSS_HW_AD1848_MASK)
1085 status = snd_wss_in(chip, CS4231_IRQ_STATUS);
1087 if (chip->timer)
1088 snd_timer_interrupt(chip->timer, chip->timer->sticks);
1090 if (chip->single_dma && chip->hardware != WSS_HW_INTERWAVE) {
1092 if (chip->mode & WSS_MODE_PLAY) {
1093 if (chip->playback_substream)
1094 snd_pcm_period_elapsed(chip->playback_substream);
1096 if (chip->mode & WSS_MODE_RECORD) {
1097 if (chip->capture_substream) {
1098 snd_wss_overrange(chip);
1099 snd_pcm_period_elapsed(chip->capture_substream);
1105 if (chip->playback_substream)
1106 snd_pcm_period_elapsed(chip->playback_substream);
1109 if (chip->capture_substream) {
1110 snd_wss_overrange(chip);
1111 snd_pcm_period_elapsed(chip->capture_substream);
1116 spin_lock(&chip->reg_lock);
1118 if (chip->hardware & WSS_HW_AD1848_MASK)
1119 wss_outb(chip, CS4231P(STATUS), 0);
1121 snd_wss_out(chip, CS4231_IRQ_STATUS, status);
1122 spin_unlock(&chip->reg_lock);
1129 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1132 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1134 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1140 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1143 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1145 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1153 static int snd_ad1848_probe(struct snd_wss *chip)
1162 while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
1167 spin_lock_irqsave(&chip->reg_lock, flags);
1170 snd_wss_dout(chip, CS4231_MISC_INFO, 0);
1172 snd_wss_dout(chip, CS4231_RIGHT_INPUT, 0x45); /* 0x55 & ~0x10 */
1173 r = snd_wss_in(chip, CS4231_RIGHT_INPUT);
1182 snd_wss_dout(chip, CS4231_LEFT_INPUT, 0xaa);
1183 r = snd_wss_in(chip, CS4231_LEFT_INPUT);
1192 wss_inb(chip, CS4231P(STATUS));
1193 wss_outb(chip, CS4231P(STATUS), 0);
1196 if ((chip->hardware & WSS_HW_TYPE_MASK) != WSS_HW_DETECT)
1200 chip->hardware = hardware;
1204 r = snd_wss_in(chip, CS4231_MISC_INFO);
1207 snd_wss_dout(chip, CS4231_MISC_INFO, CS4231_MODE2);
1209 if (snd_wss_in(chip, i) != snd_wss_in(chip, 16 + i)) {
1217 snd_wss_dout(chip, CS4231_VERSION, 0);
1218 r = snd_wss_in(chip, CS4231_VERSION) & 0xe7;
1220 chip->hardware = WSS_HW_CMI8330;
1225 chip->hardware = WSS_HW_CS4248;
1227 chip->hardware = WSS_HW_AD1848;
1229 snd_wss_dout(chip, CS4231_MISC_INFO, 0);
1231 spin_unlock_irqrestore(&chip->reg_lock, flags);
1235 static int snd_wss_probe(struct snd_wss *chip)
1242 id = snd_ad1848_probe(chip);
1246 hw = chip->hardware;
1250 if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1253 spin_lock_irqsave(&chip->reg_lock, flags);
1254 snd_wss_out(chip, CS4231_MISC_INFO,
1256 id = snd_wss_in(chip, CS4231_MISC_INFO) & 0x0f;
1257 spin_unlock_irqrestore(&chip->reg_lock, flags);
1262 dev_dbg(chip->card->dev, "wss: port = 0x%lx, id = 0x%x\n",
1263 chip->port, id);
1267 rev = snd_wss_in(chip, CS4231_VERSION) & 0xe7;
1268 dev_dbg(chip->card->dev, "CS4231: VERSION (I25) = 0x%x\n", rev);
1270 unsigned char tmp = snd_wss_in(chip, 23);
1271 snd_wss_out(chip, 23, ~tmp);
1272 if (snd_wss_in(chip, 23) != tmp)
1273 chip->hardware = WSS_HW_AD1845;
1275 chip->hardware = WSS_HW_CS4231;
1277 chip->hardware = WSS_HW_CS4231A;
1279 chip->hardware = WSS_HW_CS4232;
1281 chip->hardware = WSS_HW_CS4232A;
1283 chip->hardware = WSS_HW_CS4236;
1285 chip->hardware = WSS_HW_CS4236B;
1287 dev_err(chip->card->dev,
1288 "unknown CS chip with version 0x%x\n", rev);
1289 return -ENODEV; /* unknown CS4231 chip? */
1292 spin_lock_irqsave(&chip->reg_lock, flags);
1293 wss_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1294 wss_outb(chip, CS4231P(STATUS), 0);
1296 spin_unlock_irqrestore(&chip->reg_lock, flags);
1298 if (!(chip->hardware & WSS_HW_AD1848_MASK))
1299 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1300 switch (chip->hardware) {
1302 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1310 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1312 chip->hardware = WSS_HW_CS4236;
1316 chip->image[CS4231_IFACE_CTRL] =
1317 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1318 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1319 if (chip->hardware != WSS_HW_OPTI93X) {
1320 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1321 chip->image[CS4231_ALT_FEATURE_2] =
1322 chip->hardware == WSS_HW_INTERWAVE ? 0xc2 : 0x01;
1325 if (chip->hardware == WSS_HW_AD1845)
1326 chip->image[AD1845_PWR_DOWN] = 8;
1328 ptr = (unsigned char *) &chip->image;
1329 regnum = (chip->hardware & WSS_HW_AD1848_MASK) ? 16 : 32;
1330 snd_wss_mce_down(chip);
1331 spin_lock_irqsave(&chip->reg_lock, flags);
1333 snd_wss_out(chip, i, *ptr++);
1334 spin_unlock_irqrestore(&chip->reg_lock, flags);
1335 snd_wss_mce_up(chip);
1336 snd_wss_mce_down(chip);
1342 if (chip->hardware == WSS_HW_CS4236B) {
1343 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1344 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1345 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1346 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1347 dev_dbg(chip->card->dev,
1351 chip->hardware = WSS_HW_CS4235;
1358 dev_warn(chip->card->dev,
1359 "unknown CS4235 chip (enhanced version = 0x%x)\n",
1368 chip->hardware = WSS_HW_CS4236B;
1371 dev_warn(chip->card->dev,
1372 "unknown CS4236 chip (enhanced version = 0x%x)\n",
1376 chip->hardware = WSS_HW_CS4237B;
1384 dev_warn(chip->card->dev,
1385 "unknown CS4237B chip (enhanced version = 0x%x)\n",
1389 chip->hardware = WSS_HW_CS4238B;
1396 dev_warn(chip->card->dev,
1397 "unknown CS4238B chip (enhanced version = 0x%x)\n",
1401 chip->hardware = WSS_HW_CS4239;
1408 dev_warn(chip->card->dev,
1409 "unknown CS4239 chip (enhanced version = 0x%x)\n",
1413 dev_warn(chip->card->dev,
1414 "unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n",
1473 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1480 if (chip->hardware & WSS_HW_AD1848_MASK)
1485 if (chip->hardware == WSS_HW_INTERWAVE && chip->dma1 > 3)
1489 if (chip->hardware == WSS_HW_CS4235 ||
1490 chip->hardware == WSS_HW_CS4239)
1493 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1494 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1496 if (chip->claim_dma) {
1497 err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1);
1502 err = snd_wss_open(chip, WSS_MODE_PLAY);
1504 if (chip->release_dma)
1505 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1508 chip->playback_substream = substream;
1510 chip->rate_constraint(runtime);
1516 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1523 if (chip->hardware & WSS_HW_AD1848_MASK)
1528 if (chip->hardware == WSS_HW_CS4235 ||
1529 chip->hardware == WSS_HW_CS4239 ||
1530 chip->hardware == WSS_HW_OPTI93X)
1534 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1535 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1537 if (chip->claim_dma) {
1538 err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2);
1543 err = snd_wss_open(chip, WSS_MODE_RECORD);
1545 if (chip->release_dma)
1546 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1549 chip->capture_substream = substream;
1551 chip->rate_constraint(runtime);
1557 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1559 chip->playback_substream = NULL;
1560 snd_wss_close(chip, WSS_MODE_PLAY);
1566 struct snd_wss *chip = snd_pcm_substream_chip(substream);
1568 chip->capture_substream = NULL;
1569 snd_wss_close(chip, WSS_MODE_RECORD);
1573 static void snd_wss_thinkpad_twiddle(struct snd_wss *chip, int on)
1577 if (!chip->thinkpad_flag)
1596 static void snd_wss_suspend(struct snd_wss *chip)
1601 spin_lock_irqsave(&chip->reg_lock, flags);
1603 chip->image[reg] = snd_wss_in(chip, reg);
1604 spin_unlock_irqrestore(&chip->reg_lock, flags);
1605 if (chip->thinkpad_flag)
1606 snd_wss_thinkpad_twiddle(chip, 0);
1610 static void snd_wss_resume(struct snd_wss *chip)
1616 if (chip->thinkpad_flag)
1617 snd_wss_thinkpad_twiddle(chip, 1);
1618 snd_wss_mce_up(chip);
1619 spin_lock_irqsave(&chip->reg_lock, flags);
1625 snd_wss_out(chip, reg, chip->image[reg]);
1630 if (chip->hardware == WSS_HW_OPL3SA2)
1631 snd_wss_out(chip, CS4231_PLAYBK_FORMAT,
1632 chip->image[CS4231_PLAYBK_FORMAT]);
1633 spin_unlock_irqrestore(&chip->reg_lock, flags);
1635 snd_wss_mce_down(chip);
1641 snd_wss_busy_wait(chip);
1642 spin_lock_irqsave(&chip->reg_lock, flags);
1643 chip->mce_bit &= ~CS4231_MCE;
1644 timeout = wss_inb(chip, CS4231P(REGSEL));
1645 wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1646 spin_unlock_irqrestore(&chip->reg_lock, flags);
1648 dev_err(chip->card->dev
1650 chip->port);
1652 !(chip->hardware & (WSS_HW_CS4231_MASK | WSS_HW_CS4232_MASK))) {
1655 snd_wss_busy_wait(chip);
1660 const char *snd_wss_chip_id(struct snd_wss *chip)
1662 switch (chip->hardware) {
1686 return chip->card->shortname;
1710 struct snd_wss *chip;
1713 chip = devm_kzalloc(card->dev, sizeof(*chip), GFP_KERNEL);
1714 if (chip == NULL)
1716 chip->hardware = hardware;
1717 chip->hwshare = hwshare;
1719 spin_lock_init(&chip->reg_lock);
1720 mutex_init(&chip->mce_mutex);
1721 mutex_init(&chip->open_mutex);
1722 chip->card = card;
1723 chip->rate_constraint = snd_wss_xrate;
1724 chip->set_playback_format = snd_wss_playback_format;
1725 chip->set_capture_format = snd_wss_capture_format;
1726 if (chip->hardware == WSS_HW_OPTI93X)
1727 memcpy(&chip->image, &snd_opti93x_original_image,
1730 memcpy(&chip->image, &snd_wss_original_image,
1732 if (chip->hardware & WSS_HW_AD1848_MASK) {
1733 chip->image[CS4231_PIN_CTRL] = 0;
1734 chip->image[CS4231_TEST_INIT] = 0;
1737 *rchip = chip;
1749 struct snd_wss *chip;
1752 err = snd_wss_new(card, hardware, hwshare, &chip);
1756 chip->irq = -1;
1757 chip->dma1 = -1;
1758 chip->dma2 = -1;
1760 chip->res_port = devm_request_region(card->dev, port, 4, "WSS");
1761 if (!chip->res_port) {
1762 dev_err(chip->card->dev, "wss: can't grab port 0x%lx\n", port);
1765 chip->port = port;
1767 chip->res_cport = devm_request_region(card->dev, cport, 8,
1769 if (!chip->res_cport) {
1770 dev_err(chip->card->dev,
1775 chip->cport = cport;
1778 "WSS", (void *) chip)) {
1779 dev_err(chip->card->dev, "wss: can't grab IRQ %d\n", irq);
1782 chip->irq = irq;
1783 card->sync_irq = chip->irq;
1786 dev_err(chip->card->dev, "wss: can't grab DMA1 %d\n", dma1);
1789 chip->dma1 = dma1;
1792 dev_err(chip->card->dev, "wss: can't grab DMA2 %d\n", dma2);
1796 chip->single_dma = 1;
1797 chip->dma2 = chip->dma1;
1799 chip->dma2 = dma2;
1802 chip->thinkpad_flag = 1;
1803 chip->hardware = WSS_HW_DETECT; /* reset */
1804 snd_wss_thinkpad_twiddle(chip, 1);
1808 if (snd_wss_probe(chip) < 0)
1810 snd_wss_init(chip);
1813 if (chip->hardware & WSS_HW_CS4232_MASK) {
1814 if (chip->res_cport == NULL)
1815 dev_err(chip->card->dev,
1822 chip->suspend = snd_wss_suspend;
1823 chip->resume = snd_wss_resume;
1826 *rchip = chip;
1849 int snd_wss_pcm(struct snd_wss *chip, int device)
1854 err = snd_pcm_new(chip->card, "WSS", device, 1, 1, &pcm);
1862 pcm->private_data = chip;
1864 if (chip->single_dma)
1866 if (chip->hardware != WSS_HW_INTERWAVE)
1868 strscpy(pcm->name, snd_wss_chip_id(chip));
1870 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, chip->card->dev,
1871 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1873 chip->pcm = pcm;
1880 struct snd_wss *chip = timer->private_data;
1881 chip->timer = NULL;
1884 int snd_wss_timer(struct snd_wss *chip, int device)
1893 tid.card = chip->card->number;
1896 err = snd_timer_new(chip->card, "CS4231", &tid, &timer);
1899 strscpy(timer->name, snd_wss_chip_id(chip));
1900 timer->private_data = chip;
1903 chip->timer = timer;
1925 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1927 if (snd_BUG_ON(!chip->card))
1929 if (!strcmp(chip->card->driver, "GUS MAX"))
1931 switch (chip->hardware) {
1946 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1949 spin_lock_irqsave(&chip->reg_lock, flags);
1950 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1951 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1952 spin_unlock_irqrestore(&chip->reg_lock, flags);
1959 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
1969 spin_lock_irqsave(&chip->reg_lock, flags);
1970 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1971 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1972 change = left != chip->image[CS4231_LEFT_INPUT] ||
1973 right != chip->image[CS4231_RIGHT_INPUT];
1974 snd_wss_out(chip, CS4231_LEFT_INPUT, left);
1975 snd_wss_out(chip, CS4231_RIGHT_INPUT, right);
1976 spin_unlock_irqrestore(&chip->reg_lock, flags);
1996 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2003 spin_lock_irqsave(&chip->reg_lock, flags);
2004 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
2005 spin_unlock_irqrestore(&chip->reg_lock, flags);
2015 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2028 spin_lock_irqsave(&chip->reg_lock, flags);
2029 val = (chip->image[reg] & ~(mask << shift)) | val;
2030 change = val != chip->image[reg];
2031 snd_wss_out(chip, reg, val);
2032 spin_unlock_irqrestore(&chip->reg_lock, flags);
2053 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2062 spin_lock_irqsave(&chip->reg_lock, flags);
2063 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
2064 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
2065 spin_unlock_irqrestore(&chip->reg_lock, flags);
2077 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
2096 spin_lock_irqsave(&chip->reg_lock, flags);
2098 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
2099 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
2100 change = val1 != chip->image[left_reg] ||
2101 val2 != chip->image[right_reg];
2102 snd_wss_out(chip, left_reg, val1);
2103 snd_wss_out(chip, right_reg, val2);
2106 val1 = (chip->image[left_reg] & ~mask) | val1 | val2;
2107 change = val1 != chip->image[left_reg];
2108 snd_wss_out(chip, left_reg, val1);
2110 spin_unlock_irqrestore(&chip->reg_lock, flags);
2167 int snd_wss_mixer(struct snd_wss *chip)
2174 if (snd_BUG_ON(!chip || !chip->pcm))
2177 card = chip->card;
2179 strscpy(card->mixername, chip->pcm->name);
2182 if (chip->hardware & WSS_HW_AD1848_MASK)
2185 else if (chip->hardware == WSS_HW_OPTI93X)
2191 chip));