Lines Matching refs:s
84 * @s: the AMDTP stream to initialize
92 int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
101 s->protocol = kzalloc(protocol_size, GFP_KERNEL);
102 if (!s->protocol)
105 s->unit = unit;
106 s->direction = dir;
107 s->flags = flags;
108 s->context = ERR_PTR(-1);
109 mutex_init(&s->mutex);
110 INIT_WORK(&s->period_work, pcm_period_work);
111 s->packet_index = 0;
113 init_waitqueue_head(&s->ready_wait);
115 s->fmt = fmt;
116 s->process_ctx_payloads = process_ctx_payloads;
124 * @s: the AMDTP stream to destroy
126 void amdtp_stream_destroy(struct amdtp_stream *s)
129 if (s->protocol == NULL)
132 WARN_ON(amdtp_stream_running(s));
133 kfree(s->protocol);
134 mutex_destroy(&s->mutex);
163 struct snd_interval *s = hw_param_interval(params, rule->var);
178 t.min = roundup(s->min, step);
179 t.max = rounddown(s->max, step);
182 return snd_interval_refine(s, &t);
187 * @s: the AMDTP stream, which must be initialized.
190 int amdtp_stream_add_pcm_hw_constraints(struct amdtp_stream *s,
223 if (!(s->flags & CIP_NO_HEADER))
249 if (!(s->flags & CIP_BLOCKING))
255 * depending on its sampling rate. For accurate period interrupt, it's
277 * @s: the AMDTP stream to configure
286 int amdtp_stream_set_parameters(struct amdtp_stream *s, unsigned int rate,
298 s->sfc = sfc;
299 s->data_block_quadlets = data_block_quadlets;
300 s->syt_interval = amdtp_syt_intervals[sfc];
303 s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
306 if (s->flags & CIP_BLOCKING)
307 s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate;
309 s->pcm_frame_multiplier = pcm_frame_multiplier;
316 static int amdtp_stream_get_max_ctx_payload_size(struct amdtp_stream *s)
320 if (s->flags & CIP_JUMBO_PAYLOAD)
325 return s->syt_interval * s->data_block_quadlets * sizeof(__be32) * multiplier;
329 * amdtp_stream_get_max_payload - get the stream's packet size
330 * @s: the AMDTP stream
335 unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
339 if (!(s->flags & CIP_NO_HEADER))
344 return cip_header_size + amdtp_stream_get_max_ctx_payload_size(s);
350 * @s: the AMDTP stream
352 * This function should be called from the PCM device's .prepare callback.
354 void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
356 cancel_work_sync(&s->period_work);
357 s->pcm_buffer_pointer = 0;
358 s->pcm_period_pointer = 0;
362 #define prev_packet_desc(s, desc) \
363 list_prev_entry_circular(desc, &s->packet_descs_list, link)
365 static void pool_blocking_data_blocks(struct amdtp_stream *s, struct seq_desc *descs,
368 const unsigned int syt_interval = s->syt_interval;
383 static void pool_ideal_nonblocking_data_blocks(struct amdtp_stream *s, struct seq_desc *descs,
387 const enum cip_sfc sfc = s->sfc;
388 unsigned int state = s->ctx_data.rx.data_block_state;
406 * device's buffer).
422 s->ctx_data.rx.data_block_state = state;
464 static void pool_ideal_syt_offsets(struct amdtp_stream *s, struct seq_desc *descs,
467 const enum cip_sfc sfc = s->sfc;
468 unsigned int last = s->ctx_data.rx.last_syt_offset;
469 unsigned int state = s->ctx_data.rx.syt_offset_state;
480 s->ctx_data.rx.last_syt_offset = last;
481 s->ctx_data.rx.syt_offset_state = state;
509 static unsigned int calculate_cached_cycle_count(struct amdtp_stream *s, unsigned int head)
511 const unsigned int cache_size = s->ctx_data.tx.cache.size;
512 unsigned int cycles = s->ctx_data.tx.cache.pos;
521 static void cache_seq(struct amdtp_stream *s, const struct pkt_desc *src, unsigned int desc_count)
523 const unsigned int transfer_delay = s->transfer_delay;
524 const unsigned int cache_size = s->ctx_data.tx.cache.size;
525 struct seq_desc *cache = s->ctx_data.tx.cache.descs;
526 unsigned int cache_pos = s->ctx_data.tx.cache.pos;
527 bool aware_syt = !(s->flags & CIP_UNAWARE_SYT);
540 src = amdtp_stream_next_packet_desc(s, src);
543 s->ctx_data.tx.cache.pos = cache_pos;
546 static void pool_ideal_seq_descs(struct amdtp_stream *s, struct seq_desc *descs, unsigned int size,
549 pool_ideal_syt_offsets(s, descs, size, pos, count);
551 if (s->flags & CIP_BLOCKING)
552 pool_blocking_data_blocks(s, descs, size, pos, count);
554 pool_ideal_nonblocking_data_blocks(s, descs, size, pos, count);
557 static void pool_replayed_seq(struct amdtp_stream *s, struct seq_desc *descs, unsigned int size,
560 struct amdtp_stream *target = s->ctx_data.rx.replay_target;
563 unsigned int cache_pos = s->ctx_data.rx.cache_pos;
572 s->ctx_data.rx.cache_pos = cache_pos;
575 static void pool_seq_descs(struct amdtp_stream *s, struct seq_desc *descs, unsigned int size,
578 struct amdtp_domain *d = s->domain;
579 void (*pool_seq_descs)(struct amdtp_stream *s, struct seq_desc *descs, unsigned int size,
582 if (!d->replay.enable || !s->ctx_data.rx.replay_target) {
588 struct amdtp_stream *tx = s->ctx_data.rx.replay_target;
590 const unsigned int cache_pos = s->ctx_data.rx.cache_pos;
600 pool_seq_descs(s, descs, size, pos, count);
603 static void update_pcm_pointers(struct amdtp_stream *s,
609 ptr = s->pcm_buffer_pointer + frames;
612 WRITE_ONCE(s->pcm_buffer_pointer, ptr);
614 s->pcm_period_pointer += frames;
615 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
616 s->pcm_period_pointer -= pcm->runtime->period_size;
638 queue_work(system_highpri_wq, &s->period_work);
644 struct amdtp_stream *s = container_of(work, struct amdtp_stream,
646 struct snd_pcm_substream *pcm = READ_ONCE(s->pcm);
652 static int queue_packet(struct amdtp_stream *s, struct fw_iso_packet *params,
658 params->tag = s->tag;
661 err = fw_iso_context_queue(s->context, params, &s->buffer.iso_buffer,
662 s->buffer.packets[s->packet_index].offset);
664 dev_err(&s->unit->device, "queueing error: %d\n", err);
668 if (++s->packet_index >= s->queue_size)
669 s->packet_index = 0;
674 static inline int queue_out_packet(struct amdtp_stream *s,
679 return queue_packet(s, params, sched_irq);
682 static inline int queue_in_packet(struct amdtp_stream *s,
686 params->header_length = s->ctx_data.tx.ctx_header_size;
687 params->payload_length = s->ctx_data.tx.max_ctx_payload_length;
689 return queue_packet(s, params, false);
692 static void generate_cip_header(struct amdtp_stream *s, __be32 cip_header[2],
695 cip_header[0] = cpu_to_be32(READ_ONCE(s->source_node_id_field) |
696 (s->data_block_quadlets << CIP_DBS_SHIFT) |
697 ((s->sph << CIP_SPH_SHIFT) & CIP_SPH_MASK) |
700 ((s->fmt << CIP_FMT_SHIFT) & CIP_FMT_MASK) |
701 ((s->ctx_data.rx.fdf << CIP_FDF_SHIFT) & CIP_FDF_MASK) |
705 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle,
714 payload_length = data_blocks * sizeof(__be32) * s->data_block_quadlets;
719 generate_cip_header(s, cip_header, data_block_counter, syt);
725 trace_amdtp_packet(s, cycle, cip_header, payload_length + header_length, data_blocks,
726 data_block_counter, s->packet_index, index, curr_cycle_time);
729 static int check_cip_header(struct amdtp_stream *s, const __be32 *buf,
750 (!(s->flags & CIP_HEADER_WITHOUT_EOH))) {
751 dev_info_ratelimited(&s->unit->device,
760 if (sph != s->sph || fmt != s->fmt) {
761 dev_info_ratelimited(&s->unit->device,
776 dev_err(&s->unit->device,
781 if (s->flags & CIP_WRONG_DBS)
782 data_block_quadlets = s->data_block_quadlets;
789 if (*data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
793 if ((dbc == 0x00 && (s->flags & CIP_SKIP_DBC_ZERO_CHECK)) ||
796 } else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
801 if (!(s->flags & CIP_DBC_IS_PAYLOAD_QUADLETS)) {
802 if (*data_blocks > 0 && s->ctx_data.tx.dbc_interval > 0)
803 dbc_interval = s->ctx_data.tx.dbc_interval;
814 dev_err(&s->unit->device,
822 if (!(s->flags & CIP_UNAWARE_SYT))
828 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle,
841 if (!(s->flags & CIP_NO_HEADER))
846 if (payload_length > cip_header_size + s->ctx_data.tx.max_ctx_payload_length) {
847 dev_err(&s->unit->device,
849 payload_length, cip_header_size + s->ctx_data.tx.max_ctx_payload_length);
858 err = check_cip_header(s, cip_header, payload_length - cip_header_size,
870 *data_blocks = payload_length / sizeof(__be32) / s->data_block_quadlets;
877 trace_amdtp_packet(s, cycle, cip_header, payload_length, *data_blocks,
925 // to kip isochronous cycle, therefore it's OK to just increment the cycle by
934 static int generate_tx_packet_descs(struct amdtp_stream *s, struct pkt_desc *desc,
938 unsigned int next_cycle = s->next_cycle;
939 unsigned int dbc = s->data_block_counter;
940 unsigned int packet_index = s->packet_index;
941 unsigned int queue_size = s->queue_size;
947 (void)fw_card_read_cycle_time(fw_parent_device(s->unit)->card, &curr_cycle_time);
959 if (s->flags & CIP_NO_HEADER) {
974 desc = amdtp_stream_next_packet_desc(s, desc);
977 } else if (s->flags & CIP_JUMBO_PAYLOAD) {
986 dev_err(&s->unit->device, "Detect discontinuity of cycle: %d %d\n",
992 err = parse_ir_ctx_header(s, cycle, ctx_header, &data_blocks, &dbc, &syt,
1001 desc->ctx_payload = s->buffer.packets[packet_index].buffer;
1003 if (!(s->flags & CIP_DBC_IS_END_EVENT))
1007 desc = amdtp_stream_next_packet_desc(s, desc);
1009 ctx_header += s->ctx_data.tx.ctx_header_size / sizeof(*ctx_header);
1013 s->next_cycle = next_cycle;
1014 s->data_block_counter = dbc;
1030 static void generate_rx_packet_descs(struct amdtp_stream *s, struct pkt_desc *desc,
1033 struct seq_desc *seq_descs = s->ctx_data.rx.seq.descs;
1034 unsigned int seq_size = s->ctx_data.rx.seq.size;
1035 unsigned int seq_pos = s->ctx_data.rx.seq.pos;
1036 unsigned int dbc = s->data_block_counter;
1037 bool aware_syt = !(s->flags & CIP_UNAWARE_SYT);
1040 pool_seq_descs(s, seq_descs, seq_size, seq_pos, packet_count);
1043 unsigned int index = (s->packet_index + i) % s->queue_size;
1046 desc->cycle = compute_ohci_it_cycle(*ctx_header, s->queue_size);
1049 desc->syt = compute_syt(seq->syt_offset, desc->cycle, s->transfer_delay);
1055 if (s->flags & CIP_DBC_IS_END_EVENT)
1060 if (!(s->flags & CIP_DBC_IS_END_EVENT))
1063 desc->ctx_payload = s->buffer.packets[index].buffer;
1066 desc = amdtp_stream_next_packet_desc(s, desc);
1071 s->data_block_counter = dbc;
1072 s->ctx_data.rx.seq.pos = seq_pos;
1075 static inline void cancel_stream(struct amdtp_stream *s)
1079 s->packet_index = -1;
1085 if (work && work != &s->period_work)
1086 amdtp_stream_pcm_abort(s);
1087 WRITE_ONCE(s->pcm_buffer_pointer, SNDRV_PCM_POS_XRUN);
1090 static snd_pcm_sframes_t compute_pcm_extra_delay(struct amdtp_stream *s,
1105 desc = amdtp_stream_next_packet_desc(s, desc);
1108 err = fw_card_read_cycle_time(fw_parent_device(s->unit)->card, &cycle_time);
1116 if (s->direction == AMDTP_IN_STREAM) {
1127 desc = amdtp_stream_next_packet_desc(s, desc);
1140 desc = prev_packet_desc(s, desc);
1144 return data_block_count * s->pcm_frame_multiplier;
1147 static void process_ctx_payloads(struct amdtp_stream *s,
1154 pcm = READ_ONCE(s->pcm);
1155 s->process_ctx_payloads(s, desc, count, pcm);
1160 pcm->runtime->delay = compute_pcm_extra_delay(s, desc, count);
1164 desc = amdtp_stream_next_packet_desc(s, desc);
1167 update_pcm_pointers(s, pcm, data_block_count * s->pcm_frame_multiplier);
1174 struct amdtp_stream *s = private_data;
1175 const struct amdtp_domain *d = s->domain;
1178 unsigned int event_count = s->ctx_data.rx.event_count;
1179 struct pkt_desc *desc = s->packet_descs_cursor;
1186 if (s->packet_index < 0)
1192 generate_rx_packet_descs(s, desc, ctx_header, packets);
1194 process_ctx_payloads(s, desc, packets);
1196 if (!(s->flags & CIP_NO_HEADER))
1201 if (s == d->irq_target) {
1205 struct snd_pcm_substream *pcm = READ_ONCE(s->pcm);
1212 (void)fw_card_read_cycle_time(fw_parent_device(s->unit)->card, &curr_cycle_time);
1218 build_it_pkt_header(s, desc->cycle, template, pkt_header_length,
1222 if (s == s->domain->irq_target) {
1230 if (queue_out_packet(s, template, sched_irq) < 0) {
1231 cancel_stream(s);
1235 desc = amdtp_stream_next_packet_desc(s, desc);
1238 s->ctx_data.rx.event_count = event_count;
1239 s->packet_descs_cursor = desc;
1245 struct amdtp_stream *s = private_data;
1246 struct amdtp_domain *d = s->domain;
1252 if (s->packet_index < 0)
1257 cycle = compute_ohci_it_cycle(ctx_header[packets - 1], s->queue_size);
1258 s->next_cycle = increment_ohci_cycle_count(cycle, 1);
1265 bool sched_irq = (s == d->irq_target && i == packets - 1);
1267 if (queue_out_packet(s, ¶ms, sched_irq) < 0) {
1268 cancel_stream(s);
1280 struct amdtp_stream *s = private_data;
1281 struct amdtp_domain *d = s->domain;
1283 const unsigned int queue_size = s->queue_size;
1287 if (s->packet_index < 0)
1306 if (amdtp_streaming_error(s))
1314 s->ready_processing = true;
1315 wake_up(&s->ready_wait);
1318 s->ctx_data.rx.cache_pos = 0;
1321 if (amdtp_streaming_error(s))
1324 if (s == d->irq_target)
1325 s->context->callback.sc = irq_target_callback;
1327 s->context->callback.sc = process_rx_packets;
1334 struct amdtp_stream *s = private_data;
1336 struct pkt_desc *desc = s->packet_descs_cursor;
1342 if (s->packet_index < 0)
1346 packet_count = header_length / s->ctx_data.tx.ctx_header_size;
1349 err = generate_tx_packet_descs(s, desc, ctx_header, packet_count, &desc_count);
1352 cancel_stream(s);
1356 struct amdtp_domain *d = s->domain;
1358 process_ctx_payloads(s, desc, desc_count);
1361 cache_seq(s, desc, desc_count);
1364 desc = amdtp_stream_next_packet_desc(s, desc);
1365 s->packet_descs_cursor = desc;
1371 if (queue_in_packet(s, ¶ms) < 0) {
1372 cancel_stream(s);
1381 struct amdtp_stream *s = private_data;
1387 if (s->packet_index < 0)
1390 packets = header_length / s->ctx_data.tx.ctx_header_size;
1392 ctx_header += (packets - 1) * s->ctx_data.tx.ctx_header_size / sizeof(*ctx_header);
1394 s->next_cycle = increment_ohci_cycle_count(cycle, 1);
1399 if (queue_in_packet(s, ¶ms) < 0) {
1400 cancel_stream(s);
1409 struct amdtp_stream *s = private_data;
1410 struct amdtp_domain *d = s->domain;
1415 if (s->packet_index < 0)
1418 packets = header_length / s->ctx_data.tx.ctx_header_size;
1428 ctx_header += s->ctx_data.tx.ctx_header_size / sizeof(__be32);
1435 size_t length = s->ctx_data.tx.ctx_header_size * offset;
1437 drop_tx_packets(context, tstamp, length, ctx_header, s);
1438 if (amdtp_streaming_error(s))
1446 s->ready_processing = true;
1447 wake_up(&s->ready_wait);
1449 process_tx_packets(context, tstamp, header_length, ctx_header, s);
1450 if (amdtp_streaming_error(s))
1460 struct amdtp_stream *s = private_data;
1461 struct amdtp_domain *d = s->domain;
1467 if (s->packet_index < 0)
1470 count = header_length / s->ctx_data.tx.ctx_header_size;
1480 if (s->flags & CIP_NO_HEADER) {
1481 data_blocks = payload_quads / s->data_block_quadlets;
1490 if (s->flags & CIP_UNAWARE_SYT) {
1491 data_blocks = payload_quads / s->data_block_quadlets;
1500 data_blocks = payload_quads / s->data_block_quadlets;
1507 ctx_header += s->ctx_data.tx.ctx_header_size / sizeof(__be32);
1510 drop_tx_packets(context, tstamp, header_length, header, s);
1513 s->ctx_data.tx.event_starts = true;
1521 list_for_each_entry(s, &d->streams, list) {
1522 if (s->direction == AMDTP_IN_STREAM) {
1524 if (s->ctx_data.tx.event_starts)
1532 list_for_each_entry(s, &d->streams, list) {
1533 if (s->direction != AMDTP_IN_STREAM)
1536 next_cycle = increment_ohci_cycle_count(s->next_cycle,
1542 s->context->callback.sc = process_tx_packets_intermediately;
1552 struct amdtp_stream *s;
1554 list_for_each_entry(s, &d->streams, list) {
1555 if (s != d->irq_target && amdtp_stream_running(s))
1556 fw_iso_context_flush_completions(s->context);
1558 if (amdtp_streaming_error(s))
1567 list_for_each_entry(s, &d->streams, list) {
1568 if (amdtp_stream_running(s))
1569 cancel_stream(s);
1576 struct amdtp_stream *s = private_data;
1577 struct amdtp_domain *d = s->domain;
1586 struct amdtp_stream *s = private_data;
1587 struct amdtp_domain *d = s->domain;
1596 struct amdtp_stream *s = private_data;
1597 struct amdtp_domain *d = s->domain;
1630 unsigned int cycle = s->next_cycle;
1631 list_for_each_entry(s, &d->streams, list) {
1632 if (s->direction != AMDTP_OUT_STREAM)
1635 if (compare_ohci_cycle_count(s->next_cycle, cycle) > 0)
1636 cycle = s->next_cycle;
1638 if (s == d->irq_target)
1639 s->context->callback.sc = irq_target_callback_intermediately;
1641 s->context->callback.sc = process_rx_packets_intermediately;
1654 struct amdtp_stream *s = private_data;
1655 struct amdtp_domain *d = s->domain;
1657 if (s->direction == AMDTP_IN_STREAM) {
1660 if (s == d->irq_target)
1666 context->callback.sc(context, tstamp, header_length, header, s);
1671 * @s: the AMDTP stream to start
1681 static int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed,
1684 bool is_irq_target = (s == s->domain->irq_target);
1691 mutex_lock(&s->mutex);
1693 if (WARN_ON(amdtp_stream_running(s) ||
1694 (s->data_block_quadlets < 1))) {
1699 if (s->direction == AMDTP_IN_STREAM) {
1706 s->data_block_counter = UINT_MAX;
1708 s->data_block_counter = 0;
1712 if (s->direction == AMDTP_IN_STREAM) {
1715 if (!(s->flags & CIP_NO_HEADER))
1724 max_ctx_payload_size = amdtp_stream_get_max_ctx_payload_size(s);
1726 err = iso_packets_buffer_init(&s->buffer, s->unit, queue_size, max_ctx_payload_size, dir);
1729 s->queue_size = queue_size;
1731 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
1733 amdtp_stream_first_callback, s);
1734 if (IS_ERR(s->context)) {
1735 err = PTR_ERR(s->context);
1737 dev_err(&s->unit->device,
1742 amdtp_stream_update(s);
1744 if (s->direction == AMDTP_IN_STREAM) {
1745 s->ctx_data.tx.max_ctx_payload_length = max_ctx_payload_size;
1746 s->ctx_data.tx.ctx_header_size = ctx_header_size;
1747 s->ctx_data.tx.event_starts = false;
1749 if (s->domain->replay.enable) {
1750 // struct fw_iso_context.drop_overflow_headers is false therefore it's
1752 s->ctx_data.tx.cache.size = max_t(unsigned int, s->syt_interval * 2,
1754 s->ctx_data.tx.cache.pos = 0;
1755 s->ctx_data.tx.cache.descs = kcalloc(s->ctx_data.tx.cache.size,
1756 sizeof(*s->ctx_data.tx.cache.descs), GFP_KERNEL);
1757 if (!s->ctx_data.tx.cache.descs) {
1776 s->ctx_data.rx.seq.descs = kcalloc(queue_size, sizeof(*s->ctx_data.rx.seq.descs), GFP_KERNEL);
1777 if (!s->ctx_data.rx.seq.descs) {
1781 s->ctx_data.rx.seq.size = queue_size;
1782 s->ctx_data.rx.seq.pos = 0;
1784 entry = &initial_state[s->sfc];
1785 s->ctx_data.rx.data_block_state = entry->data_block;
1786 s->ctx_data.rx.syt_offset_state = entry->syt_offset;
1787 s->ctx_data.rx.last_syt_offset = TICKS_PER_CYCLE;
1789 s->ctx_data.rx.event_count = 0;
1792 if (s->flags & CIP_NO_HEADER)
1793 s->tag = TAG_NO_CIP_HEADER;
1795 s->tag = TAG_CIP;
1801 descs = kcalloc(s->queue_size + 8, sizeof(*descs), GFP_KERNEL);
1806 s->packet_descs = descs;
1808 INIT_LIST_HEAD(&s->packet_descs_list);
1809 for (i = 0; i < s->queue_size; ++i) {
1811 list_add_tail(&descs->link, &s->packet_descs_list);
1814 s->packet_descs_cursor = list_first_entry(&s->packet_descs_list, struct pkt_desc, link);
1816 s->packet_index = 0;
1820 if (s->direction == AMDTP_IN_STREAM) {
1821 err = queue_in_packet(s, ¶ms);
1829 sched_irq = !((s->packet_index + 1) %
1833 err = queue_out_packet(s, ¶ms, sched_irq);
1837 } while (s->packet_index > 0);
1841 if ((s->flags & CIP_EMPTY_WITH_TAG0) || (s->flags & CIP_NO_HEADER))
1844 s->ready_processing = false;
1845 err = fw_iso_context_start(s->context, -1, 0, tag);
1849 mutex_unlock(&s->mutex);
1853 kfree(s->packet_descs);
1854 s->packet_descs = NULL;
1856 if (s->direction == AMDTP_OUT_STREAM) {
1857 kfree(s->ctx_data.rx.seq.descs);
1859 if (s->domain->replay.enable)
1860 kfree(s->ctx_data.tx.cache.descs);
1862 fw_iso_context_destroy(s->context);
1863 s->context = ERR_PTR(-1);
1865 iso_packets_buffer_destroy(&s->buffer, s->unit);
1867 mutex_unlock(&s->mutex);
1875 * @s: the AMDTP stream that transports the PCM data
1880 struct amdtp_stream *s)
1888 if (current_work() != &s->period_work)
1892 return READ_ONCE(s->pcm_buffer_pointer);
1899 * @s: the AMDTP stream that transfers the PCM frames
1903 int amdtp_domain_stream_pcm_ack(struct amdtp_domain *d, struct amdtp_stream *s)
1918 * @s: the AMDTP stream
1920 void amdtp_stream_update(struct amdtp_stream *s)
1923 WRITE_ONCE(s->source_node_id_field,
1924 (fw_parent_device(s->unit)->card->node_id << CIP_SID_SHIFT) & CIP_SID_MASK);
1930 * @s: the AMDTP stream to stop
1935 static void amdtp_stream_stop(struct amdtp_stream *s)
1937 mutex_lock(&s->mutex);
1939 if (!amdtp_stream_running(s)) {
1940 mutex_unlock(&s->mutex);
1944 cancel_work_sync(&s->period_work);
1945 fw_iso_context_stop(s->context);
1946 fw_iso_context_destroy(s->context);
1947 s->context = ERR_PTR(-1);
1948 iso_packets_buffer_destroy(&s->buffer, s->unit);
1949 kfree(s->packet_descs);
1950 s->packet_descs = NULL;
1952 if (s->direction == AMDTP_OUT_STREAM) {
1953 kfree(s->ctx_data.rx.seq.descs);
1955 if (s->domain->replay.enable)
1956 kfree(s->ctx_data.tx.cache.descs);
1959 mutex_unlock(&s->mutex);
1964 * @s: the AMDTP stream about to be stopped
1969 void amdtp_stream_pcm_abort(struct amdtp_stream *s)
1973 pcm = READ_ONCE(s->pcm);
2007 * @s: the AMDTP stream.
2011 int amdtp_domain_add_stream(struct amdtp_domain *d, struct amdtp_stream *s,
2017 if (s == tmp)
2021 list_add(&s->list, &d->streams);
2023 s->channel = channel;
2024 s->speed = speed;
2025 s->domain = d;
2043 struct amdtp_stream *s;
2045 list_for_each_entry(s, &d->streams, list) {
2046 if (s->direction == AMDTP_IN_STREAM) {
2048 tx = s;
2057 list_for_each_entry(s, &d->streams, list) {
2058 if (s->direction == AMDTP_IN_STREAM) {
2059 tx = s;
2093 struct amdtp_stream *s;
2106 list_for_each_entry(s, &d->streams, list) {
2107 if (s->direction == AMDTP_OUT_STREAM) {
2114 d->irq_target = s;
2129 list_for_each_entry(s, &d->streams, list) {
2132 if (s->direction == AMDTP_OUT_STREAM && s == d->irq_target) {
2138 err = amdtp_stream_start(s, s->channel, s->speed, queue_size, idle_irq_interval);
2145 list_for_each_entry(s, &d->streams, list)
2146 amdtp_stream_stop(s);
2157 struct amdtp_stream *s, *next;
2162 list_for_each_entry_safe(s, next, &d->streams, list) {
2163 list_del(&s->list);
2165 if (s != d->irq_target)
2166 amdtp_stream_stop(s);