Lines Matching refs:drvdata
29 static void gxp_wdt_enable_reload(struct gxp_wdt *drvdata)
33 val = readb(drvdata->base + GXP_WDT_CTRL_OFS);
35 writeb(val, drvdata->base + GXP_WDT_CTRL_OFS);
40 struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
42 writew(SECS_TO_WDOG_TICKS(wdd->timeout), drvdata->base + GXP_WDT_CNT_OFS);
43 gxp_wdt_enable_reload(drvdata);
49 struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
52 val = readb_relaxed(drvdata->base + GXP_WDT_CTRL_OFS);
54 writeb(val, drvdata->base + GXP_WDT_CTRL_OFS);
61 struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
66 writew(actual, drvdata->base + GXP_WDT_CNT_OFS);
73 struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
74 u32 val = readw(drvdata->base + GXP_WDT_CNT_OFS);
81 struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
83 gxp_wdt_enable_reload(drvdata);
90 struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
92 writew(1, drvdata->base + GXP_WDT_CNT_OFS);
93 gxp_wdt_enable_reload(drvdata);
116 struct gxp_wdt *drvdata;
120 drvdata = devm_kzalloc(dev, sizeof(struct gxp_wdt), GFP_KERNEL);
121 if (!drvdata)
134 drvdata->base = (void __iomem *)dev->platform_data;
136 drvdata->wdd.info = &gxp_wdt_info;
137 drvdata->wdd.ops = &gxp_wdt_ops;
138 drvdata->wdd.max_hw_heartbeat_ms = WDT_MAX_TIMEOUT_MS;
139 drvdata->wdd.parent = dev;
140 drvdata->wdd.timeout = WDT_DEFAULT_TIMEOUT;
142 watchdog_set_drvdata(&drvdata->wdd, drvdata);
143 watchdog_set_nowayout(&drvdata->wdd, WATCHDOG_NOWAYOUT);
145 val = readb(drvdata->base + GXP_WDT_CTRL_OFS);
148 set_bit(WDOG_HW_RUNNING, &drvdata->wdd.status);
150 watchdog_set_restart_priority(&drvdata->wdd, 128);
152 watchdog_stop_on_reboot(&drvdata->wdd);
153 err = devm_watchdog_register_device(dev, &drvdata->wdd);