fbdev/via/accel.c

19 	gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;
35 	return 0;
44 	u32 ge_cmd = 0, tmp, i;
54 			ge_cmd |= 0x00008000;
59 			ge_cmd |= 0x00004000;
67 		case 0x00: /* blackness */
68 		case 0x5A: /* pattern inversion */
69 		case 0xF0: /* pattern copy */
70 		case 0xFF: /* whiteness */
84 		if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)
85 			|| src_y & 0xFFFFF000) {
91 		writel(tmp, engine + 0x08);
94 	if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {
100 	writel(tmp, engine + 0x0C);
102 	if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {
108 	writel(tmp, engine + 0x10);
111 		writel(fg_color, engine + 0x18);
114 		writel(bg_color, engine + 0x1C);
117 		tmp = src_mem ? 0 : src_addr;
118 		if (tmp & 0xE0000007) {
124 		writel(tmp, engine + 0x30);
127 	if (dst_addr & 0xE0000007) {
133 	writel(tmp, engine + 0x34);
136 		tmp = 0;
139 	if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {
145 	writel(tmp, engine + 0x38);
148 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;
150 		ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */
152 			ge_cmd |= 0x00000040;
154 			ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;
156 			ge_cmd |= 0x00000001;
161 		return 0;
166 	for (i = 0; i < tmp; i++)
169 	return 0;
177 	u32 ge_cmd = 0, tmp, i;
187 			ge_cmd |= 0x00008000;
192 			ge_cmd |= 0x00004000;
200 		case 0x00: /* blackness */
201 		case 0x5A: /* pattern inversion */
202 		case 0xF0: /* pattern copy */
203 		case 0xFF: /* whiteness */
217 		tmp = 0;
220 	if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {
226 	writel(tmp, engine + 0x08);
228 	if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {
234 	writel(tmp, engine + 0x0C);
236 	if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {
242 	writel(tmp, engine + 0x10);
244 	if (dst_addr & 0xE0000007) {
250 	writel(tmp, engine + 0x14);
253 		if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)
254 			|| src_y & 0xFFFFF000) {
260 		writel(tmp, engine + 0x18);
262 		tmp = src_mem ? 0 : src_addr;
263 		if (tmp & 0xE0000007) {
269 		writel(tmp, engine + 0x1C);
273 		writel(fg_color, engine + 0x58);
275 		writel(fg_color, engine + 0x4C);
276 		writel(bg_color, engine + 0x50);
280 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;
282 		ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */
284 			ge_cmd |= 0x00000040;
286 			ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;
288 			ge_cmd |= 0x00000001;
293 		return 0;
298 	for (i = 0; i < tmp; i++)
301 	return 0;
364 	return 0;
377 		highest_reg = 0x5c;
380 		highest_reg = 0x40;
383 	for (i = 0; i <= highest_reg; i += 4)
384 		writel(0x0, engine + i);
393 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);
394 		writel(0x680A0000, engine + VIA_REG_CR_TRANSPACE);
395 		writel(0x02000000, engine + VIA_REG_CR_TRANSPACE);
399 		writel(0x00100000, engine + VIA_REG_TRANSET);
400 		writel(0x00000000, engine + VIA_REG_TRANSPACE);
401 		writel(0x00333004, engine + VIA_REG_TRANSPACE);
402 		writel(0x60000000, engine + VIA_REG_TRANSPACE);
403 		writel(0x61000000, engine + VIA_REG_TRANSPACE);
404 		writel(0x62000000, engine + VIA_REG_TRANSPACE);
405 		writel(0x63000000, engine + VIA_REG_TRANSPACE);
406 		writel(0x64000000, engine + VIA_REG_TRANSPACE);
407 		writel(0x7D000000, engine + VIA_REG_TRANSPACE);
409 		writel(0xFE020000, engine + VIA_REG_TRANSET);
410 		writel(0x00000000, engine + VIA_REG_TRANSPACE);
418 	vq_start_low = 0x50000000 | (vq_start_addr & 0xFFFFFF);
419 	vq_end_low = 0x51000000 | (vq_end_addr & 0xFFFFFF);
420 	vq_high = 0x52000000 | ((vq_start_addr & 0xFF000000) >> 24) |
421 		((vq_end_addr & 0xFF000000) >> 16);
422 	vq_len = 0x53000000 | (VQ_SIZE >> 3);
430 		vq_start_low |= 0x20000000;
431 		vq_end_low |= 0x20000000;
432 		vq_high |= 0x20000000;
433 		vq_len |= 0x20000000;
435 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);
440 		writel(0x74301001, engine + VIA_REG_CR_TRANSPACE);
441 		writel(0x00000000, engine + VIA_REG_CR_TRANSPACE);
444 		writel(0x00FE0000, engine + VIA_REG_TRANSET);
445 		writel(0x080003FE, engine + VIA_REG_TRANSPACE);
446 		writel(0x0A00027C, engine + VIA_REG_TRANSPACE);
447 		writel(0x0B000260, engine + VIA_REG_TRANSPACE);
448 		writel(0x0C000274, engine + VIA_REG_TRANSPACE);
449 		writel(0x0D000264, engine + VIA_REG_TRANSPACE);
450 		writel(0x0E000000, engine + VIA_REG_TRANSPACE);
451 		writel(0x0F000020, engine + VIA_REG_TRANSPACE);
452 		writel(0x1000027E, engine + VIA_REG_TRANSPACE);
453 		writel(0x110002FE, engine + VIA_REG_TRANSPACE);
454 		writel(0x200F0060, engine + VIA_REG_TRANSPACE);
456 		writel(0x00000006, engine + VIA_REG_TRANSPACE);
457 		writel(0x40008C0F, engine + VIA_REG_TRANSPACE);
458 		writel(0x44000000, engine + VIA_REG_TRANSPACE);
459 		writel(0x45080C04, engine + VIA_REG_TRANSPACE);
460 		writel(0x46800408, engine + VIA_REG_TRANSPACE);
471 	writel(0x0, engine + VIA_REG_CURSOR_POS);
472 	writel(0x0, engine + VIA_REG_CURSOR_ORG);
473 	writel(0x0, engine + VIA_REG_CURSOR_BG);
474 	writel(0x0, engine + VIA_REG_CURSOR_FG);
486 		temp |= 0x1;
489 		temp &= 0xFFFFFFFE;
494 		temp |= 0x80000000;
498 		temp &= 0x7FFFFFFF;
506 	int loop = 0;