fbdev/riva/riva_hw.c

617     nv3_sim_state sim_data;
623     sim_data.pix_bpp        = (char)pixelDepth;
624     sim_data.enable_video   = 0;
625     sim_data.enable_mp      = 0;
626     sim_data.video_scale    = 1;
627     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?
629     sim_data.memory_width   = 128;
631     sim_data.mem_latency    = 9;
632     sim_data.mem_aligned    = 1;
633     sim_data.mem_page_miss  = 11;
634     sim_data.gr_during_vid  = 0;
635     sim_data.pclk_khz       = VClk;
636     sim_data.mclk_khz       = MClk;
637     nv3CalcArbitration(&fifo_data, &sim_data);
801     nv4_sim_state sim_data;
811     sim_data.pix_bpp        = (char)pixelDepth;
812     sim_data.enable_video   = 0;
813     sim_data.enable_mp      = 0;
814     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?
816     sim_data.mem_latency    = (char)cfg1 & 0x0F;
817     sim_data.mem_aligned    = 1;
818     sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));
819     sim_data.gr_during_vid  = 0;
820     sim_data.pclk_khz       = VClk;
821     sim_data.mclk_khz       = MClk;
822     sim_data.nvclk_khz      = NVClk;
823     nv4CalcArbitration(&fifo_data, &sim_data);
1050     nv10_sim_state sim_data;
1060     sim_data.pix_bpp        = (char)pixelDepth;
1061     sim_data.enable_video   = 0;
1062     sim_data.enable_mp      = 0;
1063     sim_data.memory_type    = (NV_RD32(&chip->PFB[0x00000200/4], 0) & 0x01) ?
1065     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?
1067     sim_data.mem_latency    = (char)cfg1 & 0x0F;
1068     sim_data.mem_aligned    = 1;
1069     sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));
1070     sim_data.gr_during_vid  = 0;
1071     sim_data.pclk_khz       = VClk;
1072     sim_data.mclk_khz       = MClk;
1073     sim_data.nvclk_khz      = NVClk;
1074     nv10CalcArbitration(&fifo_data, &sim_data);
1096     nv10_sim_state sim_data;
1113     sim_data.pix_bpp        = (char)pixelDepth;
1114     sim_data.enable_video   = 0;
1115     sim_data.enable_mp      = 0;
1118     pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);
1120     sim_data.memory_type    = (sim_data.memory_type >> 12) & 1;
1122     sim_data.memory_width   = 64;
1123     sim_data.mem_latency    = 3;
1124     sim_data.mem_aligned    = 1;
1125     sim_data.mem_page_miss  = 10;
1126     sim_data.gr_during_vid  = 0;
1127     sim_data.pclk_khz       = VClk;
1128     sim_data.mclk_khz       = MClk;
1129     sim_data.nvclk_khz      = NVClk;
1130     nv10CalcArbitration(&fifo_data, &sim_data);