Lines Matching refs:dss
3 * linux/drivers/video/omap2/dss/dss.c
37 #include "dss.h"
96 } dss;
116 __raw_writel(val, dss.base + idx.idx);
121 return __raw_readl(dss.base + idx.idx);
125 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
127 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
141 dss.ctx_valid = true;
150 if (!dss.ctx_valid)
172 if (!dss.syscon_pll_ctrl)
192 regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,
201 if (!dss.syscon_pll_ctrl)
256 regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,
364 fclk_rate = clk_get_rate(dss.dss_clk);
420 dss.dispc_clk_source = clk_src;
448 dss.dsi_clk_source[dsi_module] = clk_src;
485 dss.lcd_clk_source[ix] = clk_src;
490 return dss.dispc_clk_source;
495 return dss.dsi_clk_source[dsi_module];
503 return dss.lcd_clk_source[ix];
507 return dss.dispc_clk_source;
523 if (dss.parent_clk == NULL) {
530 fck = clk_round_rate(dss.dss_clk, fck);
535 fckd_hw_max = dss.feat->fck_div_max;
537 m = dss.feat->dss_fck_multiplier;
538 prate = clk_get_rate(dss.parent_clk);
561 r = clk_set_rate(dss.dss_clk, rate);
565 dss.dss_clk_rate = clk_get_rate(dss.dss_clk);
567 WARN_ONCE(dss.dss_clk_rate != rate,
568 "clk rate mismatch: %lu != %lu", dss.dss_clk_rate,
576 return dss.dss_clk_rate;
588 if (dss.parent_clk == NULL) {
589 fck = clk_round_rate(dss.dss_clk, max_dss_fck);
591 prate = clk_get_rate(dss.parent_clk);
593 fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,
595 fck = DIV_ROUND_UP(prate, fck_div) * dss.feat->dss_fck_multiplier;
729 return dss.feat->dpi_select_source(port, channel);
736 clk = devm_clk_get(&dss.pdev->dev, "fck");
742 dss.dss_clk = clk;
744 if (dss.feat->parent_clk_name) {
745 clk = clk_get(NULL, dss.feat->parent_clk_name);
747 DSSERR("Failed to get %s\n", dss.feat->parent_clk_name);
754 dss.parent_clk = clk;
761 if (dss.parent_clk)
762 clk_put(dss.parent_clk);
771 r = pm_runtime_resume_and_get(&dss.pdev->dev);
783 r = pm_runtime_put_sync(&dss.pdev->dev);
927 if (dss.feat->num_ports == 0)
938 if (reg >= dss.feat->num_ports)
941 port_type = dss.feat->ports[reg];
972 if (dss.feat->num_ports == 0)
984 if (reg >= dss.feat->num_ports)
987 port_type = dss.feat->ports[reg];
1014 dss.syscon_pll_ctrl = syscon_regmap_lookup_by_phandle(np,
1016 if (IS_ERR(dss.syscon_pll_ctrl)) {
1019 return PTR_ERR(dss.syscon_pll_ctrl);
1023 &dss.syscon_pll_ctrl_offset)) {
1049 dss.video1_pll = dss_video_pll_init(pdev, 0, pll_regulator);
1050 if (IS_ERR(dss.video1_pll))
1051 return PTR_ERR(dss.video1_pll);
1055 dss.video2_pll = dss_video_pll_init(pdev, 1, pll_regulator);
1056 if (IS_ERR(dss.video2_pll)) {
1057 dss_video_pll_uninit(dss.video1_pll);
1058 return PTR_ERR(dss.video2_pll);
1073 dss.pdev = pdev;
1075 dss.feat = dss_get_features();
1076 if (!dss.feat)
1079 dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0);
1085 dss.base = devm_ioremap(&pdev->dev, dss_mem->start,
1087 if (!dss.base) {
1114 dss.dss_clk_rate = clk_get_rate(dss.dss_clk);
1126 dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;
1127 dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;
1128 dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK;
1129 dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;
1130 dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;
1142 dss_debugfs_create_file("dss", dss_dump_regs);
1155 if (dss.video1_pll)
1156 dss_video_pll_uninit(dss.video1_pll);
1158 if (dss.video2_pll)
1159 dss_video_pll_uninit(dss.video2_pll);
1174 if (dss.video1_pll)
1175 dss_video_pll_uninit(dss.video1_pll);
1177 if (dss.video2_pll)
1178 dss_video_pll_uninit(dss.video2_pll);
1199 * Otherwise dss will never get probed successfully, as it will wait
1267 { .compatible = "ti,omap2-dss", },
1268 { .compatible = "ti,omap3-dss", },
1269 { .compatible = "ti,omap4-dss", },
1270 { .compatible = "ti,omap5-dss", },
1271 { .compatible = "ti,dra7-dss", },