Lines Matching defs:dispc
3 * linux/drivers/video/omap2/dss/dispc.c
37 #include "dispc.h"
127 } dispc;
253 __raw_writel(val, dispc.base + idx);
258 return __raw_readl(dispc.base + idx);
274 spin_lock_irqsave(&dispc.control_lock, flags);
279 spin_unlock_irqrestore(&dispc.control_lock, flags);
283 dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
285 dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)])
389 dispc.ctx_valid = true;
400 if (!dispc.ctx_valid)
522 r = pm_runtime_resume_and_get(&dispc.pdev->dev);
535 r = pm_runtime_put_sync(&dispc.pdev->dev);
548 if (channel == OMAP_DSS_CHANNEL_DIGIT && dispc.feat->no_framedone_tv)
693 if (dispc.feat->has_writeback)
1021 if (dispc.feat->has_writeback)
1103 val = FLD_VAL(height - 1, dispc.feat->mgr_height_start, 16) |
1104 FLD_VAL(width - 1, dispc.feat->mgr_width_start, 0);
1121 for (fifo = 0; fifo < dispc.feat->num_fifos; ++fifo) {
1124 dispc.fifo_size[fifo] = size;
1130 dispc.fifo_assignment[fifo] = fifo;
1140 if (dispc.feat->gfx_fifo_workaround) {
1152 dispc.fifo_assignment[OMAP_DSS_GFX] = OMAP_DSS_WB;
1153 dispc.fifo_assignment[OMAP_DSS_WB] = OMAP_DSS_GFX;
1170 if (dispc.feat->has_writeback) {
1187 for (fifo = 0; fifo < dispc.feat->num_fifos; ++fifo) {
1188 if (dispc.fifo_assignment[fifo] == plane)
1189 size += dispc.fifo_size[fifo];
1228 if (dss_has_feature(FEAT_PRELOAD) && dispc.feat->set_max_preload &&
1336 if (dispc.feat->has_writeback) {
2256 *core_clk = dispc.feat->calc_core_clk(pclk, in_width,
2311 *core_clk = dispc.feat->calc_core_clk(pclk, in_width,
2406 *core_clk = dispc.feat->calc_core_clk(pclk, in_width, in_height,
2466 ret = dispc.feat->calc_scaling(pclk, lclk, mgr_timings, width, height,
2698 if (dispc.feat->last_pixel_inc_missing)
2957 return width <= dispc.feat->mgr_width_max &&
2958 height <= dispc.feat->mgr_height_max;
2964 if (hsw < 1 || hsw > dispc.feat->sw_max ||
2965 hfp < 1 || hfp > dispc.feat->hp_max ||
2966 hbp < 1 || hbp > dispc.feat->hp_max ||
2967 vsw < 1 || vsw > dispc.feat->sw_max ||
2968 vfp < 0 || vfp > dispc.feat->vp_max ||
2969 vbp < 0 || vbp > dispc.feat->vp_max)
2978 return pclk <= dispc.feat->max_lcd_pclk;
2980 return pclk <= dispc.feat->max_tv_pclk;
3018 timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) |
3019 FLD_VAL(hfp-1, dispc.feat->fp_start, 8) |
3020 FLD_VAL(hbp-1, dispc.feat->bp_start, 20);
3021 timing_v = FLD_VAL(vsw-1, dispc.feat->sw_start, 0) |
3022 FLD_VAL(vfp, dispc.feat->fp_start, 8) |
3023 FLD_VAL(vbp, dispc.feat->bp_start, 20);
3094 if (dispc.feat->supports_sync_align)
3099 if (dispc.syscon_pol) {
3114 regmap_update_bits(dispc.syscon_pol, dispc.syscon_pol_offset,
3173 dispc.core_clk_rate = dispc_fclk_rate() / lck_div;
3273 return dispc.tv_pclk_rate;
3279 dispc.tv_pclk_rate = pclk;
3284 return dispc.core_clk_rate;
3343 seq_printf(s, "dispc fclk source = %s (%s)\n",
3489 if (dispc.feat->has_writeback) {
3578 bool dispc_div_calc(unsigned long dispc,
3604 lckd_start = max(DIV_ROUND_UP(dispc, lck_max), 1ul);
3605 lckd_stop = min(dispc / pck_min, 255ul);
3608 lck = dispc / lckd;
3698 dispc.core_clk_rate = dispc_fclk_rate();
3715 if (dispc.feat->mstandby_workaround)
3860 if (!dispc.is_enabled)
3863 return dispc.user_handler(irq, dispc.user_data);
3870 if (dispc.user_handler != NULL)
3873 dispc.user_handler = handler;
3874 dispc.user_data = dev_id;
3879 r = devm_request_irq(&dispc.pdev->dev, dispc.irq, dispc_irq_handler,
3880 IRQF_SHARED, "OMAP DISPC", &dispc);
3882 dispc.user_handler = NULL;
3883 dispc.user_data = NULL;
3892 devm_free_irq(&dispc.pdev->dev, dispc.irq, &dispc);
3894 dispc.user_handler = NULL;
3895 dispc.user_data = NULL;
3908 dispc.pdev = pdev;
3910 spin_lock_init(&dispc.control_lock);
3912 dispc.feat = dispc_get_features();
3913 if (!dispc.feat)
3916 dispc_mem = platform_get_resource(dispc.pdev, IORESOURCE_MEM, 0);
3922 dispc.base = devm_ioremap(&pdev->dev, dispc_mem->start,
3924 if (!dispc.base) {
3929 dispc.irq = platform_get_irq(dispc.pdev, 0);
3930 if (dispc.irq < 0) {
3936 dispc.syscon_pol = syscon_regmap_lookup_by_phandle_args(np, "syscon-pol",
3937 1, &dispc.syscon_pol_offset);
3938 if (IS_ERR(dispc.syscon_pol)) {
3940 return PTR_ERR(dispc.syscon_pol);
3960 dss_debugfs_create_file("dispc", dispc_dump_regs);
3994 dispc.is_enabled = false;
3998 synchronize_irq(dispc.irq);
4019 dispc.is_enabled = true;
4032 { .compatible = "ti,omap2-dispc", },
4033 { .compatible = "ti,omap3-dispc", },
4034 { .compatible = "ti,omap4-dispc", },
4035 { .compatible = "ti,omap5-dispc", },
4036 { .compatible = "ti,dra7-dispc", },