Lines Matching defs:bd
392 static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) {
399 unsigned char* dst = bd->pins;
414 bd->pins_len = pins_len;
417 unsigned char* dst = bd->pins;
424 bd->pins_len = 0x40;
428 static void get_bios_version(unsigned char __iomem * vbios, struct matrox_bios* bd) {
440 bd->version.vMaj = (h >> 4) & 0xF;
441 bd->version.vMin = h & 0xF;
442 bd->version.vRev = readb(vbios + pcir_offset + 0x13);
447 bd->version.vMaj = (h >> 4) & 0xF;
448 bd->version.vMin = h & 0xF;
449 bd->version.vRev = 0;
453 static void get_bios_output(unsigned char __iomem* vbios, struct matrox_bios* bd) {
460 bd->output.state = b;
463 static void get_bios_tvout(unsigned char __iomem* vbios, struct matrox_bios* bd) {
467 bd->output.tvout = 0;
481 bd->output.tvout = 1;
490 static void parse_bios(unsigned char __iomem* vbios, struct matrox_bios* bd) {
496 bd->bios_valid = 1;
497 get_bios_version(vbios, bd);
498 get_bios_output(vbios, bd);
499 get_bios_tvout(vbios, bd);
519 get_pins(vbios + pins_offset, bd);
526 get_pins(vbios + pins_offset, bd);
532 const struct matrox_bios *bd)
536 switch (bd->pins[22]) {
541 if (get_unaligned_le16(bd->pins + 24)) {
542 maxdac = get_unaligned_le16(bd->pins + 24) * 10;
545 minfo->values.pll.system = get_unaligned_le16(bd->pins + 28) ?
546 get_unaligned_le16(bd->pins + 28) * 10 : 50000;
563 const struct matrox_bios *bd)
566 minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000);
567 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
568 ((bd->pins[51] & 0x02) ? 0x00000100 : 0) |
569 ((bd->pins[51] & 0x04) ? 0x00010000 : 0) |
570 ((bd->pins[51] & 0x08) ? 0x00020000 : 0);
571 minfo->values.pll.system = (bd->pins[43] == 0xFF) ? 50000 : ((bd->pins[43] + 100) * 1000);
587 const struct matrox_bios *bd)
590 minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000);
591 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
592 0x01250A21 : get_unaligned_le32(bd->pins + 48);
594 minfo->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) |
595 ((bd->pins[57] << 22) & 0x00C00000) |
596 ((bd->pins[56] << 1) & 0x000001E0) |
597 ( bd->pins[56] & 0x0000000F);
598 minfo->values.reg.opt = (bd->pins[54] & 7) << 10;
599 minfo->values.reg.opt2 = bd->pins[58] << 12;
600 minfo->features.pll.ref_freq = (bd->pins[52] & 0x20) ? 14318 : 27000;
617 const struct matrox_bios *bd)
619 minfo->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000;
620 minfo->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 38] * 4000;
621 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71);
622 minfo->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) |
623 ((bd->pins[87] << 22) & 0x00C00000) |
624 ((bd->pins[86] << 1) & 0x000001E0) |
625 ( bd->pins[86] & 0x0000000F);
626 minfo->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) |
627 ((bd->pins[53] << 22) & 0x10000000) |
628 ((bd->pins[53] << 7) & 0x00001C00);
629 minfo->values.reg.opt3 = get_unaligned_le32(bd->pins + 67);
630 minfo->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000;
631 minfo->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000;
649 const struct matrox_bios *bd)
653 mult = bd->pins[4]?8000:6000;
655 minfo->limits.pixel.vcomax = (bd->pins[ 38] == 0xFF) ? 600000 : bd->pins[ 38] * mult;
656 minfo->limits.system.vcomax = (bd->pins[ 36] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 36] * mult;
657 minfo->limits.video.vcomax = (bd->pins[ 37] == 0xFF) ? minfo->limits.system.vcomax : bd->pins[ 37] * mult;
658 minfo->limits.pixel.vcomin = (bd->pins[123] == 0xFF) ? 256000 : bd->pins[123] * mult;
659 minfo->limits.system.vcomin = (bd->pins[121] == 0xFF) ? minfo->limits.pixel.vcomin : bd->pins[121] * mult;
660 minfo->limits.video.vcomin = (bd->pins[122] == 0xFF) ? minfo->limits.system.vcomin : bd->pins[122] * mult;
662 minfo->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000;
663 minfo->values.reg.opt = get_unaligned_le32(bd->pins + 48);
664 minfo->values.reg.opt2 = get_unaligned_le32(bd->pins + 52);
665 minfo->values.reg.opt3 = get_unaligned_le32(bd->pins + 94);
666 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 98);
667 minfo->values.reg.memmisc = get_unaligned_le32(bd->pins + 102);
668 minfo->values.reg.memrdbk = get_unaligned_le32(bd->pins + 106);
669 minfo->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000;
670 minfo->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20;
671 minfo->values.memory.dll = (bd->pins[115] & 0x02) != 0;
672 minfo->values.memory.emrswen = (bd->pins[115] & 0x01) != 0;
674 if (bd->pins[115] & 4) {
684 minfo->max_pixel_clock_panellink = bd->pins[47] * 4000;
714 const struct matrox_bios *bd)
730 if (!bd->bios_valid) {
734 if (bd->pins_len < 64) {
738 if (bd->pins[0] == 0x2E && bd->pins[1] == 0x41) {
739 pins_version = bd->pins[5];
747 if (bd->pins_len != pinslen[pins_version - 1]) {
753 return parse_pins1(minfo, bd);
755 return parse_pins2(minfo, bd);
757 return parse_pins3(minfo, bd);
759 return parse_pins4(minfo, bd);
761 return parse_pins5(minfo, bd);