usb/host/ehci-fsl.c

28 #include "ehci.h"
29 #include "ehci-fsl.h"
32 #define DRV_NAME "fsl-ehci"
147 		struct ehci_hcd *ehci = hcd_to_ehci(hcd);
150 		dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
151 			hcd, ehci, hcd->usb_phy);
155 					      &ehci_to_hcd(ehci)->self);
196 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
206 	portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
283 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
295 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
297 	struct usb_hcd *hcd = ehci_to_hcd(ehci);
320 		ehci->has_fsl_hs_errata = 1;
323 		ehci->has_fsl_susp_errata = 1;
334 			ehci->has_fsl_port_bug = 1;
360 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
362 	if (ehci_fsl_usb_setup(ehci))
371 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
378 	ehci->big_endian_desc = pdata->big_endian_desc;
379 	ehci->big_endian_mmio = pdata->big_endian_mmio;
382 	ehci->caps = hcd->regs + 0x100;
390 	ehci->need_oc_pp_cycle = 1;
405 		ehci_writel(ehci, SBUSCFG_INCR8,
409 	retval = ehci_fsl_reinit(ehci);
426 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
431 	u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
433 	tmp = ehci_readl(ehci, hcd->regs + 0x140);	/* usbcmd */
453 	ehci->rh_state = EHCI_RH_SUSPENDED;
460 	tmp = ehci_readl(ehci, &ehci->regs->command);
462 	ehci_writel(ehci, tmp, &ehci->regs->command);
465 	pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
467 	pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
468 	pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
469 	pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
470 	pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
471 	pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
472 	pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
474 		ehci_readl(ehci, &ehci->regs->configured_flag);
475 	pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
476 	pdata->pm_usbgenctrl = ehci_readl(ehci,
480 	pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
485 	tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
487 	ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
495 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
523 	ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
525 	ehci_writel(ehci, pdata->pm_usbgenctrl,
527 	ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
530 	ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
533 	ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
534 	ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
535 	ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
536 	ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
537 	ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
538 	ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
539 	ehci_writel(ehci, pdata->pm_configured_flag,
540 		    &ehci->regs->configured_flag);
541 	ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
544 	ehci->rh_state = EHCI_RH_RUNNING;
547 	tmp = ehci_readl(ehci, &ehci->regs->command);
549 	ehci_writel(ehci, tmp, &ehci->regs->command);
591 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
599 	ehci_prepare_ports_for_controller_resume(ehci);
608 	ehci_reset(ehci);
609 	ehci_fsl_reinit(ehci);
636 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
645 	status = readl(&ehci->regs->port_status[port]);
650 	if (ehci_is_TDI(ehci)) {
653 		       &ehci->regs->port_status[port]);
655 		writel(PORT_RESET, &ehci->regs->port_status[port]);