Lines Matching defs:host
124 static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host);
138 * @host: pointer to qcom specific variant structure.
140 static void ufs_qcom_config_ice_allocator(struct ufs_qcom_host *host)
142 struct ufs_hba *hba = host->hba;
146 if (!(host->caps & UFS_QCOM_CAP_ICE_CONFIG) ||
147 !(host->hba->caps & UFSHCD_CAP_CRYPTO))
156 static inline void ufs_qcom_ice_enable(struct ufs_qcom_host *host)
158 if (host->hba->caps & UFSHCD_CAP_CRYPTO)
159 qcom_ice_enable(host->ice);
164 static int ufs_qcom_ice_init(struct ufs_qcom_host *host)
166 struct ufs_hba *hba = host->hba;
184 host->ice = ice;
221 static inline int ufs_qcom_ice_resume(struct ufs_qcom_host *host)
223 if (host->hba->caps & UFSHCD_CAP_CRYPTO)
224 return qcom_ice_resume(host->ice);
229 static inline int ufs_qcom_ice_suspend(struct ufs_qcom_host *host)
231 if (host->hba->caps & UFSHCD_CAP_CRYPTO)
232 return qcom_ice_suspend(host->ice);
242 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
246 err = qcom_ice_program_key(host->ice, slot, key);
256 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
260 err = qcom_ice_evict_key(host->ice, slot);
270 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
272 return qcom_ice_derive_sw_secret(host->ice, eph_key, eph_key_size,
281 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
283 return qcom_ice_import_key(host->ice, raw_key, raw_key_size, lt_key);
290 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
292 return qcom_ice_generate_key(host->ice, lt_key);
300 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
302 return qcom_ice_prepare_key(host->ice, lt_key, lt_key_size, eph_key);
316 static inline void ufs_qcom_ice_enable(struct ufs_qcom_host *host)
320 static int ufs_qcom_ice_init(struct ufs_qcom_host *host)
325 static inline int ufs_qcom_ice_resume(struct ufs_qcom_host *host)
330 static inline int ufs_qcom_ice_suspend(struct ufs_qcom_host *host)
335 static void ufs_qcom_config_ice_allocator(struct ufs_qcom_host *host)
341 static void ufs_qcom_disable_lane_clks(struct ufs_qcom_host *host)
343 if (!host->is_lane_clks_enabled)
346 clk_bulk_disable_unprepare(host->num_clks, host->clks);
348 host->is_lane_clks_enabled = false;
351 static int ufs_qcom_enable_lane_clks(struct ufs_qcom_host *host)
355 err = clk_bulk_prepare_enable(host->num_clks, host->clks);
359 host->is_lane_clks_enabled = true;
364 static int ufs_qcom_init_lane_clks(struct ufs_qcom_host *host)
367 struct device *dev = host->hba->dev;
372 err = devm_clk_bulk_get_all(dev, &host->clks);
376 host->num_clks = err;
421 static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host)
423 ufshcd_rmwl(host->hba, QUNIPRO_SEL, QUNIPRO_SEL, REG_UFS_CFG1);
425 if (host->hw_ver.major >= 0x05)
426 ufshcd_rmwl(host->hba, QUNIPRO_G4_SEL, 0, REG_UFS_CFG0);
430 * ufs_qcom_host_reset - reset host controller and PHY
435 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
438 if (!host->core_reset)
444 ret = reset_control_assert(host->core_reset);
458 ret = reset_control_deassert(host->core_reset);
475 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
477 if (host->hw_ver.major >= 0x4)
486 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
487 struct ufs_host_params *host_params = &host->host_params;
488 struct phy *phy = host->generic_phy;
497 if (host->hw_ver.major == 0x5) {
498 if (host->phy_gear == UFS_HS_G5)
523 ret = phy_set_mode_ext(phy, mode, host->phy_gear);
541 ufs_qcom_select_unipro_mode(host);
592 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
606 err = ufs_qcom_enable_lane_clks(host);
612 ufs_qcom_ice_enable(host);
613 ufs_qcom_config_ice_allocator(host);
626 * @hba: host controller instance
633 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
641 * It is mandatory to write SYS1CLK_1US_REG register on UFS host
644 if (host->hw_ver.major < 4 && !ufshcd_is_intr_aggr_allowed(hba))
704 * Some UFS devices (and may be host) have issues if LCC is
706 * before link startup which will make sure that both host
722 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
725 if (!host->device_reset)
728 gpiod_set_value_cansleep(host->device_reset, asserted);
734 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
740 ufs_qcom_disable_lane_clks(host);
744 if (ufs_qcom_is_link_off(hba) && host->device_reset)
747 return ufs_qcom_ice_suspend(host);
752 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
755 err = ufs_qcom_enable_lane_clks(host);
759 return ufs_qcom_ice_resume(host);
762 static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host, bool enable)
764 if (host->dev_ref_clk_ctrl_mmio &&
765 (enable ^ host->is_dev_ref_clk_enabled)) {
766 u32 temp = readl_relaxed(host->dev_ref_clk_ctrl_mmio);
769 temp |= host->dev_ref_clk_en_mask;
771 temp &= ~host->dev_ref_clk_en_mask;
782 gating_wait = host->hba->dev_info.clk_gating_wait_us;
798 writel_relaxed(temp, host->dev_ref_clk_ctrl_mmio);
804 readl(host->dev_ref_clk_ctrl_mmio);
814 host->is_dev_ref_clk_enabled = enable;
818 static int ufs_qcom_icc_set_bw(struct ufs_qcom_host *host, u32 mem_bw, u32 cfg_bw)
820 struct device *dev = host->hba->dev;
823 ret = icc_set_bw(host->icc_ddr, 0, mem_bw);
829 ret = icc_set_bw(host->icc_cpu, 0, cfg_bw);
838 static struct __ufs_qcom_bw_table ufs_qcom_get_bw_table(struct ufs_qcom_host *host)
840 struct ufs_pa_layer_attr *p = &host->dev_req_params;
864 static int ufs_qcom_icc_update_bw(struct ufs_qcom_host *host)
868 bw_table = ufs_qcom_get_bw_table(host);
870 return ufs_qcom_icc_set_bw(host, bw_table.mem_bw, bw_table.cfg_bw);
895 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
896 struct ufs_host_params *host_params = &host->host_params;
925 if (host->phy_gear == dev_req_params->gear_tx)
928 host->phy_gear = dev_req_params->gear_tx;
934 ufs_qcom_dev_ref_clk_ctrl(host, true);
936 if (host->hw_ver.major >= 0x4) {
949 memcpy(&host->dev_req_params,
952 ufs_qcom_icc_update_bw(host);
957 ufs_qcom_dev_ref_clk_ctrl(host, false);
1035 * @hba: host controller instance
1037 * QCOM UFS host controller might have some non standard behaviours (quirks)
1039 * quirks to standard UFS host controller driver so standard takes them into
1045 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1047 if (host->hw_ver.major == 0x2)
1050 if (host->hw_ver.major > 0x3)
1057 static void ufs_qcom_set_phy_gear(struct ufs_qcom_host *host)
1059 struct ufs_host_params *host_params = &host->host_params;
1069 host->phy_gear = host_params->hs_tx_gear;
1071 if (host->hw_ver.major < 0x4) {
1077 host->phy_gear = UFS_HS_G2;
1078 } else if (host->hw_ver.major >= 0x5) {
1079 val = ufshcd_readl(host->hba, REG_UFS_DEBUG_SPARE_CFG);
1088 host->hba->quirks &= ~UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH;
1095 host->phy_gear = UFS_HS_G4;
1101 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1102 struct ufs_host_params *host_params = &host->host_params;
1112 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1114 if (host->hw_ver.major >= 0x5)
1115 host->caps |= UFS_QCOM_CAP_ICE_CONFIG;
1132 * @hba: host controller instance
1147 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1156 if (!host)
1159 phy = host->generic_phy;
1164 ufs_qcom_icc_update_bw(host);
1168 ufs_qcom_dev_ref_clk_ctrl(host, false);
1188 ufs_qcom_dev_ref_clk_ctrl(host, true);
1190 ufs_qcom_icc_set_bw(host, ufs_qcom_bw_table[MODE_MIN][0][0].mem_bw,
1202 struct ufs_qcom_host *host = rcdev_to_ufs_host(rcdev);
1204 ufs_qcom_assert_reset(host->hba);
1213 struct ufs_qcom_host *host = rcdev_to_ufs_host(rcdev);
1215 ufs_qcom_deassert_reset(host->hba);
1230 static int ufs_qcom_icc_init(struct ufs_qcom_host *host)
1232 struct device *dev = host->hba->dev;
1235 host->icc_ddr = devm_of_icc_get(dev, "ufs-ddr");
1236 if (IS_ERR(host->icc_ddr))
1237 return dev_err_probe(dev, PTR_ERR(host->icc_ddr),
1240 host->icc_cpu = devm_of_icc_get(dev, "cpu-ufs");
1241 if (IS_ERR(host->icc_cpu))
1242 return dev_err_probe(dev, PTR_ERR(host->icc_cpu),
1250 ret = ufs_qcom_icc_set_bw(host, ufs_qcom_bw_table[MODE_MAX][0][0].mem_bw,
1260 * @hba: host controller instance
1272 struct ufs_qcom_host *host;
1276 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
1277 if (!host)
1280 /* Make a two way bind between the qcom host and the hba */
1281 host->hba = hba;
1282 ufshcd_set_variant(hba, host);
1285 host->core_reset = devm_reset_control_get_optional(hba->dev, "rst");
1286 if (IS_ERR(host->core_reset)) {
1287 err = dev_err_probe(dev, PTR_ERR(host->core_reset),
1293 host->rcdev.of_node = dev->of_node;
1294 host->rcdev.ops = &ufs_qcom_reset_ops;
1295 host->rcdev.owner = dev->driver->owner;
1296 host->rcdev.nr_resets = 1;
1297 err = devm_reset_controller_register(dev, &host->rcdev);
1302 host->generic_phy = devm_phy_get(dev, "ufsphy");
1303 if (IS_ERR(host->generic_phy)) {
1304 err = dev_err_probe(dev, PTR_ERR(host->generic_phy), "Failed to get PHY\n");
1309 err = ufs_qcom_icc_init(host);
1313 host->device_reset = devm_gpiod_get_optional(dev, "reset",
1315 if (IS_ERR(host->device_reset)) {
1316 err = dev_err_probe(dev, PTR_ERR(host->device_reset),
1321 ufs_qcom_get_controller_revision(hba, &host->hw_ver.major,
1322 &host->hw_ver.minor, &host->hw_ver.step);
1324 host->dev_ref_clk_ctrl_mmio = hba->mmio_base + REG_UFS_CFG1;
1325 host->dev_ref_clk_en_mask = BIT(26);
1332 err = ufs_qcom_init_lane_clks(host);
1339 ufs_qcom_set_phy_gear(host);
1341 err = ufs_qcom_ice_init(host);
1347 ufs_qcom_get_default_testbus_cfg(host);
1348 err = ufs_qcom_testbus_config(host);
1367 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1369 ufs_qcom_disable_lane_clks(host);
1370 phy_power_off(host->generic_phy);
1371 phy_exit(host->generic_phy);
1377 * @hba: host controller instance
1386 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1392 * UFS host controller V4.0.0 onwards needs to program
1394 * frequency of unipro core clk of UFS host controller.
1396 if (host->hw_ver.major < 4)
1447 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1491 /* Bit mask is different for UFS host controller V4.0.0 onwards */
1492 if (host->hw_ver.major >= 4) {
1573 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1576 /* check the host controller state before sending hibern8 cmd */
1605 ufs_qcom_icc_update_bw(host);
1612 static void ufs_qcom_enable_test_bus(struct ufs_qcom_host *host)
1614 ufshcd_rmwl(host->hba, UFS_REG_TEST_BUS_EN,
1616 ufshcd_rmwl(host->hba, TEST_BUS_EN, TEST_BUS_EN, REG_UFS_CFG1);
1619 static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host)
1622 host->testbus.select_major = TSTBUS_UNIPRO;
1623 host->testbus.select_minor = 37;
1626 static bool ufs_qcom_testbus_cfg_is_ok(struct ufs_qcom_host *host)
1628 if (host->testbus.select_major >= TSTBUS_MAX) {
1629 dev_err(host->hba->dev,
1631 __func__, host->testbus.select_major);
1638 int ufs_qcom_testbus_config(struct ufs_qcom_host *host)
1644 if (!host)
1647 if (!ufs_qcom_testbus_cfg_is_ok(host))
1650 switch (host->testbus.select_major) {
1707 ufshcd_rmwl(host->hba, TEST_BUS_SEL,
1708 (u32)host->testbus.select_major << 19,
1710 ufshcd_rmwl(host->hba, mask,
1711 (u32)host->testbus.select_minor << offset,
1713 ufs_qcom_enable_test_bus(host);
1720 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1732 host->testbus.select_major = j;
1735 host->testbus.select_minor = i;
1736 ufs_qcom_testbus_config(host);
1800 struct ufs_qcom_host *host;
1802 host = ufshcd_get_variant(hba);
1816 reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_REG_OCSC);
1823 reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_EDTL_RAM);
1826 reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_DESC_RAM);
1829 reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_PRDT_RAM);
1835 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UAWM);
1838 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UARM);
1841 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TXUC);
1844 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_RXUC);
1847 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_DFC);
1850 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TRLUT);
1853 reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TMRLUT);
1857 reg = ufs_qcom_get_debug_reg_offset(host, UFS_RD_REG_MCQ);
1882 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
1885 if (!host->device_reset)
2086 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
2089 if (host->esi_enabled)
2129 if (host->hw_ver.major >= 6) {
2134 host->esi_enabled = true;
2269 struct ufs_qcom_host *host = ufshcd_get_variant(hba);
2272 if (host->esi_enabled)
2322 MODULE_DESCRIPTION("Qualcomm UFS host controller driver");