Lines Matching defs:info

41 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
42 /*#define DBGTBUF(info) dump_tbufs(info)*/
43 /*#define DBGRBUF(info) dump_rbufs(info)*/
396 #define slgt_irq_on(info, mask) \
397 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
398 #define slgt_irq_off(info, mask) \
399 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
401 static __u8 rd_reg8(struct slgt_info *info, unsigned int addr);
402 static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value);
403 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr);
404 static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value);
405 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr);
406 static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value);
408 static void msc_set_vcr(struct slgt_info *info);
410 static int startup(struct slgt_info *info);
411 static int block_til_ready(struct tty_struct *tty, struct file * filp,struct slgt_info *info);
412 static void shutdown(struct slgt_info *info);
413 static void program_hw(struct slgt_info *info);
414 static void change_params(struct slgt_info *info);
416 static int adapter_test(struct slgt_info *info);
418 static void reset_port(struct slgt_info *info);
419 static void async_mode(struct slgt_info *info);
420 static void sync_mode(struct slgt_info *info);
422 static void rx_stop(struct slgt_info *info);
423 static void rx_start(struct slgt_info *info);
424 static void reset_rbufs(struct slgt_info *info);
425 static void free_rbufs(struct slgt_info *info, unsigned int first, unsigned int last);
426 static bool rx_get_frame(struct slgt_info *info);
427 static bool rx_get_buf(struct slgt_info *info);
429 static void tx_start(struct slgt_info *info);
430 static void tx_stop(struct slgt_info *info);
431 static void tx_set_idle(struct slgt_info *info);
432 static unsigned int tbuf_bytes(struct slgt_info *info);
433 static void reset_tbufs(struct slgt_info *info);
434 static void tdma_reset(struct slgt_info *info);
435 static bool tx_load(struct slgt_info *info, const u8 *buf, unsigned int count);
437 static void get_gtsignals(struct slgt_info *info);
438 static void set_gtsignals(struct slgt_info *info);
439 static void set_rate(struct slgt_info *info, u32 data_rate);
441 static void bh_transmit(struct slgt_info *info);
442 static void isr_txeom(struct slgt_info *info, unsigned short status);
450 static int get_stats(struct slgt_info *info, struct mgsl_icount __user *user_icount);
451 static int get_params(struct slgt_info *info, MGSL_PARAMS __user *params);
452 static int set_params(struct slgt_info *info, MGSL_PARAMS __user *params);
453 static int get_txidle(struct slgt_info *info, int __user *idle_mode);
454 static int set_txidle(struct slgt_info *info, int idle_mode);
455 static int tx_enable(struct slgt_info *info, int enable);
456 static int tx_abort(struct slgt_info *info);
457 static int rx_enable(struct slgt_info *info, int enable);
458 static int modem_input_wait(struct slgt_info *info,int arg);
459 static int wait_mgsl_event(struct slgt_info *info, int __user *mask_ptr);
460 static int get_interface(struct slgt_info *info, int __user *if_mode);
461 static int set_interface(struct slgt_info *info, int if_mode);
462 static int set_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
463 static int get_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
464 static int wait_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
465 static int get_xsync(struct slgt_info *info, int __user *if_mode);
466 static int set_xsync(struct slgt_info *info, int if_mode);
467 static int get_xctrl(struct slgt_info *info, int __user *if_mode);
468 static int set_xctrl(struct slgt_info *info, int if_mode);
473 static void release_resources(struct slgt_info *info);
492 static void trace_block(struct slgt_info *info, const char *data, int count, const char *label)
496 printk("%s %s data:\n",info->device_name, label);
515 #define DBGDATA(info, buf, size, label)
519 static void dump_tbufs(struct slgt_info *info)
522 printk("tbuf_current=%d\n", info->tbuf_current);
523 for (i=0 ; i < info->tbuf_count ; i++) {
525 i, le16_to_cpu(info->tbufs[i].count), le16_to_cpu(info->tbufs[i].status));
529 #define DBGTBUF(info)
533 static void dump_rbufs(struct slgt_info *info)
536 printk("rbuf_current=%d\n", info->rbuf_current);
537 for (i=0 ; i < info->rbuf_count ; i++) {
539 i, le16_to_cpu(info->rbufs[i].count), le16_to_cpu(info->rbufs[i].status));
543 #define DBGRBUF(info)
546 static inline int sanity_check(struct slgt_info *info, char *devname, const char *name)
549 if (!info) {
554 if (!info)
586 struct slgt_info *info;
596 info = slgt_device_list;
597 while(info && info->line != line)
598 info = info->next_device;
599 if (sanity_check(info, tty->name, "open"))
601 if (info->init_error) {
602 DBGERR(("%s init error=%d\n", info->device_name, info->init_error));
606 tty->driver_data = info;
607 info->port.tty = tty;
609 DBGINFO(("%s open, old ref count = %d\n", info->device_name, info->port.count));
611 mutex_lock(&info->port.mutex);
613 spin_lock_irqsave(&info->netlock, flags);
614 if (info->netcount) {
616 spin_unlock_irqrestore(&info->netlock, flags);
617 mutex_unlock(&info->port.mutex);
620 info->port.count++;
621 spin_unlock_irqrestore(&info->netlock, flags);
623 if (info->port.count == 1) {
625 retval = startup(info);
627 mutex_unlock(&info->port.mutex);
631 mutex_unlock(&info->port.mutex);
632 retval = block_til_ready(tty, filp, info);
634 DBGINFO(("%s block_til_ready rc=%d\n", info->device_name, retval));
643 info->port.tty = NULL; /* tty layer will release tty struct */
644 if(info->port.count)
645 info->port.count--;
648 DBGINFO(("%s open rc=%d\n", info->device_name, retval));
654 struct slgt_info *info = tty->driver_data;
656 if (sanity_check(info, tty->name, "close"))
658 DBGINFO(("%s close entry, count=%d\n", info->device_name, info->port.count));
660 if (tty_port_close_start(&info->port, tty, filp) == 0)
663 mutex_lock(&info->port.mutex);
664 if (tty_port_initialized(&info->port))
665 wait_until_sent(tty, info->timeout);
669 shutdown(info);
670 mutex_unlock(&info->port.mutex);
672 tty_port_close_end(&info->port, tty);
673 info->port.tty = NULL;
675 DBGINFO(("%s close exit, count=%d\n", tty->driver->name, info->port.count));
680 struct slgt_info *info = tty->driver_data;
683 if (sanity_check(info, tty->name, "hangup"))
685 DBGINFO(("%s hangup\n", info->device_name));
689 mutex_lock(&info->port.mutex);
690 shutdown(info);
692 spin_lock_irqsave(&info->port.lock, flags);
693 info->port.count = 0;
694 info->port.tty = NULL;
695 spin_unlock_irqrestore(&info->port.lock, flags);
696 tty_port_set_active(&info->port, false);
697 mutex_unlock(&info->port.mutex);
699 wake_up_interruptible(&info->port.open_wait);
705 struct slgt_info *info = tty->driver_data;
710 change_params(info);
714 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
715 spin_lock_irqsave(&info->lock,flags);
716 set_gtsignals(info);
717 spin_unlock_irqrestore(&info->lock,flags);
722 info->signals |= SerialSignal_DTR;
724 info->signals |= SerialSignal_RTS;
725 spin_lock_irqsave(&info->lock,flags);
726 set_gtsignals(info);
727 spin_unlock_irqrestore(&info->lock,flags);
737 static void update_tx_timer(struct slgt_info *info)
743 if (info->params.mode == MGSL_MODE_HDLC) {
744 int timeout = (tbuf_bytes(info) * 7) + 1000;
745 mod_timer(&info->tx_timer, jiffies + msecs_to_jiffies(timeout));
752 struct slgt_info *info = tty->driver_data;
755 if (sanity_check(info, tty->name, "write"))
758 DBGINFO(("%s write count=%zu\n", info->device_name, count));
760 if (!info->tx_buf || (count > info->max_frame_size))
766 spin_lock_irqsave(&info->lock, flags);
768 if (info->tx_count) {
770 if (!tx_load(info, info->tx_buf, info->tx_count))
772 info->tx_count = 0;
775 if (tx_load(info, buf, count))
779 spin_unlock_irqrestore(&info->lock, flags);
780 DBGINFO(("%s write rc=%d\n", info->device_name, ret));
786 struct slgt_info *info = tty->driver_data;
790 if (sanity_check(info, tty->name, "put_char"))
792 DBGINFO(("%s put_char(%u)\n", info->device_name, ch));
793 if (!info->tx_buf)
795 spin_lock_irqsave(&info->lock,flags);
796 if (info->tx_count < info->max_frame_size) {
797 info->tx_buf[info->tx_count++] = ch;
800 spin_unlock_irqrestore(&info->lock,flags);
806 struct slgt_info *info = tty->driver_data;
809 if (sanity_check(info, tty->name, "send_xchar"))
811 DBGINFO(("%s send_xchar(%d)\n", info->device_name, ch));
812 info->x_char = ch;
814 spin_lock_irqsave(&info->lock,flags);
815 if (!info->tx_enabled)
816 tx_start(info);
817 spin_unlock_irqrestore(&info->lock,flags);
823 struct slgt_info *info = tty->driver_data;
826 if (!info )
828 if (sanity_check(info, tty->name, "wait_until_sent"))
830 DBGINFO(("%s wait_until_sent entry\n", info->device_name));
831 if (!tty_port_initialized(&info->port))
842 if (info->params.data_rate) {
843 char_time = info->timeout/(32 * 5);
852 while (info->tx_active) {
860 DBGINFO(("%s wait_until_sent exit\n", info->device_name));
865 struct slgt_info *info = tty->driver_data;
868 if (sanity_check(info, tty->name, "write_room"))
870 ret = (info->tx_active) ? 0 : HDLC_MAX_FRAME_SIZE;
871 DBGINFO(("%s write_room=%u\n", info->device_name, ret));
877 struct slgt_info *info = tty->driver_data;
880 if (sanity_check(info, tty->name, "flush_chars"))
882 DBGINFO(("%s flush_chars entry tx_count=%d\n", info->device_name, info->tx_count));
884 if (info->tx_count <= 0 || tty->flow.stopped ||
885 tty->hw_stopped || !info->tx_buf)
888 DBGINFO(("%s flush_chars start transmit\n", info->device_name));
890 spin_lock_irqsave(&info->lock,flags);
891 if (info->tx_count && tx_load(info, info->tx_buf, info->tx_count))
892 info->tx_count = 0;
893 spin_unlock_irqrestore(&info->lock,flags);
898 struct slgt_info *info = tty->driver_data;
901 if (sanity_check(info, tty->name, "flush_buffer"))
903 DBGINFO(("%s flush_buffer\n", info->device_name));
905 spin_lock_irqsave(&info->lock, flags);
906 info->tx_count = 0;
907 spin_unlock_irqrestore(&info->lock, flags);
917 struct slgt_info *info = tty->driver_data;
920 if (sanity_check(info, tty->name, "tx_hold"))
922 DBGINFO(("%s tx_hold\n", info->device_name));
923 spin_lock_irqsave(&info->lock,flags);
924 if (info->tx_enabled && info->params.mode == MGSL_MODE_ASYNC)
925 tx_stop(info);
926 spin_unlock_irqrestore(&info->lock,flags);
934 struct slgt_info *info = tty->driver_data;
937 if (sanity_check(info, tty->name, "tx_release"))
939 DBGINFO(("%s tx_release\n", info->device_name));
940 spin_lock_irqsave(&info->lock, flags);
941 if (info->tx_count && tx_load(info, info->tx_buf, info->tx_count))
942 info->tx_count = 0;
943 spin_unlock_irqrestore(&info->lock, flags);
960 struct slgt_info *info = tty->driver_data;
964 if (sanity_check(info, tty->name, "ioctl"))
966 DBGINFO(("%s ioctl() cmd=%08X\n", info->device_name, cmd));
975 return wait_mgsl_event(info, argp);
977 return modem_input_wait(info,(int)arg);
979 return set_gpio(info, argp);
981 return get_gpio(info, argp);
983 return wait_gpio(info, argp);
985 return get_xsync(info, argp);
987 return set_xsync(info, (int)arg);
989 return get_xctrl(info, argp);
991 return set_xctrl(info, (int)arg);
993 mutex_lock(&info->port.mutex);
996 ret = get_params(info, argp);
999 ret = set_params(info, argp);
1002 ret = get_txidle(info, argp);
1005 ret = set_txidle(info, (int)arg);
1008 ret = tx_enable(info, (int)arg);
1011 ret = rx_enable(info, (int)arg);
1014 ret = tx_abort(info);
1017 ret = get_stats(info, argp);
1020 ret = get_interface(info, argp);
1023 ret = set_interface(info,(int)arg);
1028 mutex_unlock(&info->port.mutex);
1036 struct slgt_info *info = tty->driver_data;
1040 spin_lock_irqsave(&info->lock,flags);
1041 cnow = info->icount;
1042 spin_unlock_irqrestore(&info->lock,flags);
1063 static long get_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *user_params)
1067 DBGINFO(("%s get_params32\n", info->device_name));
1069 tmp_params.mode = (compat_ulong_t)info->params.mode;
1070 tmp_params.loopback = info->params.loopback;
1071 tmp_params.flags = info->params.flags;
1072 tmp_params.encoding = info->params.encoding;
1073 tmp_params.clock_speed = (compat_ulong_t)info->params.clock_speed;
1074 tmp_params.addr_filter = info->params.addr_filter;
1075 tmp_params.crc_type = info->params.crc_type;
1076 tmp_params.preamble_length = info->params.preamble_length;
1077 tmp_params.preamble = info->params.preamble;
1078 tmp_params.data_rate = (compat_ulong_t)info->params.data_rate;
1079 tmp_params.data_bits = info->params.data_bits;
1080 tmp_params.stop_bits = info->params.stop_bits;
1081 tmp_params.parity = info->params.parity;
1087 static long set_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *new_params)
1092 DBGINFO(("%s set_params32\n", info->device_name));
1096 spin_lock_irqsave(&info->lock, flags);
1098 info->base_clock = tmp_params.clock_speed;
1100 info->params.mode = tmp_params.mode;
1101 info->params.loopback = tmp_params.loopback;
1102 info->params.flags = tmp_params.flags;
1103 info->params.encoding = tmp_params.encoding;
1104 info->params.clock_speed = tmp_params.clock_speed;
1105 info->params.addr_filter = tmp_params.addr_filter;
1106 info->params.crc_type = tmp_params.crc_type;
1107 info->params.preamble_length = tmp_params.preamble_length;
1108 info->params.preamble = tmp_params.preamble;
1109 info->params.data_rate = tmp_params.data_rate;
1110 info->params.data_bits = tmp_params.data_bits;
1111 info->params.stop_bits = tmp_params.stop_bits;
1112 info->params.parity = tmp_params.parity;
1114 spin_unlock_irqrestore(&info->lock, flags);
1116 program_hw(info);
1124 struct slgt_info *info = tty->driver_data;
1127 if (sanity_check(info, tty->name, "compat_ioctl"))
1129 DBGINFO(("%s compat_ioctl() cmd=%08X\n", info->device_name, cmd));
1133 rc = set_params32(info, compat_ptr(arg));
1137 rc = get_params32(info, compat_ptr(arg));
1156 DBGINFO(("%s compat_ioctl() cmd=%08X rc=%d\n", info->device_name, cmd, rc));
1166 static inline void line_info(struct seq_file *m, struct slgt_info *info)
1172 info->device_name, info->phys_reg_addr,
1173 info->irq_level, info->max_frame_size);
1176 spin_lock_irqsave(&info->lock,flags);
1177 get_gtsignals(info);
1178 spin_unlock_irqrestore(&info->lock,flags);
1182 if (info->signals & SerialSignal_RTS)
1184 if (info->signals & SerialSignal_CTS)
1186 if (info->signals & SerialSignal_DTR)
1188 if (info->signals & SerialSignal_DSR)
1190 if (info->signals & SerialSignal_DCD)
1192 if (info->signals & SerialSignal_RI)
1195 if (info->params.mode != MGSL_MODE_ASYNC) {
1197 info->icount.txok, info->icount.rxok);
1198 if (info->icount.txunder)
1199 seq_printf(m, " txunder:%d", info->icount.txunder);
1200 if (info->icount.txabort)
1201 seq_printf(m, " txabort:%d", info->icount.txabort);
1202 if (info->icount.rxshort)
1203 seq_printf(m, " rxshort:%d", info->icount.rxshort);
1204 if (info->icount.rxlong)
1205 seq_printf(m, " rxlong:%d", info->icount.rxlong);
1206 if (info->icount.rxover)
1207 seq_printf(m, " rxover:%d", info->icount.rxover);
1208 if (info->icount.rxcrc)
1209 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
1212 info->icount.tx, info->icount.rx);
1213 if (info->icount.frame)
1214 seq_printf(m, " fe:%d", info->icount.frame);
1215 if (info->icount.parity)
1216 seq_printf(m, " pe:%d", info->icount.parity);
1217 if (info->icount.brk)
1218 seq_printf(m, " brk:%d", info->icount.brk);
1219 if (info->icount.overrun)
1220 seq_printf(m, " oe:%d", info->icount.overrun);
1227 info->tx_active,info->bh_requested,info->bh_running,
1228 info->pending_bh);
1235 struct slgt_info *info;
1239 info = slgt_device_list;
1240 while( info ) {
1241 line_info(m, info);
1242 info = info->next_device;
1252 struct slgt_info *info = tty->driver_data;
1254 if (sanity_check(info, tty->name, "chars_in_buffer"))
1256 count = tbuf_bytes(info);
1257 DBGINFO(("%s chars_in_buffer()=%u\n", info->device_name, count));
1266 struct slgt_info *info = tty->driver_data;
1269 if (sanity_check(info, tty->name, "throttle"))
1271 DBGINFO(("%s throttle\n", info->device_name));
1275 spin_lock_irqsave(&info->lock,flags);
1276 info->signals &= ~SerialSignal_RTS;
1277 set_gtsignals(info);
1278 spin_unlock_irqrestore(&info->lock,flags);
1287 struct slgt_info *info = tty->driver_data;
1290 if (sanity_check(info, tty->name, "unthrottle"))
1292 DBGINFO(("%s unthrottle\n", info->device_name));
1294 if (info->x_char)
1295 info->x_char = 0;
1300 spin_lock_irqsave(&info->lock,flags);
1301 info->signals |= SerialSignal_RTS;
1302 set_gtsignals(info);
1303 spin_unlock_irqrestore(&info->lock,flags);
1313 struct slgt_info *info = tty->driver_data;
1317 if (sanity_check(info, tty->name, "set_break"))
1319 DBGINFO(("%s set_break(%d)\n", info->device_name, break_state));
1321 spin_lock_irqsave(&info->lock,flags);
1322 value = rd_reg16(info, TCR);
1327 wr_reg16(info, TCR, value);
1328 spin_unlock_irqrestore(&info->lock,flags);
1347 struct slgt_info *info = dev_to_port(dev);
1352 if (info->port.count)
1355 DBGINFO(("%s hdlcdev_attach\n", info->device_name));
1375 info->params.encoding = new_encoding;
1376 info->params.crc_type = new_crctype;
1379 if (info->netcount)
1380 program_hw(info);
1393 struct slgt_info *info = dev_to_port(dev);
1411 spin_lock_irqsave(&info->lock, flags);
1412 tx_load(info, skb->data, skb->len);
1413 spin_unlock_irqrestore(&info->lock, flags);
1431 struct slgt_info *info = dev_to_port(dev);
1438 spin_lock_irqsave(&info->netlock, flags);
1439 if (info->port.count != 0 || info->netcount != 0) {
1441 spin_unlock_irqrestore(&info->netlock, flags);
1444 info->netcount=1;
1445 spin_unlock_irqrestore(&info->netlock, flags);
1448 if ((rc = startup(info)) != 0) {
1449 spin_lock_irqsave(&info->netlock, flags);
1450 info->netcount=0;
1451 spin_unlock_irqrestore(&info->netlock, flags);
1458 shutdown(info);
1459 spin_lock_irqsave(&info->netlock, flags);
1460 info->netcount = 0;
1461 spin_unlock_irqrestore(&info->netlock, flags);
1466 info->signals |= SerialSignal_RTS | SerialSignal_DTR;
1467 program_hw(info);
1474 spin_lock_irqsave(&info->lock, flags);
1475 get_gtsignals(info);
1476 spin_unlock_irqrestore(&info->lock, flags);
1477 if (info->signals & SerialSignal_DCD)
1494 struct slgt_info *info = dev_to_port(dev);
1502 shutdown(info);
1506 spin_lock_irqsave(&info->netlock, flags);
1507 info->netcount=0;
1508 spin_unlock_irqrestore(&info->netlock, flags);
1526 struct slgt_info *info = dev_to_port(dev);
1532 if (info->port.count)
1546 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1559 new_line.clock_rate = info->params.clock_speed;
1560 new_line.loopback = info->params.loopback ? 1:0;
1579 case CLOCK_DEFAULT: flags = info->params.flags &
1590 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1594 info->params.flags |= flags;
1596 info->params.loopback = new_line.loopback;
1599 info->params.clock_speed = new_line.clock_rate;
1601 info->params.clock_speed = 0;
1604 if (info->netcount)
1605 program_hw(info);
1620 struct slgt_info *info = dev_to_port(dev);
1628 spin_lock_irqsave(&info->lock,flags);
1629 tx_stop(info);
1630 spin_unlock_irqrestore(&info->lock,flags);
1637 * @info: pointer to device instance information
1641 static void hdlcdev_tx_done(struct slgt_info *info)
1643 if (netif_queue_stopped(info->netdev))
1644 netif_wake_queue(info->netdev);
1649 * @info: pointer to device instance information
1655 static void hdlcdev_rx(struct slgt_info *info, char *buf, int size)
1658 struct net_device *dev = info->netdev;
1688 * @info: pointer to device instance information
1694 static int hdlcdev_init(struct slgt_info *info)
1702 dev = alloc_hdlcdev(info);
1704 printk(KERN_ERR "%s hdlc device alloc failure\n", info->device_name);
1709 dev->mem_start = info->phys_reg_addr;
1710 dev->mem_end = info->phys_reg_addr + SLGT_REG_SIZE - 1;
1711 dev->irq = info->irq_level;
1731 info->netdev = dev;
1737 * @info: pointer to device instance information
1741 static void hdlcdev_exit(struct slgt_info *info)
1743 if (!info->netdev)
1745 unregister_hdlc_device(info->netdev);
1746 free_netdev(info->netdev);
1747 info->netdev = NULL;
1755 static void rx_async(struct slgt_info *info)
1757 struct mgsl_icount *icount = &info->icount;
1761 struct slgt_desc *bufs = info->rbufs;
1767 start = end = info->rbuf_current;
1770 count = desc_count(bufs[end]) - info->rbuf_index;
1771 p = bufs[end].buf + info->rbuf_index;
1773 DBGISR(("%s rx_async count=%d\n", info->device_name, count));
1774 DBGDATA(info, p, count, "rx");
1789 if (status & info->ignore_status_mask)
1796 tty_insert_flip_char(&info->port, ch, stat);
1802 info->rbuf_index += i;
1803 mod_timer(&info->rx_timer, jiffies + 1);
1807 info->rbuf_index = 0;
1808 free_rbufs(info, end, end);
1810 if (++end == info->rbuf_count)
1819 tty_flip_buffer_push(&info->port);
1825 static int bh_action(struct slgt_info *info)
1830 spin_lock_irqsave(&info->lock,flags);
1832 if (info->pending_bh & BH_RECEIVE) {
1833 info->pending_bh &= ~BH_RECEIVE;
1835 } else if (info->pending_bh & BH_TRANSMIT) {
1836 info->pending_bh &= ~BH_TRANSMIT;
1838 } else if (info->pending_bh & BH_STATUS) {
1839 info->pending_bh &= ~BH_STATUS;
1843 info->bh_running = false;
1844 info->bh_requested = false;
1848 spin_unlock_irqrestore(&info->lock,flags);
1858 struct slgt_info *info = container_of(work, struct slgt_info, task);
1861 info->bh_running = true;
1863 while((action = bh_action(info))) {
1866 DBGBH(("%s bh receive\n", info->device_name));
1867 switch(info->params.mode) {
1869 rx_async(info);
1872 while(rx_get_frame(info));
1878 while(rx_get_buf(info));
1882 if (info->rx_restart)
1883 rx_start(info);
1886 bh_transmit(info);
1889 DBGBH(("%s bh status\n", info->device_name));
1890 info->ri_chkcount = 0;
1891 info->dsr_chkcount = 0;
1892 info->dcd_chkcount = 0;
1893 info->cts_chkcount = 0;
1896 DBGBH(("%s unknown action\n", info->device_name));
1900 DBGBH(("%s bh_handler exit\n", info->device_name));
1903 static void bh_transmit(struct slgt_info *info)
1905 struct tty_struct *tty = info->port.tty;
1907 DBGBH(("%s bh_transmit\n", info->device_name));
1912 static void dsr_change(struct slgt_info *info, unsigned short status)
1915 info->signals |= SerialSignal_DSR;
1916 info->input_signal_events.dsr_up++;
1918 info->signals &= ~SerialSignal_DSR;
1919 info->input_signal_events.dsr_down++;
1921 DBGISR(("dsr_change %s signals=%04X\n", info->device_name, info->signals));
1922 if ((info->dsr_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1923 slgt_irq_off(info, IRQ_DSR);
1926 info->icount.dsr++;
1927 wake_up_interruptible(&info->status_event_wait_q);
1928 wake_up_interruptible(&info->event_wait_q);
1929 info->pending_bh |= BH_STATUS;
1932 static void cts_change(struct slgt_info *info, unsigned short status)
1935 info->signals |= SerialSignal_CTS;
1936 info->input_signal_events.cts_up++;
1938 info->signals &= ~SerialSignal_CTS;
1939 info->input_signal_events.cts_down++;
1941 DBGISR(("cts_change %s signals=%04X\n", info->device_name, info->signals));
1942 if ((info->cts_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1943 slgt_irq_off(info, IRQ_CTS);
1946 info->icount.cts++;
1947 wake_up_interruptible(&info->status_event_wait_q);
1948 wake_up_interruptible(&info->event_wait_q);
1949 info->pending_bh |= BH_STATUS;
1951 if (tty_port_cts_enabled(&info->port)) {
1952 if (info->port.tty) {
1953 if (info->port.tty->hw_stopped) {
1954 if (info->signals & SerialSignal_CTS) {
1955 info->port.tty->hw_stopped = false;
1956 info->pending_bh |= BH_TRANSMIT;
1960 if (!(info->signals & SerialSignal_CTS))
1961 info->port.tty->hw_stopped = true;
1967 static void dcd_change(struct slgt_info *info, unsigned short status)
1970 info->signals |= SerialSignal_DCD;
1971 info->input_signal_events.dcd_up++;
1973 info->signals &= ~SerialSignal_DCD;
1974 info->input_signal_events.dcd_down++;
1976 DBGISR(("dcd_change %s signals=%04X\n", info->device_name, info->signals));
1977 if ((info->dcd_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1978 slgt_irq_off(info, IRQ_DCD);
1981 info->icount.dcd++;
1983 if (info->netcount) {
1984 if (info->signals & SerialSignal_DCD)
1985 netif_carrier_on(info->netdev);
1987 netif_carrier_off(info->netdev);
1990 wake_up_interruptible(&info->status_event_wait_q);
1991 wake_up_interruptible(&info->event_wait_q);
1992 info->pending_bh |= BH_STATUS;
1994 if (tty_port_check_carrier(&info->port)) {
1995 if (info->signals & SerialSignal_DCD)
1996 wake_up_interruptible(&info->port.open_wait);
1998 if (info->port.tty)
1999 tty_hangup(info->port.tty);
2004 static void ri_change(struct slgt_info *info, unsigned short status)
2007 info->signals |= SerialSignal_RI;
2008 info->input_signal_events.ri_up++;
2010 info->signals &= ~SerialSignal_RI;
2011 info->input_signal_events.ri_down++;
2013 DBGISR(("ri_change %s signals=%04X\n", info->device_name, info->signals));
2014 if ((info->ri_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
2015 slgt_irq_off(info, IRQ_RI);
2018 info->icount.rng++;
2019 wake_up_interruptible(&info->status_event_wait_q);
2020 wake_up_interruptible(&info->event_wait_q);
2021 info->pending_bh |= BH_STATUS;
2024 static void isr_rxdata(struct slgt_info *info)
2026 unsigned int count = info->rbuf_fill_count;
2027 unsigned int i = info->rbuf_fill_index;
2030 while (rd_reg16(info, SSR) & IRQ_RXDATA) {
2031 reg = rd_reg16(info, RDR);
2032 DBGISR(("isr_rxdata %s RDR=%04X\n", info->device_name, reg));
2033 if (desc_complete(info->rbufs[i])) {
2035 rx_stop(info);
2036 info->rx_restart = true;
2039 info->rbufs[i].buf[count++] = (unsigned char)reg;
2041 if (info->params.mode == MGSL_MODE_ASYNC)
2042 info->rbufs[i].buf[count++] = (unsigned char)(reg >> 8);
2043 if (count == info->rbuf_fill_level || (reg & BIT10)) {
2045 set_desc_count(info->rbufs[i], count);
2046 set_desc_status(info->rbufs[i], BIT15 | (reg >> 8));
2047 info->rbuf_fill_count = count = 0;
2048 if (++i == info->rbuf_count)
2050 info->pending_bh |= BH_RECEIVE;
2054 info->rbuf_fill_index = i;
2055 info->rbuf_fill_count = count;
2058 static void isr_serial(struct slgt_info *info)
2060 unsigned short status = rd_reg16(info, SSR);
2062 DBGISR(("%s isr_serial status=%04X\n", info->device_name, status));
2064 wr_reg16(info, SSR, status); /* clear pending */
2066 info->irq_occurred = true;
2068 if (info->params.mode == MGSL_MODE_ASYNC) {
2070 if (info->tx_active)
2071 isr_txeom(info, status);
2073 if (info->rx_pio && (status & IRQ_RXDATA))
2074 isr_rxdata(info);
2076 info->icount.brk++;
2078 if (info->port.tty) {
2079 if (!(status & info->ignore_status_mask)) {
2080 if (info->read_status_mask & MASK_BREAK) {
2081 tty_insert_flip_char(&info->port, 0, TTY_BREAK);
2082 if (info->port.flags & ASYNC_SAK)
2083 do_SAK(info->port.tty);
2090 isr_txeom(info, status);
2091 if (info->rx_pio && (status & IRQ_RXDATA))
2092 isr_rxdata(info);
2095 info->icount.rxidle++;
2097 info->icount.exithunt++;
2098 wake_up_interruptible(&info->event_wait_q);
2102 rx_start(info);
2106 dsr_change(info, status);
2108 cts_change(info, status);
2110 dcd_change(info, status);
2112 ri_change(info, status);
2115 static void isr_rdma(struct slgt_info *info)
2117 unsigned int status = rd_reg32(info, RDCSR);
2119 DBGISR(("%s isr_rdma status=%08x\n", info->device_name, status));
2132 wr_reg32(info, RDCSR, status); /* clear pending */
2135 DBGISR(("%s isr_rdma rx_restart=1\n", info->device_name));
2136 info->rx_restart = true;
2138 info->pending_bh |= BH_RECEIVE;
2141 static void isr_tdma(struct slgt_info *info)
2143 unsigned int status = rd_reg32(info, TDCSR);
2145 DBGISR(("%s isr_tdma status=%08x\n", info->device_name, status));
2157 wr_reg32(info, TDCSR, status); /* clear pending */
2162 info->pending_bh |= BH_TRANSMIT;
2169 * if there are unsent buffers then info->tbuf_start
2172 static bool unsent_tbufs(struct slgt_info *info)
2174 unsigned int i = info->tbuf_current;
2186 i = info->tbuf_count - 1;
2187 if (!desc_count(info->tbufs[i]))
2189 info->tbuf_start = i;
2191 } while (i != info->tbuf_current);
2196 static void isr_txeom(struct slgt_info *info, unsigned short status)
2198 DBGISR(("%s txeom status=%04x\n", info->device_name, status));
2200 slgt_irq_off(info, IRQ_TXDATA + IRQ_TXIDLE + IRQ_TXUNDER);
2201 tdma_reset(info);
2203 unsigned short val = rd_reg16(info, TCR);
2204 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
2205 wr_reg16(info, TCR, val); /* clear reset bit */
2208 if (info->tx_active) {
2209 if (info->params.mode != MGSL_MODE_ASYNC) {
2211 info->icount.txunder++;
2213 info->icount.txok++;
2216 if (unsent_tbufs(info)) {
2217 tx_start(info);
2218 update_tx_timer(info);
2221 info->tx_active = false;
2223 timer_delete(&info->tx_timer);
2225 if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done) {
2226 info->signals &= ~SerialSignal_RTS;
2227 info->drop_rts_on_tx_done = false;
2228 set_gtsignals(info);
2232 if (info->netcount)
2233 hdlcdev_tx_done(info);
2237 if (info->port.tty && (info->port.tty->flow.stopped || info->port.tty->hw_stopped)) {
2238 tx_stop(info);
2241 info->pending_bh |= BH_TRANSMIT;
2246 static void isr_gpio(struct slgt_info *info, unsigned int changed, unsigned int state)
2251 for (w = info->gpio_wait_q, prev = NULL ; w != NULL ; w = w->next) {
2258 info->gpio_wait_q = w->next;
2271 struct slgt_info *info = dev_id;
2275 DBGISR(("slgt_interrupt irq=%d entry\n", info->irq_level));
2277 while((gsr = rd_reg32(info, GSR) & 0xffffff00)) {
2278 DBGISR(("%s gsr=%08x\n", info->device_name, gsr));
2279 info->irq_occurred = true;
2280 for(i=0; i < info->port_count ; i++) {
2281 if (info->port_array[i] == NULL)
2283 spin_lock(&info->port_array[i]->lock);
2285 isr_serial(info->port_array[i]);
2287 isr_rdma(info->port_array[i]);
2289 isr_tdma(info->port_array[i]);
2290 spin_unlock(&info->port_array[i]->lock);
2294 if (info->gpio_present) {
2297 spin_lock(&info->lock);
2298 while ((changed = rd_reg32(info, IOSR)) != 0) {
2299 DBGISR(("%s iosr=%08x\n", info->device_name, changed));
2301 state = rd_reg32(info, IOVR);
2303 wr_reg32(info, IOSR, changed);
2304 for (i=0 ; i < info->port_count ; i++) {
2305 if (info->port_array[i] != NULL)
2306 isr_gpio(info->port_array[i], changed, state);
2309 spin_unlock(&info->lock);
2312 for(i=0; i < info->port_count ; i++) {
2313 struct slgt_info *port = info->port_array[i];
2327 DBGISR(("slgt_interrupt irq=%d exit\n", info->irq_level));
2331 static int startup(struct slgt_info *info)
2333 DBGINFO(("%s startup\n", info->device_name));
2335 if (tty_port_initialized(&info->port))
2338 if (!info->tx_buf) {
2339 info->tx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
2340 if (!info->tx_buf) {
2341 DBGERR(("%s can't allocate tx buffer\n", info->device_name));
2346 info->pending_bh = 0;
2348 memset(&info->icount, 0, sizeof(info->icount));
2351 change_params(info);
2353 if (info->port.tty)
2354 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2356 tty_port_set_initialized(&info->port, true);
2364 static void shutdown(struct slgt_info *info)
2368 if (!tty_port_initialized(&info->port))
2371 DBGINFO(("%s shutdown\n", info->device_name));
2375 wake_up_interruptible(&info->status_event_wait_q);
2376 wake_up_interruptible(&info->event_wait_q);
2378 timer_delete_sync(&info->tx_timer);
2379 timer_delete_sync(&info->rx_timer);
2381 kfree(info->tx_buf);
2382 info->tx_buf = NULL;
2384 spin_lock_irqsave(&info->lock,flags);
2386 tx_stop(info);
2387 rx_stop(info);
2389 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
2391 if (!info->port.tty || info->port.tty->termios.c_cflag & HUPCL) {
2392 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2393 set_gtsignals(info);
2396 flush_cond_wait(&info->gpio_wait_q);
2398 spin_unlock_irqrestore(&info->lock,flags);
2400 if (info->port.tty)
2401 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2403 tty_port_set_initialized(&info->port, false);
2406 static void program_hw(struct slgt_info *info)
2410 spin_lock_irqsave(&info->lock,flags);
2412 rx_stop(info);
2413 tx_stop(info);
2415 if (info->params.mode != MGSL_MODE_ASYNC ||
2416 info->netcount)
2417 sync_mode(info);
2419 async_mode(info);
2421 set_gtsignals(info);
2423 info->dcd_chkcount = 0;
2424 info->cts_chkcount = 0;
2425 info->ri_chkcount = 0;
2426 info->dsr_chkcount = 0;
2428 slgt_irq_on(info, IRQ_DCD | IRQ_CTS | IRQ_DSR | IRQ_RI);
2429 get_gtsignals(info);
2431 if (info->netcount ||
2432 (info->port.tty && info->port.tty->termios.c_cflag & CREAD))
2433 rx_start(info);
2435 spin_unlock_irqrestore(&info->lock,flags);
2441 static void change_params(struct slgt_info *info)
2446 if (!info->port.tty)
2448 DBGINFO(("%s change_params\n", info->device_name));
2450 cflag = info->port.tty->termios.c_cflag;
2455 info->signals |= SerialSignal_RTS | SerialSignal_DTR;
2457 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2461 info->params.data_bits = tty_get_char_size(cflag);
2462 info->params.stop_bits = (cflag & CSTOPB) ? 2 : 1;
2465 info->params.parity = (cflag & PARODD) ? ASYNC_PARITY_ODD : ASYNC_PARITY_EVEN;
2467 info->params.parity = ASYNC_PARITY_NONE;
2472 bits_per_char = info->params.data_bits +
2473 info->params.stop_bits + 1;
2475 info->params.data_rate = tty_get_baud_rate(info->port.tty);
2477 if (info->params.data_rate) {
2478 info->timeout = (32*HZ*bits_per_char) /
2479 info->params.data_rate;
2481 info->timeout += HZ/50; /* Add .02 seconds of slop */
2483 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
2484 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
2488 info->read_status_mask = IRQ_RXOVER;
2489 if (I_INPCK(info->port.tty))
2490 info->read_status_mask |= MASK_PARITY | MASK_FRAMING;
2491 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
2492 info->read_status_mask |= MASK_BREAK;
2493 if (I_IGNPAR(info->port.tty))
2494 info->ignore_status_mask |= MASK_PARITY | MASK_FRAMING;
2495 if (I_IGNBRK(info->port.tty)) {
2496 info->ignore_status_mask |= MASK_BREAK;
2500 if (I_IGNPAR(info->port.tty))
2501 info->ignore_status_mask |= MASK_OVERRUN;
2504 program_hw(info);
2507 static int get_stats(struct slgt_info *info, struct mgsl_icount __user *user_icount)
2509 DBGINFO(("%s get_stats\n", info->device_name));
2511 memset(&info->icount, 0, sizeof(info->icount));
2513 if (copy_to_user(user_icount, &info->icount, sizeof(struct mgsl_icount)))
2519 static int get_params(struct slgt_info *info, MGSL_PARAMS __user *user_params)
2521 DBGINFO(("%s get_params\n", info->device_name));
2522 if (copy_to_user(user_params, &info->params, sizeof(MGSL_PARAMS)))
2527 static int set_params(struct slgt_info *info, MGSL_PARAMS __user *new_params)
2532 DBGINFO(("%s set_params\n", info->device_name));
2536 spin_lock_irqsave(&info->lock, flags);
2538 info->base_clock = tmp_params.clock_speed;
2540 memcpy(&info->params, &tmp_params, sizeof(MGSL_PARAMS));
2541 spin_unlock_irqrestore(&info->lock, flags);
2543 program_hw(info);
2548 static int get_txidle(struct slgt_info *info, int __user *idle_mode)
2550 DBGINFO(("%s get_txidle=%d\n", info->device_name, info->idle_mode));
2551 if (put_user(info->idle_mode, idle_mode))
2556 static int set_txidle(struct slgt_info *info, int idle_mode)
2559 DBGINFO(("%s set_txidle(%d)\n", info->device_name, idle_mode));
2560 spin_lock_irqsave(&info->lock,flags);
2561 info->idle_mode = idle_mode;
2562 if (info->params.mode != MGSL_MODE_ASYNC)
2563 tx_set_idle(info);
2564 spin_unlock_irqrestore(&info->lock,flags);
2568 static int tx_enable(struct slgt_info *info, int enable)
2571 DBGINFO(("%s tx_enable(%d)\n", info->device_name, enable));
2572 spin_lock_irqsave(&info->lock,flags);
2574 if (!info->tx_enabled)
2575 tx_start(info);
2577 if (info->tx_enabled)
2578 tx_stop(info);
2580 spin_unlock_irqrestore(&info->lock,flags);
2587 static int tx_abort(struct slgt_info *info)
2590 DBGINFO(("%s tx_abort\n", info->device_name));
2591 spin_lock_irqsave(&info->lock,flags);
2592 tdma_reset(info);
2593 spin_unlock_irqrestore(&info->lock,flags);
2597 static int rx_enable(struct slgt_info *info, int enable)
2601 DBGINFO(("%s rx_enable(%08x)\n", info->device_name, enable));
2602 spin_lock_irqsave(&info->lock,flags);
2611 spin_unlock_irqrestore(&info->lock, flags);
2614 info->rbuf_fill_level = rbuf_fill_level;
2616 info->rx_pio = 1; /* PIO mode */
2618 info->rx_pio = 0; /* DMA mode */
2619 rx_stop(info); /* restart receiver to use new fill level */
2630 if (!info->rx_enabled)
2631 rx_start(info);
2634 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3);
2637 if (info->rx_enabled)
2638 rx_stop(info);
2640 spin_unlock_irqrestore(&info->lock,flags);
2647 static int wait_mgsl_event(struct slgt_info *info, int __user *mask_ptr)
2661 DBGINFO(("%s wait_mgsl_event(%d)\n", info->device_name, mask));
2663 spin_lock_irqsave(&info->lock,flags);
2666 get_gtsignals(info);
2667 s = info->signals;
2675 spin_unlock_irqrestore(&info->lock,flags);
2680 cprev = info->icount;
2681 oldsigs = info->input_signal_events;
2685 unsigned short val = rd_reg16(info, SCR);
2687 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE));
2691 add_wait_queue(&info->event_wait_q, &wait);
2693 spin_unlock_irqrestore(&info->lock,flags);
2703 spin_lock_irqsave(&info->lock,flags);
2704 cnow = info->icount;
2705 newsigs = info->input_signal_events;
2707 spin_unlock_irqrestore(&info->lock,flags);
2742 remove_wait_queue(&info->event_wait_q, &wait);
2747 spin_lock_irqsave(&info->lock,flags);
2748 if (!waitqueue_active(&info->event_wait_q)) {
2750 wr_reg16(info, SCR,
2751 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE));
2753 spin_unlock_irqrestore(&info->lock,flags);
2761 static int get_interface(struct slgt_info *info, int __user *if_mode)
2763 DBGINFO(("%s get_interface=%x\n", info->device_name, info->if_mode));
2764 if (put_user(info->if_mode, if_mode))
2769 static int set_interface(struct slgt_info *info, int if_mode)
2774 DBGINFO(("%s set_interface=%x)\n", info->device_name, if_mode));
2775 spin_lock_irqsave(&info->lock,flags);
2776 info->if_mode = if_mode;
2778 msc_set_vcr(info);
2781 val = rd_reg16(info, TCR);
2782 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
2786 wr_reg16(info, TCR, val);
2788 spin_unlock_irqrestore(&info->lock,flags);
2792 static int get_xsync(struct slgt_info *info, int __user *xsync)
2794 DBGINFO(("%s get_xsync=%x\n", info->device_name, info->xsync));
2795 if (put_user(info->xsync, xsync))
2806 static int set_xsync(struct slgt_info *info, int xsync)
2810 DBGINFO(("%s set_xsync=%x)\n", info->device_name, xsync));
2811 spin_lock_irqsave(&info->lock, flags);
2812 info->xsync = xsync;
2813 wr_reg32(info, XSR, xsync);
2814 spin_unlock_irqrestore(&info->lock, flags);
2818 static int get_xctrl(struct slgt_info *info, int __user *xctrl)
2820 DBGINFO(("%s get_xctrl=%x\n", info->device_name, info->xctrl));
2821 if (put_user(info->xctrl, xctrl))
2843 static int set_xctrl(struct slgt_info *info, int xctrl)
2847 DBGINFO(("%s set_xctrl=%x)\n", info->device_name, xctrl));
2848 spin_lock_irqsave(&info->lock, flags);
2849 info->xctrl = xctrl;
2850 wr_reg32(info, XCR, xctrl);
2851 spin_unlock_irqrestore(&info->lock, flags);
2864 static int set_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
2870 if (!info->gpio_present)
2875 info->device_name, gpio.state, gpio.smask,
2878 spin_lock_irqsave(&info->port_array[0]->lock, flags);
2880 data = rd_reg32(info, IODR);
2883 wr_reg32(info, IODR, data);
2886 data = rd_reg32(info, IOVR);
2889 wr_reg32(info, IOVR, data);
2891 spin_unlock_irqrestore(&info->port_array[0]->lock, flags);
2899 static int get_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
2902 if (!info->gpio_present)
2904 gpio.state = rd_reg32(info, IOVR);
2906 gpio.dir = rd_reg32(info, IODR);
2911 info->device_name, gpio.state, gpio.dir));
2973 static int wait_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
2981 if (!info->gpio_present)
2986 info->device_name, gpio.state, gpio.smask));
2988 if ((gpio.smask &= ~rd_reg32(info, IODR)) == 0)
2992 spin_lock_irqsave(&info->port_array[0]->lock, flags);
2994 wr_reg32(info, IOER, rd_reg32(info, IOER) | gpio.smask);
2996 state = rd_reg32(info, IOVR);
3003 add_cond_wait(&info->gpio_wait_q, &wait);
3004 spin_unlock_irqrestore(&info->port_array[0]->lock, flags);
3010 spin_lock_irqsave(&info->port_array[0]->lock, flags);
3011 remove_cond_wait(&info->gpio_wait_q, &wait);
3015 if (info->gpio_wait_q == NULL)
3016 wr_reg32(info, IOER, 0);
3017 spin_unlock_irqrestore(&info->port_array[0]->lock, flags);
3024 static int modem_input_wait(struct slgt_info *info,int arg)
3032 spin_lock_irqsave(&info->lock,flags);
3033 cprev = info->icount;
3034 add_wait_queue(&info->status_event_wait_q, &wait);
3036 spin_unlock_irqrestore(&info->lock,flags);
3046 spin_lock_irqsave(&info->lock,flags);
3047 cnow = info->icount;
3049 spin_unlock_irqrestore(&info->lock,flags);
3069 remove_wait_queue(&info->status_event_wait_q, &wait);
3079 struct slgt_info *info = tty->driver_data;
3083 spin_lock_irqsave(&info->lock,flags);
3084 get_gtsignals(info);
3085 spin_unlock_irqrestore(&info->lock,flags);
3087 result = ((info->signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
3088 ((info->signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
3089 ((info->signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
3090 ((info->signals & SerialSignal_RI) ? TIOCM_RNG:0) +
3091 ((info->signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
3092 ((info->signals & SerialSignal_CTS) ? TIOCM_CTS:0);
3094 DBGINFO(("%s tiocmget value=%08X\n", info->device_name, result));
3108 struct slgt_info *info = tty->driver_data;
3111 DBGINFO(("%s tiocmset(%x,%x)\n", info->device_name, set, clear));
3114 info->signals |= SerialSignal_RTS;
3116 info->signals |= SerialSignal_DTR;
3118 info->signals &= ~SerialSignal_RTS;
3120 info->signals &= ~SerialSignal_DTR;
3122 spin_lock_irqsave(&info->lock,flags);
3123 set_gtsignals(info);
3124 spin_unlock_irqrestore(&info->lock,flags);
3131 struct slgt_info *info = container_of(port, struct slgt_info, port);
3133 spin_lock_irqsave(&info->lock,flags);
3134 get_gtsignals(info);
3135 spin_unlock_irqrestore(&info->lock,flags);
3137 return info->signals & SerialSignal_DCD;
3143 struct slgt_info *info = container_of(port, struct slgt_info, port);
3145 spin_lock_irqsave(&info->lock,flags);
3147 info->signals |= SerialSignal_RTS | SerialSignal_DTR;
3149 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
3150 set_gtsignals(info);
3151 spin_unlock_irqrestore(&info->lock,flags);
3159 struct slgt_info *info)
3166 struct tty_port *port = &info->port;
3189 spin_lock_irqsave(&info->lock, flags);
3191 spin_unlock_irqrestore(&info->lock, flags);
3241 static int alloc_tmp_rbuf(struct slgt_info *info)
3243 info->tmp_rbuf = kmalloc(info->max_frame_size + 5, GFP_KERNEL);
3244 if (info->tmp_rbuf == NULL)
3250 static void free_tmp_rbuf(struct slgt_info *info)
3252 kfree(info->tmp_rbuf);
3253 info->tmp_rbuf = NULL;
3259 static int alloc_desc(struct slgt_info *info)
3265 info->bufs = dma_alloc_coherent(&info->pdev->dev, DESC_LIST_SIZE,
3266 &info->bufs_dma_addr, GFP_KERNEL);
3267 if (info->bufs == NULL)
3270 info->rbufs = (struct slgt_desc*)info->bufs;
3271 info->tbufs = ((struct slgt_desc*)info->bufs) + info->rbuf_count;
3273 pbufs = (unsigned int)info->bufs_dma_addr;
3279 for (i=0; i < info->rbuf_count; i++) {
3281 info->rbufs[i].pdesc = pbufs + (i * sizeof(struct slgt_desc));
3284 if (i == info->rbuf_count - 1)
3285 info->rbufs[i].next = cpu_to_le32(pbufs);
3287 info->rbufs[i].next = cpu_to_le32(pbufs + ((i+1) * sizeof(struct slgt_desc)));
3288 set_desc_count(info->rbufs[i], DMABUFSIZE);
3291 for (i=0; i < info->tbuf_count; i++) {
3293 info->tbufs[i].pdesc = pbufs + ((info->rbuf_count + i) * sizeof(struct slgt_desc));
3296 if (i == info->tbuf_count - 1)
3297 info->tbufs[i].next = cpu_to_le32(pbufs + info->rbuf_count * sizeof(struct slgt_desc));
3299 info->tbufs[i].next = cpu_to_le32(pbufs + ((info->rbuf_count + i + 1) * sizeof(struct slgt_desc)));
3305 static void free_desc(struct slgt_info *info)
3307 if (info->bufs != NULL) {
3308 dma_free_coherent(&info->pdev->dev, DESC_LIST_SIZE,
3309 info->bufs, info->bufs_dma_addr);
3310 info->bufs = NULL;
3311 info->rbufs = NULL;
3312 info->tbufs = NULL;
3316 static int alloc_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count)
3320 bufs[i].buf = dma_alloc_coherent(&info->pdev->dev, DMABUFSIZE,
3329 static void free_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count)
3335 dma_free_coherent(&info->pdev->dev, DMABUFSIZE, bufs[i].buf,
3341 static int alloc_dma_bufs(struct slgt_info *info)
3343 info->rbuf_count = 32;
3344 info->tbuf_count = 32;
3346 if (alloc_desc(info) < 0 ||
3347 alloc_bufs(info, info->rbufs, info->rbuf_count) < 0 ||
3348 alloc_bufs(info, info->tbufs, info->tbuf_count) < 0 ||
3349 alloc_tmp_rbuf(info) < 0) {
3350 DBGERR(("%s DMA buffer alloc fail\n", info->device_name));
3353 reset_rbufs(info);
3357 static void free_dma_bufs(struct slgt_info *info)
3359 if (info->bufs) {
3360 free_bufs(info, info->rbufs, info->rbuf_count);
3361 free_bufs(info, info->tbufs, info->tbuf_count);
3362 free_desc(info);
3364 free_tmp_rbuf(info);
3367 static int claim_resources(struct slgt_info *info)
3369 if (request_mem_region(info->phys_reg_addr, SLGT_REG_SIZE, "synclink_gt") == NULL) {
3371 info->device_name, info->phys_reg_addr));
3372 info->init_error = DiagStatus_AddressConflict;
3376 info->reg_addr_requested = true;
3378 info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE);
3379 if (!info->reg_addr) {
3381 info->device_name, info->phys_reg_addr));
3382 info->init_error = DiagStatus_CantAssignPciResources;
3388 release_resources(info);
3392 static void release_resources(struct slgt_info *info)
3394 if (info->irq_requested) {
3395 free_irq(info->irq_level, info);
3396 info->irq_requested = false;
3399 if (info->reg_addr_requested) {
3400 release_mem_region(info->phys_reg_addr, SLGT_REG_SIZE);
3401 info->reg_addr_requested = false;
3404 if (info->reg_addr) {
3405 iounmap(info->reg_addr);
3406 info->reg_addr = NULL;
3413 static void add_device(struct slgt_info *info)
3417 info->next_device = NULL;
3418 info->line = slgt_device_count;
3419 sprintf(info->device_name, "%s%d", tty_dev_prefix, info->line);
3421 if (info->line < MAX_DEVICES) {
3422 if (maxframe[info->line])
3423 info->max_frame_size = maxframe[info->line];
3429 slgt_device_list = info;
3434 current_dev->next_device = info;
3437 if (info->max_frame_size < 4096)
3438 info->max_frame_size = 4096;
3439 else if (info->max_frame_size > 65535)
3440 info->max_frame_size = 65535;
3442 switch(info->pdev->device) {
3454 info->params.mode = MGSL_MODE_ASYNC;
3460 devstr, info->device_name, info->phys_reg_addr,
3461 info->irq_level, info->max_frame_size);
3464 hdlcdev_init(info);
3478 struct slgt_info *info;
3480 info = kzalloc(sizeof(struct slgt_info), GFP_KERNEL);
3482 if (!info) {
3486 tty_port_init(&info->port);
3487 info->port.ops = &slgt_port_ops;
3488 INIT_WORK(&info->task, bh_handler);
3489 info->max_frame_size = 4096;
3490 info->base_clock = 14745600;
3491 info->rbuf_fill_level = DMABUFSIZE;
3492 init_waitqueue_head(&info->status_event_wait_q);
3493 init_waitqueue_head(&info->event_wait_q);
3494 spin_lock_init(&info->netlock);
3495 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
3496 info->idle_mode = HDLC_TXIDLE_FLAGS;
3497 info->adapter_num = adapter_num;
3498 info->port_num = port_num;
3500 timer_setup(&info->tx_timer, tx_timeout, 0);
3501 timer_setup(&info->rx_timer, rx_timeout, 0);
3503 /* Copy configuration info to device instance data */
3504 info->pdev = pdev;
3505 info->irq_level = pdev->irq;
3506 info->phys_reg_addr = pci_resource_start(pdev,0);
3508 info->bus_type = MGSL_BUS_TYPE_PCI;
3509 info->irq_flags = IRQF_SHARED;
3511 info->init_error = -1; /* assume error, set to 0 on successful init */
3514 return info;
3579 struct slgt_info *info = port_array[i];
3580 tty_port_register_device(&info->port, serial_driver, info->line,
3581 &info->pdev->dev);
3629 struct slgt_info *info;
3633 for (info=slgt_device_list ; info != NULL ; info=info->next_device)
3634 tty_unregister_device(serial_driver, info->line);
3640 info = slgt_device_list;
3641 while(info) {
3642 reset_port(info);
3643 info = info->next_device;
3647 info = slgt_device_list;
3648 while(info) {
3650 hdlcdev_exit(info);
3652 free_dma_bufs(info);
3653 free_tmp_rbuf(info);
3654 if (info->port_num == 0)
3655 release_resources(info);
3656 tmp = info;
3657 info = info->next_device;
3727 static inline void __iomem *calc_regaddr(struct slgt_info *info,
3730 void __iomem *reg_addr = info->reg_addr + addr;
3733 reg_addr += info->port_num * 32;
3735 reg_addr += info->port_num * 16;
3740 static __u8 rd_reg8(struct slgt_info *info, unsigned int addr)
3742 return readb(calc_regaddr(info, addr));
3745 static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value)
3747 writeb(value, calc_regaddr(info, addr));
3750 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr)
3752 return readw(calc_regaddr(info, addr));
3755 static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value)
3757 writew(value, calc_regaddr(info, addr));
3760 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr)
3762 return readl(calc_regaddr(info, addr));
3765 static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value)
3767 writel(value, calc_regaddr(info, addr));
3770 static void rdma_reset(struct slgt_info *info)
3775 wr_reg32(info, RDCSR, BIT1);
3779 if (!(rd_reg32(info, RDCSR) & BIT0))
3783 static void tdma_reset(struct slgt_info *info)
3788 wr_reg32(info, TDCSR, BIT1);
3792 if (!(rd_reg32(info, TDCSR) & BIT0))
3801 static void enable_loopback(struct slgt_info *info)
3804 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2));
3806 if (info->params.mode != MGSL_MODE_ASYNC) {
3815 wr_reg8(info, CCR, 0x49);
3818 if (info->params.clock_speed)
3819 set_rate(info, info->params.clock_speed);
3821 set_rate(info, 3686400);
3828 static void set_rate(struct slgt_info *info, u32 rate)
3831 unsigned int osc = info->base_clock;
3843 wr_reg16(info, BDR, (unsigned short)div);
3847 static void rx_stop(struct slgt_info *info)
3852 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3853 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3854 wr_reg16(info, RCR, val); /* clear reset bit */
3856 slgt_irq_off(info, IRQ_RXOVER + IRQ_RXDATA + IRQ_RXIDLE);
3859 wr_reg16(info, SSR, IRQ_RXIDLE + IRQ_RXOVER);
3861 rdma_reset(info);
3863 info->rx_enabled = false;
3864 info->rx_restart = false;
3867 static void rx_start(struct slgt_info *info)
3871 slgt_irq_off(info, IRQ_RXOVER + IRQ_RXDATA);
3874 wr_reg16(info, SSR, IRQ_RXOVER);
3877 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3878 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3879 wr_reg16(info, RCR, val); /* clear reset bit */
3881 rdma_reset(info);
3882 reset_rbufs(info);
3884 if (info->rx_pio) {
3886 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));
3887 slgt_irq_on(info, IRQ_RXDATA);
3888 if (info->params.mode == MGSL_MODE_ASYNC) {
3890 wr_reg32(info, RDCSR, BIT6);
3894 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));
3896 wr_reg32(info, RDDAR, info->rbufs[0].pdesc);
3898 if (info->params.mode != MGSL_MODE_ASYNC) {
3900 wr_reg32(info, RDCSR, (BIT2 + BIT0));
3903 wr_reg32(info, RDCSR, (BIT6 + BIT2 + BIT0));
3907 slgt_irq_on(info, IRQ_RXOVER);
3910 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1));
3912 info->rx_restart = false;
3913 info->rx_enabled = true;
3916 static void tx_start(struct slgt_info *info)
3918 if (!info->tx_enabled) {
3919 wr_reg16(info, TCR,
3920 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2));
3921 info->tx_enabled = true;
3924 if (desc_count(info->tbufs[info->tbuf_start])) {
3925 info->drop_rts_on_tx_done = false;
3927 if (info->params.mode != MGSL_MODE_ASYNC) {
3928 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3929 get_gtsignals(info);
3930 if (!(info->signals & SerialSignal_RTS)) {
3931 info->signals |= SerialSignal_RTS;
3932 set_gtsignals(info);
3933 info->drop_rts_on_tx_done = true;
3937 slgt_irq_off(info, IRQ_TXDATA);
3938 slgt_irq_on(info, IRQ_TXUNDER + IRQ_TXIDLE);
3940 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
3942 slgt_irq_off(info, IRQ_TXDATA);
3943 slgt_irq_on(info, IRQ_TXIDLE);
3945 wr_reg16(info, SSR, IRQ_TXIDLE);
3948 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3949 wr_reg32(info, TDCSR, BIT2 + BIT0);
3950 info->tx_active = true;
3954 static void tx_stop(struct slgt_info *info)
3958 timer_delete(&info->tx_timer);
3960 tdma_reset(info);
3963 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */
3964 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
3966 slgt_irq_off(info, IRQ_TXDATA + IRQ_TXIDLE + IRQ_TXUNDER);
3969 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
3971 reset_tbufs(info);
3973 info->tx_enabled = false;
3974 info->tx_active = false;
3977 static void reset_port(struct slgt_info *info)
3979 if (!info->reg_addr)
3982 tx_stop(info);
3983 rx_stop(info);
3985 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
3986 set_gtsignals(info);
3988 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
3991 static void reset_adapter(struct slgt_info *info)
3994 for (i=0; i < info->port_count; ++i) {
3995 if (info->port_array[i])
3996 reset_port(info->port_array[i]);
4000 static void async_mode(struct slgt_info *info)
4004 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
4005 tx_stop(info);
4006 rx_stop(info);
4028 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
4031 if (info->params.parity != ASYNC_PARITY_NONE) {
4033 if (info->params.parity == ASYNC_PARITY_ODD)
4037 switch (info->params.data_bits)
4044 if (info->params.stop_bits != 1)
4047 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
4050 wr_reg16(info, TCR, val);
4071 if (info->params.parity != ASYNC_PARITY_NONE) {
4073 if (info->params.parity == ASYNC_PARITY_ODD)
4077 switch (info->params.data_bits)
4084 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
4087 wr_reg16(info, RCR, val);
4098 wr_reg8(info, CCR, 0x69);
4100 msc_set_vcr(info);
4123 if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate &&
4124 ((info->base_clock < (info->params.data_rate * 16)) ||
4125 (info->base_clock % (info->params.data_rate * 16)))) {
4128 set_rate(info, info->params.data_rate * 8);
4131 set_rate(info, info->params.data_rate * 16);
4133 wr_reg16(info, SCR, val);
4135 slgt_irq_on(info, IRQ_RXBREAK | IRQ_RXOVER);
4137 if (info->params.loopback)
4138 enable_loopback(info);
4141 static void sync_mode(struct slgt_info *info)
4145 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
4146 tx_stop(info);
4147 rx_stop(info);
4171 switch(info->params.mode) {
4179 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
4182 switch(info->params.encoding)
4193 switch (info->params.crc_type & HDLC_CRC_MASK)
4199 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
4202 switch (info->params.preamble_length)
4209 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
4212 wr_reg16(info, TCR, val);
4216 switch (info->params.preamble)
4225 wr_reg8(info, TPR, (unsigned char)val);
4246 switch(info->params.mode) {
4255 switch(info->params.encoding)
4266 switch (info->params.crc_type & HDLC_CRC_MASK)
4272 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
4275 wr_reg16(info, RCR, val);
4286 if (info->params.flags & HDLC_FLAG_TXC_BRG)
4291 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4296 else if (info->params.flags & HDLC_FLAG_TXC_DPLL)
4298 else if (info->params.flags & HDLC_FLAG_TXC_RXCPIN)
4301 if (info->params.flags & HDLC_FLAG_RXC_BRG)
4303 else if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4305 else if (info->params.flags & HDLC_FLAG_RXC_TXCPIN)
4308 if (info->params.clock_speed)
4311 wr_reg8(info, CCR, (unsigned char)val);
4313 if (info->params.flags & (HDLC_FLAG_TXC_DPLL + HDLC_FLAG_RXC_DPLL))
4316 switch(info->params.encoding)
4326 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | val));
4329 set_rate(info, info->params.clock_speed * 16);
4332 set_rate(info, info->params.clock_speed);
4334 tx_set_idle(info);
4336 msc_set_vcr(info);
4357 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);
4359 if (info->params.loopback)
4360 enable_loopback(info);
4366 static void tx_set_idle(struct slgt_info *info)
4374 tcr = rd_reg16(info, TCR);
4375 if (info->idle_mode & HDLC_TXIDLE_CUSTOM_16) {
4379 wr_reg8(info, TPR, (unsigned char)((info->idle_mode >> 8) & 0xff));
4384 wr_reg16(info, TCR, tcr);
4386 if (info->idle_mode & (HDLC_TXIDLE_CUSTOM_8 | HDLC_TXIDLE_CUSTOM_16)) {
4388 val = (unsigned char)(info->idle_mode & 0xff);
4391 switch(info->idle_mode)
4402 wr_reg8(info, TIR, val);
4408 static void get_gtsignals(struct slgt_info *info)
4410 unsigned short status = rd_reg16(info, SSR);
4413 info->signals &= SerialSignal_RTS | SerialSignal_DTR;
4416 info->signals |= SerialSignal_DSR;
4418 info->signals |= SerialSignal_CTS;
4420 info->signals |= SerialSignal_DCD;
4422 info->signals |= SerialSignal_RI;
4428 static void msc_set_vcr(struct slgt_info *info)
4441 switch(info->if_mode & MGSL_INTERFACE_MASK)
4454 if (info->if_mode & MGSL_INTERFACE_MSB_FIRST)
4456 if (info->signals & SerialSignal_DTR)
4458 if (info->signals & SerialSignal_RTS)
4460 if (info->if_mode & MGSL_INTERFACE_LL)
4462 if (info->if_mode & MGSL_INTERFACE_RL)
4464 wr_reg8(info, VCR, val);
4470 static void set_gtsignals(struct slgt_info *info)
4472 unsigned char val = rd_reg8(info, VCR);
4473 if (info->signals & SerialSignal_DTR)
4477 if (info->signals & SerialSignal_RTS)
4481 wr_reg8(info, VCR, val);
4487 static void free_rbufs(struct slgt_info *info, unsigned int i, unsigned int last)
4493 info->rbufs[i].status = 0;
4494 set_desc_count(info->rbufs[i], info->rbuf_fill_level);
4497 if (++i == info->rbuf_count)
4500 info->rbuf_current = i;
4506 static void reset_rbufs(struct slgt_info *info)
4508 free_rbufs(info, 0, info->rbuf_count - 1);
4509 info->rbuf_fill_index = 0;
4510 info->rbuf_fill_count = 0;
4518 static bool rx_get_frame(struct slgt_info *info)
4524 struct tty_struct *tty = info->port.tty;
4528 switch (info->params.crc_type & HDLC_CRC_MASK) {
4537 start = end = info->rbuf_current;
4540 if (!desc_complete(info->rbufs[end]))
4543 if (framesize == 0 && info->params.addr_filter != 0xff)
4544 addr_field = info->rbufs[end].buf[0];
4546 framesize += desc_count(info->rbufs[end]);
4548 if (desc_eof(info->rbufs[end]))
4551 if (++end == info->rbuf_count)
4554 if (end == info->rbuf_current) {
4555 if (info->rx_enabled){
4556 spin_lock_irqsave(&info->lock,flags);
4557 rx_start(info);
4558 spin_unlock_irqrestore(&info->lock,flags);
4573 status = desc_status(info->rbufs[end]);
4576 if ((info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_NONE)
4580 (addr_field != 0xff && addr_field != info->params.addr_filter)) {
4581 free_rbufs(info, start, end);
4586 info->icount.rxshort++;
4589 info->icount.rxcrc++;
4590 if (!(info->params.crc_type & HDLC_CRC_RETURN_EX))
4596 info->netdev->stats.rx_errors++;
4597 info->netdev->stats.rx_frame_errors++;
4602 info->device_name, status, framesize));
4603 DBGDATA(info, info->rbufs[start].buf, min_t(int, framesize, info->rbuf_fill_level), "rx");
4606 if (!(info->params.crc_type & HDLC_CRC_RETURN_EX)) {
4611 if (framesize > info->max_frame_size + crc_size)
4612 info->icount.rxlong++;
4617 unsigned char *p = info->tmp_rbuf;
4618 info->tmp_rbuf_count = framesize;
4620 info->icount.rxok++;
4623 int partial_count = min_t(int, copy_count, info->rbuf_fill_level);
4624 memcpy(p, info->rbufs[i].buf, partial_count);
4627 if (++i == info->rbuf_count)
4631 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
4637 if (info->netcount)
4638 hdlcdev_rx(info,info->tmp_rbuf, framesize);
4641 ldisc_receive_buf(tty, info->tmp_rbuf, NULL,
4645 free_rbufs(info, start, end);
4656 static bool rx_get_buf(struct slgt_info *info)
4658 unsigned int i = info->rbuf_current;
4661 if (!desc_complete(info->rbufs[i]))
4663 count = desc_count(info->rbufs[i]);
4664 switch(info->params.mode) {
4669 if (desc_residue(info->rbufs[i]))
4673 DBGDATA(info, info->rbufs[i].buf, count, "rx");
4676 ldisc_receive_buf(info->port.tty, info->rbufs[i].buf, NULL,
4678 free_rbufs(info, i, i);
4682 static void reset_tbufs(struct slgt_info *info)
4685 info->tbuf_current = 0;
4686 for (i=0 ; i < info->tbuf_count ; i++) {
4687 info->tbufs[i].status = 0;
4688 info->tbufs[i].count = 0;
4695 static unsigned int free_tbuf_count(struct slgt_info *info)
4698 unsigned int i = info->tbuf_current;
4702 if (desc_count(info->tbufs[i]))
4705 if (++i == info->tbuf_count)
4707 } while (i != info->tbuf_current);
4710 if (count && (rd_reg32(info, TDCSR) & BIT0))
4720 static unsigned int tbuf_bytes(struct slgt_info *info)
4723 unsigned int i = info->tbuf_current;
4740 count = desc_count(info->tbufs[i]);
4744 active_buf_count = info->tbufs[i].buf_count;
4745 if (++i == info->tbuf_count)
4747 } while (i != info->tbuf_current);
4750 reg_value = rd_reg32(info, TDCSR);
4760 if (info->tx_active)
4770 static bool tx_load(struct slgt_info *info, const u8 *buf, unsigned int size)
4777 if (DIV_ROUND_UP(size, DMABUFSIZE) > free_tbuf_count(info))
4780 DBGDATA(info, buf, size, "tx");
4793 info->tbuf_start = i = info->tbuf_current;
4796 d = &info->tbufs[i];
4808 if ((!size && info->params.mode == MGSL_MODE_HDLC) ||
4809 info->params.mode == MGSL_MODE_RAW)
4815 if (i != info->tbuf_start)
4819 if (++i == info->tbuf_count)
4823 info->tbuf_current = i;
4826 d = &info->tbufs[info->tbuf_start];
4830 if (!info->tx_active)
4831 tx_start(info);
4832 update_tx_timer(info);
4837 static int register_test(struct slgt_info *info)
4846 wr_reg16(info, TIR, patterns[i]);
4847 wr_reg16(info, BDR, patterns[(i+1)%count]);
4848 if ((rd_reg16(info, TIR) != patterns[i]) ||
4849 (rd_reg16(info, BDR) != patterns[(i+1)%count])) {
4854 info->gpio_present = (rd_reg32(info, JCR) & BIT5) ? 1 : 0;
4855 info->init_error = rc ? 0 : DiagStatus_AddressFailure;
4859 static int irq_test(struct slgt_info *info)
4863 struct tty_struct *oldtty = info->port.tty;
4864 u32 speed = info->params.data_rate;
4866 info->params.data_rate = 921600;
4867 info->port.tty = NULL;
4869 spin_lock_irqsave(&info->lock, flags);
4870 async_mode(info);
4871 slgt_irq_on(info, IRQ_TXIDLE);
4874 wr_reg16(info, TCR,
4875 (unsigned short)(rd_reg16(info, TCR) | BIT1));
4878 wr_reg16(info, TDR, 0);
4881 info->init_error = DiagStatus_IrqFailure;
4882 info->irq_occurred = false;
4884 spin_unlock_irqrestore(&info->lock, flags);
4887 while(timeout-- && !info->irq_occurred)
4890 spin_lock_irqsave(&info->lock,flags);
4891 reset_port(info);
4892 spin_unlock_irqrestore(&info->lock,flags);
4894 info->params.data_rate = speed;
4895 info->port.tty = oldtty;
4897 info->init_error = info->irq_occurred ? 0 : DiagStatus_IrqFailure;
4898 return info->irq_occurred ? 0 : -ENODEV;
4901 static int loopback_test_rx(struct slgt_info *info)
4906 if (desc_complete(info->rbufs[0])) {
4907 count = desc_count(info->rbufs[0]);
4908 src = info->rbufs[0].buf;
4909 dest = info->tmp_rbuf;
4916 info->tmp_rbuf_count++;
4919 DBGDATA(info, info->tmp_rbuf, info->tmp_rbuf_count, "rx");
4925 static int loopback_test(struct slgt_info *info)
4935 struct tty_struct *oldtty = info->port.tty;
4938 memcpy(&params, &info->params, sizeof(params));
4940 info->params.mode = MGSL_MODE_ASYNC;
4941 info->params.data_rate = 921600;
4942 info->params.loopback = 1;
4943 info->port.tty = NULL;
4949 info->tmp_rbuf_count = 0;
4950 memset(info->tmp_rbuf, 0, TESTFRAMESIZE);
4953 spin_lock_irqsave(&info->lock,flags);
4954 async_mode(info);
4955 rx_start(info);
4956 tx_load(info, buf, count);
4957 spin_unlock_irqrestore(&info->lock, flags);
4962 if (loopback_test_rx(info)) {
4969 if (!rc && (info->tmp_rbuf_count != count ||
4970 memcmp(buf, info->tmp_rbuf, count))) {
4974 spin_lock_irqsave(&info->lock,flags);
4975 reset_adapter(info);
4976 spin_unlock_irqrestore(&info->lock,flags);
4978 memcpy(&info->params, &params, sizeof(info->params));
4979 info->port.tty = oldtty;
4981 info->init_error = rc ? DiagStatus_DmaFailure : 0;
4985 static int adapter_test(struct slgt_info *info)
4987 DBGINFO(("testing %s\n", info->device_name));
4988 if (register_test(info) < 0) {
4990 info->device_name, info->phys_reg_addr);
4991 } else if (irq_test(info) < 0) {
4993 info->device_name, info->irq_level);
4994 } else if (loopback_test(info) < 0) {
4995 printk("loopback test failure %s\n", info->device_name);
4997 return info->init_error;
5005 struct slgt_info *info = timer_container_of(info, t, tx_timer);
5008 DBGINFO(("%s tx_timeout\n", info->device_name));
5009 if(info->tx_active && info->params.mode == MGSL_MODE_HDLC) {
5010 info->icount.txtimeout++;
5012 spin_lock_irqsave(&info->lock,flags);
5013 tx_stop(info);
5014 spin_unlock_irqrestore(&info->lock,flags);
5017 if (info->netcount)
5018 hdlcdev_tx_done(info);
5021 bh_transmit(info);
5029 struct slgt_info *info = timer_container_of(info, t, rx_timer);
5032 DBGINFO(("%s rx_timeout\n", info->device_name));
5033 spin_lock_irqsave(&info->lock, flags);
5034 info->pending_bh |= BH_RECEIVE;
5035 spin_unlock_irqrestore(&info->lock, flags);
5036 bh_handler(&info->task);